Add the rt linux 4.1.3-rt3 as base

[kvmfornfv.git] / kernel / drivers / bus / Kconfig

diff --git a/kernel/drivers/bus/Kconfig b/kernel/drivers/bus/Kconfig
new file mode 100644 (file)
index 0000000..a1d4af6
--- /dev/null
+++ b/kernel/drivers/bus/Kconfig
@@ -0,0 +1,116 @@
+#
+# Bus Devices
+#
+
+menu "Bus devices"
+
+config ARM_CCI
+       bool
+
+config ARM_CCI400_COMMON
+       bool
+       select ARM_CCI
+
+config ARM_CCI400_PMU
+       bool "ARM CCI400 PMU support"
+       default y
+       depends on ARM || ARM64
+       depends on HW_PERF_EVENTS
+       select ARM_CCI400_COMMON
+       help
+         Support for PMU events monitoring on the ARM CCI cache coherent
+         interconnect.
+
+         If unsure, say Y
+
+config ARM_CCI400_PORT_CTRL
+       bool
+       depends on ARM && OF && CPU_V7
+       select ARM_CCI400_COMMON
+       help
+         Low level power management driver for CCI400 cache coherent
+         interconnect for ARM platforms.
+
+config ARM_CCN
+       bool "ARM CCN driver support"
+       depends on ARM || ARM64
+       depends on PERF_EVENTS
+       help
+         PMU (perf) driver supporting the ARM CCN (Cache Coherent Network)
+         interconnect.
+
+config BRCMSTB_GISB_ARB
+       bool "Broadcom STB GISB bus arbiter"
+       depends on ARM || MIPS
+       help
+         Driver for the Broadcom Set Top Box System-on-a-chip internal bus
+         arbiter. This driver provides timeout and target abort error handling
+         and internal bus master decoding.
+
+config IMX_WEIM
+       bool "Freescale EIM DRIVER"
+       depends on ARCH_MXC
+       help
+         Driver for i.MX WEIM controller.
+         The WEIM(Wireless External Interface Module) works like a bus.
+         You can attach many different devices on it, such as NOR, onenand.
+
+config MIPS_CDMM
+       bool "MIPS Common Device Memory Map (CDMM) Driver"
+       depends on CPU_MIPSR2
+       help
+         Driver needed for the MIPS Common Device Memory Map bus in MIPS
+         cores. This bus is for per-CPU tightly coupled devices such as the
+         Fast Debug Channel (FDC).
+
+         For this to work, either your bootloader needs to enable the CDMM
+         region at an unused physical address on the boot CPU, or else your
+         platform code needs to implement mips_cdmm_phys_base() (see
+         asm/cdmm.h).
+
+config MVEBU_MBUS
+       bool
+       depends on PLAT_ORION
+       help
+         Driver needed for the MBus configuration on Marvell EBU SoCs
+         (Kirkwood, Dove, Orion5x, MV78XX0 and Armada 370/XP).
+
+config OMAP_INTERCONNECT
+       tristate "OMAP INTERCONNECT DRIVER"
+       depends on ARCH_OMAP2PLUS
+
+       help
+         Driver to enable OMAP interconnect error handling driver.
+
+config OMAP_OCP2SCP
+       tristate "OMAP OCP2SCP DRIVER"
+       depends on ARCH_OMAP2PLUS
+       help
+         Driver to enable ocp2scp module which transforms ocp interface
+         protocol to scp protocol. In OMAP4, USB PHY is connected via
+         OCP2SCP and in OMAP5, both USB PHY and SATA PHY is connected via
+         OCP2SCP.
+
+config SIMPLE_PM_BUS
+       bool "Simple Power-Managed Bus Driver"
+       depends on OF && PM
+       depends on ARCH_SHMOBILE || COMPILE_TEST
+       help
+         Driver for transparent busses that don't need a real driver, but
+         where the bus controller is part of a PM domain, or under the control
+         of a functional clock, and thus relies on runtime PM for managing
+         this PM domain and/or clock.
+         An example of such a bus controller is the Renesas Bus State
+         Controller (BSC, sometimes called "LBSC within Bus Bridge", or
+         "External Bus Interface") as found on several Renesas ARM SoCs.
+
+config VEXPRESS_CONFIG
+       bool "Versatile Express configuration bus"
+       default y if ARCH_VEXPRESS
+       depends on ARM || ARM64
+       depends on OF
+       select REGMAP
+       help
+         Platform configuration infrastructure for the ARM Ltd.
+         Versatile Express.
+endmenu