These changes are the raw update to linux-4.4.6-rt14. Kernel sources

[kvmfornfv.git] / kernel / arch / xtensa / include / asm / irqflags.h

diff --git a/kernel/arch/xtensa/include/asm/irqflags.h b/kernel/arch/xtensa/include/asm/irqflags.h
index ea36674..8e090c7 100644 (file)
--- a/kernel/arch/xtensa/include/asm/irqflags.h
+++ b/kernel/arch/xtensa/include/asm/irqflags.h
@@ -6,6 +6,7 @@
  * for more details.
  *
  * Copyright (C) 2001 - 2005 Tensilica Inc.
+ * Copyright (C) 2015 Cadence Design Systems Inc.
  */
 
 #ifndef _XTENSA_IRQFLAGS_H
@@ -23,8 +24,27 @@ static inline unsigned long arch_local_save_flags(void)
 static inline unsigned long arch_local_irq_save(void)
 {
        unsigned long flags;
-       asm volatile("rsil %0, "__stringify(LOCKLEVEL)
+#if XTENSA_FAKE_NMI
+#if defined(CONFIG_DEBUG_KERNEL) && (LOCKLEVEL | TOPLEVEL) >= XCHAL_DEBUGLEVEL
+       unsigned long tmp;
+
+       asm volatile("rsr       %0, ps\t\n"
+                    "extui     %1, %0, 0, 4\t\n"
+                    "bgei      %1, "__stringify(LOCKLEVEL)", 1f\t\n"
+                    "rsil      %0, "__stringify(LOCKLEVEL)"\n"
+                    "1:"
+                    : "=a" (flags), "=a" (tmp) :: "memory");
+#else
+       asm volatile("rsr       %0, ps\t\n"
+                    "or        %0, %0, %1\t\n"
+                    "xsr       %0, ps\t\n"
+                    "rsync"
+                    : "=&a" (flags) : "a" (LOCKLEVEL) : "memory");
+#endif
+#else
+       asm volatile("rsil      %0, "__stringify(LOCKLEVEL)
                     : "=a" (flags) :: "memory");
+#endif
        return flags;
 }