Upgrade to 4.4.50-rt62

[kvmfornfv.git] / kernel / arch / x86 / pci / irq.c

diff --git a/kernel/arch/x86/pci/irq.c b/kernel/arch/x86/pci/irq.c
index 5dc6ca5..9bd1154 100644 (file)
--- a/kernel/arch/x86/pci/irq.c
+++ b/kernel/arch/x86/pci/irq.c
@@ -146,19 +146,20 @@ static void __init pirq_peer_trick(void)
 
 /*
  *  Code for querying and setting of IRQ routes on various interrupt routers.
+ *  PIC Edge/Level Control Registers (ELCR) 0x4d0 & 0x4d1.
  */
 
-void eisa_set_level_irq(unsigned int irq)
+void elcr_set_level_irq(unsigned int irq)
 {
        unsigned char mask = 1 << (irq & 7);
        unsigned int port = 0x4d0 + (irq >> 3);
        unsigned char val;
-       static u16 eisa_irq_mask;
+       static u16 elcr_irq_mask;
 
-       if (irq >= 16 || (1 << irq) & eisa_irq_mask)
+       if (irq >= 16 || (1 << irq) & elcr_irq_mask)
                return;
 
-       eisa_irq_mask |= (1 << irq);
+       elcr_irq_mask |= (1 << irq);
        printk(KERN_DEBUG "PCI: setting IRQ %u as level-triggered\n", irq);
        val = inb(port);
        if (!(val & mask)) {
@@ -965,11 +966,11 @@ static int pcibios_lookup_irq(struct pci_dev *dev, int assign)
        } else if (r->get && (irq = r->get(pirq_router_dev, dev, pirq)) && \
        ((!(pci_probe & PCI_USE_PIRQ_MASK)) || ((1 << irq) & mask))) {
                msg = "found";
-               eisa_set_level_irq(irq);
+               elcr_set_level_irq(irq);
        } else if (newirq && r->set &&
                (dev->class >> 8) != PCI_CLASS_DISPLAY_VGA) {
                if (r->set(pirq_router_dev, dev, pirq, newirq)) {
-                       eisa_set_level_irq(newirq);
+                       elcr_set_level_irq(newirq);
                        msg = "assigned";
                        irq = newirq;
                }