These changes are the raw update to linux-4.4.6-rt14. Kernel sources

[kvmfornfv.git] / kernel / arch / powerpc / platforms / powernv / pci.h

diff --git a/kernel/arch/powerpc/platforms/powernv/pci.h b/kernel/arch/powerpc/platforms/powernv/pci.h
index 070ee88..36a99fe 100644 (file)
--- a/kernel/arch/powerpc/platforms/powernv/pci.h
+++ b/kernel/arch/powerpc/platforms/powernv/pci.h
@@ -57,8 +57,7 @@ struct pnv_ioda_pe {
        /* "Base" iommu table, ie, 4K TCEs, 32-bit DMA */
        int                     tce32_seg;
        int                     tce32_segcount;
-       struct iommu_table      *tce32_table;
-       phys_addr_t             tce_inval_reg_phys;
+       struct iommu_table_group table_group;
 
        /* 64-bit TCE bypass region */
        bool                    tce_bypass_enabled;
@@ -106,16 +105,12 @@ struct pnv_phb {
                         unsigned int hwirq, unsigned int virq,
                         unsigned int is_64, struct msi_msg *msg);
        void (*dma_dev_setup)(struct pnv_phb *phb, struct pci_dev *pdev);
-       int (*dma_set_mask)(struct pnv_phb *phb, struct pci_dev *pdev,
-                           u64 dma_mask);
-       u64 (*dma_get_required_mask)(struct pnv_phb *phb,
-                                    struct pci_dev *pdev);
        void (*fixup_phb)(struct pci_controller *hose);
        u32 (*bdfn_to_pe)(struct pnv_phb *phb, struct pci_bus *bus, u32 devfn);
-       void (*shutdown)(struct pnv_phb *phb);
        int (*init_m64)(struct pnv_phb *phb);
-       void (*reserve_m64_pe)(struct pnv_phb *phb);
-       int (*pick_m64_pe)(struct pnv_phb *phb, struct pci_bus *bus, int all);
+       void (*reserve_m64_pe)(struct pci_bus *bus,
+                              unsigned long *pe_bitmap, bool all);
+       int (*pick_m64_pe)(struct pci_bus *bus, bool all);
        int (*get_pe_state)(struct pnv_phb *phb, int pe_no);
        void (*freeze_pe)(struct pnv_phb *phb, int pe_no);
        int (*unfreeze_pe)(struct pnv_phb *phb, int pe_no, int opt);
@@ -123,6 +118,7 @@ struct pnv_phb {
        union {
                struct {
                        struct iommu_table iommu_table;
+                       struct iommu_table_group table_group;
                } p5ioc2;
 
                struct {
@@ -186,6 +182,12 @@ struct pnv_phb {
                         * boot for resource allocation purposes
                         */
                        struct list_head        pe_dma_list;
+
+                       /* TCE cache invalidate registers (physical and
+                        * remapped)
+                        */
+                       phys_addr_t             tce_inval_reg_phys;
+                       __be64 __iomem          *tce_inval_reg;
                } ioda;
        };
 
@@ -200,6 +202,13 @@ struct pnv_phb {
 };
 
 extern struct pci_ops pnv_pci_ops;
+extern int pnv_tce_build(struct iommu_table *tbl, long index, long npages,
+               unsigned long uaddr, enum dma_data_direction direction,
+               struct dma_attrs *attrs);
+extern void pnv_tce_free(struct iommu_table *tbl, long index, long npages);
+extern int pnv_tce_xchg(struct iommu_table *tbl, long index,
+               unsigned long *hpa, enum dma_data_direction *direction);
+extern unsigned long pnv_tce_get(struct iommu_table *tbl, long index);
 
 void pnv_pci_dump_phb_diag_data(struct pci_controller *hose,
                                unsigned char *log_buff);
@@ -207,6 +216,13 @@ int pnv_pci_cfg_read(struct pci_dn *pdn,
                     int where, int size, u32 *val);
 int pnv_pci_cfg_write(struct pci_dn *pdn,
                      int where, int size, u32 val);
+extern struct iommu_table *pnv_pci_table_alloc(int nid);
+
+extern long pnv_pci_link_table_and_group(int node, int num,
+               struct iommu_table *tbl,
+               struct iommu_table_group *table_group);
+extern void pnv_pci_unlink_table_and_group(struct iommu_table *tbl,
+               struct iommu_table_group *table_group);
 extern void pnv_pci_setup_iommu_table(struct iommu_table *tbl,
                                      void *tce_mem, u64 tce_size,
                                      u64 dma_offset, unsigned page_shift);
@@ -218,4 +234,9 @@ extern void pnv_pci_ioda_tce_invalidate(struct iommu_table *tbl,
 extern void pnv_pci_reset_secondary_bus(struct pci_dev *dev);
 extern int pnv_eeh_phb_reset(struct pci_controller *hose, int option);
 
+extern void pnv_pci_dma_dev_setup(struct pci_dev *pdev);
+extern void pnv_pci_dma_bus_setup(struct pci_bus *bus);
+extern int pnv_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type);
+extern void pnv_teardown_msi_irqs(struct pci_dev *pdev);
+
 #endif /* __POWERNV_PCI_H */