These changes are the raw update to linux-4.4.6-rt14. Kernel sources

[kvmfornfv.git] / kernel / arch / powerpc / include / asm / ppc-opcode.h

diff --git a/kernel/arch/powerpc/include/asm/ppc-opcode.h b/kernel/arch/powerpc/include/asm/ppc-opcode.h
index 5c93f69..7ab04fc 100644 (file)
--- a/kernel/arch/powerpc/include/asm/ppc-opcode.h
+++ b/kernel/arch/powerpc/include/asm/ppc-opcode.h
@@ -136,10 +136,11 @@
 #define PPC_INST_DCBAL                 0x7c2005ec
 #define PPC_INST_DCBZL                 0x7c2007ec
 #define PPC_INST_ICBT                  0x7c00002c
+#define PPC_INST_ICSWX                 0x7c00032d
+#define PPC_INST_ICSWEPX               0x7c00076d
 #define PPC_INST_ISEL                  0x7c00001e
 #define PPC_INST_ISEL_MASK             0xfc00003e
 #define PPC_INST_LDARX                 0x7c0000a8
-#define PPC_INST_LOGMPP                        0x7c0007e4
 #define PPC_INST_LSWI                  0x7c0004aa
 #define PPC_INST_LSWX                  0x7c00042a
 #define PPC_INST_LWARX                 0x7c000028
@@ -283,20 +284,6 @@
 #define __PPC_EH(eh)   0
 #endif
 
-/* POWER8 Micro Partition Prefetch (MPP) parameters */
-/* Address mask is common for LOGMPP instruction and MPPR SPR */
-#define PPC_MPPE_ADDRESS_MASK 0xffffffffc000
-
-/* Bits 60 and 61 of MPP SPR should be set to one of the following */
-/* Aborting the fetch is indeed setting 00 in the table size bits */
-#define PPC_MPPR_FETCH_ABORT (0x0ULL << 60)
-#define PPC_MPPR_FETCH_WHOLE_TABLE (0x2ULL << 60)
-
-/* Bits 54 and 55 of register for LOGMPP instruction should be set to: */
-#define PPC_LOGMPP_LOG_L2 (0x02ULL << 54)
-#define PPC_LOGMPP_LOG_L2L3 (0x01ULL << 54)
-#define PPC_LOGMPP_LOG_ABORT (0x03ULL << 54)
-
 /* Deal with instructions that older assemblers aren't aware of */
 #define        PPC_DCBAL(a, b)         stringify_in_c(.long PPC_INST_DCBAL | \
                                        __PPC_RA(a) | __PPC_RB(b))
@@ -305,8 +292,6 @@
 #define PPC_LDARX(t, a, b, eh) stringify_in_c(.long PPC_INST_LDARX | \
                                        ___PPC_RT(t) | ___PPC_RA(a) | \
                                        ___PPC_RB(b) | __PPC_EH(eh))
-#define PPC_LOGMPP(b)          stringify_in_c(.long PPC_INST_LOGMPP | \
-                                       __PPC_RB(b))
 #define PPC_LWARX(t, a, b, eh) stringify_in_c(.long PPC_INST_LWARX | \
                                        ___PPC_RT(t) | ___PPC_RA(a) | \
                                        ___PPC_RB(b) | __PPC_EH(eh))
@@ -403,4 +388,15 @@
 #define MFTMR(tmr, r)          stringify_in_c(.long PPC_INST_MFTMR | \
                                               TMRN(tmr) | ___PPC_RT(r))
 
+/* Coprocessor instructions */
+#define PPC_ICSWX(s, a, b)     stringify_in_c(.long PPC_INST_ICSWX |   \
+                                              ___PPC_RS(s) |           \
+                                              ___PPC_RA(a) |           \
+                                              ___PPC_RB(b))
+#define PPC_ICSWEPX(s, a, b)   stringify_in_c(.long PPC_INST_ICSWEPX | \
+                                              ___PPC_RS(s) |           \
+                                              ___PPC_RA(a) |           \
+                                              ___PPC_RB(b))
+
+
 #endif /* _ASM_POWERPC_PPC_OPCODE_H */