These changes are the raw update to linux-4.4.6-rt14. Kernel sources

[kvmfornfv.git] / kernel / arch / powerpc / boot / dts / fsl / b4860si-pre.dtsi

diff --git a/kernel/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi b/kernel/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi
index 1948f73..8797ce1 100644 (file)
--- a/kernel/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi
+++ b/kernel/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi
@@ -1,7 +1,7 @@
 /*
  * B4860 Silicon/SoC Device Tree Source (pre include)
  *
- * Copyright 2012 Freescale Semiconductor Inc.
+ * Copyright 2012 - 2015 Freescale Semiconductor Inc.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions are met:
@@ -54,6 +54,16 @@
                dma0 = &dma0;
                dma1 = &dma1;
                sdhc = &sdhc;
+
+               fman0 = &fman0;
+               ethernet0 = &enet0;
+               ethernet1 = &enet1;
+               ethernet2 = &enet2;
+               ethernet3 = &enet3;
+               ethernet4 = &enet4;
+               ethernet5 = &enet5;
+               ethernet6 = &enet6;
+               ethernet7 = &enet7;
        };
 
 
@@ -65,28 +75,28 @@
                        device_type = "cpu";
                        reg = <0 1>;
                        clocks = <&mux0>;
-                       next-level-cache = <&L2>;
+                       next-level-cache = <&L2_1>;
                        fsl,portid-mapping = <0x80000000>;
                };
                cpu1: PowerPC,e6500@2 {
                        device_type = "cpu";
                        reg = <2 3>;
                        clocks = <&mux0>;
-                       next-level-cache = <&L2>;
+                       next-level-cache = <&L2_1>;
                        fsl,portid-mapping = <0x80000000>;
                };
                cpu2: PowerPC,e6500@4 {
                        device_type = "cpu";
                        reg = <4 5>;
                        clocks = <&mux0>;
-                       next-level-cache = <&L2>;
+                       next-level-cache = <&L2_1>;
                        fsl,portid-mapping = <0x80000000>;
                };
                cpu3: PowerPC,e6500@6 {
                        device_type = "cpu";
                        reg = <6 7>;
                        clocks = <&mux0>;
-                       next-level-cache = <&L2>;
+                       next-level-cache = <&L2_1>;
                        fsl,portid-mapping = <0x80000000>;
                };
        };