These changes are the raw update to linux-4.4.6-rt14. Kernel sources

[kvmfornfv.git] / kernel / arch / mips / include / uapi / asm / inst.h

diff --git a/kernel/arch/mips/include/uapi/asm/inst.h b/kernel/arch/mips/include/uapi/asm/inst.h
index fc0cf5a..9b44d5a 100644 (file)
--- a/kernel/arch/mips/include/uapi/asm/inst.h
+++ b/kernel/arch/mips/include/uapi/asm/inst.h
@@ -26,7 +26,7 @@ enum major_op {
        cop0_op, cop1_op, cop2_op, cop1x_op,
        beql_op, bnel_op, blezl_op, bgtzl_op,
        daddi_op, cbcond1_op = daddi_op, daddiu_op, ldl_op, ldr_op,
-       spec2_op, jalx_op, mdmx_op, spec3_op,
+       spec2_op, jalx_op, mdmx_op, msa_op = mdmx_op, spec3_op,
        lb_op, lh_op, lwl_op, lw_op,
        lbu_op, lhu_op, lwr_op, lwu_op,
        sb_op, sh_op, swl_op, sw_op,
@@ -167,8 +167,13 @@ enum cop1_sdw_func {
        fround_op    =  0x0c, ftrunc_op    =  0x0d,
        fceil_op     =  0x0e, ffloor_op    =  0x0f,
        fmovc_op     =  0x11, fmovz_op     =  0x12,
-       fmovn_op     =  0x13, frecip_op    =  0x15,
-       frsqrt_op    =  0x16, fcvts_op     =  0x20,
+       fmovn_op     =  0x13, fseleqz_op   =  0x14,
+       frecip_op    =  0x15, frsqrt_op    =  0x16,
+       fselnez_op   =  0x17, fmaddf_op    =  0x18,
+       fmsubf_op    =  0x19, frint_op     =  0x1a,
+       fclass_op    =  0x1b, fmin_op      =  0x1c,
+       fmina_op     =  0x1d, fmax_op      =  0x1e,
+       fmaxa_op     =  0x1f, fcvts_op     =  0x20,
        fcvtd_op     =  0x21, fcvte_op     =  0x22,
        fcvtw_op     =  0x24, fcvtl_op     =  0x25,
        fcmp_op      =  0x30
@@ -220,6 +225,24 @@ enum bshfl_func {
        seh_op  = 0x18,
 };
 
+/*
+ * func field for MSA MI10 format.
+ */
+enum msa_mi10_func {
+       msa_ld_op = 8,
+       msa_st_op = 9,
+};
+
+/*
+ * MSA 2 bit format fields.
+ */
+enum msa_2b_fmt {
+       msa_fmt_b = 0,
+       msa_fmt_h = 1,
+       msa_fmt_w = 2,
+       msa_fmt_d = 3,
+};
+
 /*
  * (microMIPS) Major opcodes.
  */
@@ -611,6 +634,16 @@ struct v_format {                          /* MDMX vector format */
        ;)))))))
 };
 
+struct msa_mi10_format {               /* MSA MI10 */
+       __BITFIELD_FIELD(unsigned int opcode : 6,
+       __BITFIELD_FIELD(signed int s10 : 10,
+       __BITFIELD_FIELD(unsigned int rs : 5,
+       __BITFIELD_FIELD(unsigned int wd : 5,
+       __BITFIELD_FIELD(unsigned int func : 4,
+       __BITFIELD_FIELD(unsigned int df : 2,
+       ;))))))
+};
+
 struct spec3_format {   /* SPEC3 */
        __BITFIELD_FIELD(unsigned int opcode:6,
        __BITFIELD_FIELD(unsigned int rs:5,
@@ -888,6 +921,7 @@ union mips_instruction {
        struct p_format p_format;
        struct f_format f_format;
        struct ma_format ma_format;
+       struct msa_mi10_format msa_mi10_format;
        struct b_format b_format;
        struct ps_format ps_format;
        struct v_format v_format;