These changes are the raw update to linux-4.4.6-rt14. Kernel sources

[kvmfornfv.git] / kernel / arch / arm / mm / Kconfig

diff --git a/kernel/arch/arm/mm/Kconfig b/kernel/arch/arm/mm/Kconfig
index b4f92b9..4121886 100644 (file)
--- a/kernel/arch/arm/mm/Kconfig
+++ b/kernel/arch/arm/mm/Kconfig
@@ -6,7 +6,7 @@ comment "Processor Type"
 
 # ARM7TDMI
 config CPU_ARM7TDMI
-       bool "Support ARM7TDMI processor"
+       bool
        depends on !MMU
        select CPU_32v4T
        select CPU_ABRT_LV4T
@@ -56,7 +56,7 @@ config CPU_ARM740T
 
 # ARM9TDMI
 config CPU_ARM9TDMI
-       bool "Support ARM9TDMI processor"
+       bool
        depends on !MMU
        select CPU_32v4T
        select CPU_ABRT_NOMMU
@@ -419,28 +419,24 @@ config CPU_THUMBONLY
 config CPU_32v3
        bool
        select CPU_USE_DOMAINS if MMU
-       select NEEDS_SYSCALL_FOR_CMPXCHG if SMP
        select NEED_KUSER_HELPERS
        select TLS_REG_EMUL if SMP || !MMU
 
 config CPU_32v4
        bool
        select CPU_USE_DOMAINS if MMU
-       select NEEDS_SYSCALL_FOR_CMPXCHG if SMP
        select NEED_KUSER_HELPERS
        select TLS_REG_EMUL if SMP || !MMU
 
 config CPU_32v4T
        bool
        select CPU_USE_DOMAINS if MMU
-       select NEEDS_SYSCALL_FOR_CMPXCHG if SMP
        select NEED_KUSER_HELPERS
        select TLS_REG_EMUL if SMP || !MMU
 
 config CPU_32v5
        bool
        select CPU_USE_DOMAINS if MMU
-       select NEEDS_SYSCALL_FOR_CMPXCHG if SMP
        select NEED_KUSER_HELPERS
        select TLS_REG_EMUL if SMP || !MMU
 
@@ -604,6 +600,22 @@ config CPU_USE_DOMAINS
          This option enables or disables the use of domain switching
          via the set_fs() function.
 
+config CPU_V7M_NUM_IRQ
+       int "Number of external interrupts connected to the NVIC"
+       depends on CPU_V7M
+       default 90 if ARCH_STM32
+       default 38 if ARCH_EFM32
+       default 112 if SOC_VF610
+       default 240
+       help
+         This option indicates the number of interrupts connected to the NVIC.
+         The value can be larger than the real number of interrupts supported
+         by the system, but must not be lower.
+         The default value is 240, corresponding to the maximum number of
+         interrupts supported by the NVIC on Cortex-M family.
+
+         If unsure, keep default value.
+
 #
 # CPU supports 36-bit I/O
 #
@@ -624,6 +636,10 @@ config ARM_LPAE
 
          If unsure, say N.
 
+config ARM_PV_FIXUP
+       def_bool y
+       depends on ARM_LPAE && ARM_PATCH_PHYS_VIRT && ARCH_KEYSTONE
+
 config ARCH_PHYS_ADDR_T_64BIT
        def_bool ARM_LPAE
 
@@ -785,14 +801,6 @@ config TLS_REG_EMUL
          a few prototypes like that in existence) and therefore access to
          that required register must be emulated.
 
-config NEEDS_SYSCALL_FOR_CMPXCHG
-       bool
-       select NEED_KUSER_HELPERS
-       help
-         SMP on a pre-ARMv6 processor?  Well OK then.
-         Forget about fast user space cmpxchg support.
-         It is just not possible.
-
 config NEED_KUSER_HELPERS
        bool
 
@@ -863,6 +871,7 @@ config OUTER_CACHE
 
 config OUTER_CACHE_SYNC
        bool
+       select ARM_HEAVY_MB
        help
          The outer cache has a outer_cache_fns.sync function pointer
          that can be used to drain the write buffer of the outer cache.
@@ -965,6 +974,16 @@ config CACHE_TAUROS2
          This option enables the Tauros2 L2 cache controller (as
          found on PJ1/PJ4).
 
+config CACHE_UNIPHIER
+       bool "Enable the UniPhier outer cache controller"
+       depends on ARCH_UNIPHIER
+       default y
+       select OUTER_CACHE
+       select OUTER_CACHE_SYNC
+       help
+         This option enables the UniPhier outer cache (system cache)
+         controller.
+
 config CACHE_XSC3L2
        bool "Enable the L2 cache on XScale3"
        depends on CPU_XSC3
@@ -1011,6 +1030,9 @@ config ARCH_HAS_BARRIERS
          This option allows the use of custom mandatory barriers
          included via the mach/barriers.h file.
 
+config ARM_HEAVY_MB
+       bool
+
 config ARCH_SUPPORTS_BIG_ENDIAN
        bool
        help