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[kvmfornfv.git] / kernel / arch / arm / mach-omap2 / cpuidle34xx.c

diff --git a/kernel/arch/arm/mach-omap2/cpuidle34xx.c b/kernel/arch/arm/mach-omap2/cpuidle34xx.c
index aa7b379..2a3db0b 100644 (file)
--- a/kernel/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/kernel/arch/arm/mach-omap2/cpuidle34xx.c
@@ -34,6 +34,7 @@
 #include "pm.h"
 #include "control.h"
 #include "common.h"
+#include "soc.h"
 
 /* Mach specific information to be recorded in the C-state driver_data */
 struct omap3_idle_statedata {
@@ -315,6 +316,69 @@ static struct cpuidle_driver omap3_idle_driver = {
        .safe_state_index = 0,
 };
 
+/*
+ * Numbers based on measurements made in October 2009 for PM optimized kernel
+ * with CPU freq enabled on device Nokia N900. Assumes OPP2 (main idle OPP,
+ * and worst case latencies).
+ */
+static struct cpuidle_driver omap3430_idle_driver = {
+       .name             = "omap3430_idle",
+       .owner            = THIS_MODULE,
+       .states = {
+               {
+                       .enter            = omap3_enter_idle_bm,
+                       .exit_latency     = 110 + 162,
+                       .target_residency = 5,
+                       .name             = "C1",
+                       .desc             = "MPU ON + CORE ON",
+               },
+               {
+                       .enter            = omap3_enter_idle_bm,
+                       .exit_latency     = 106 + 180,
+                       .target_residency = 309,
+                       .name             = "C2",
+                       .desc             = "MPU ON + CORE ON",
+               },
+               {
+                       .enter            = omap3_enter_idle_bm,
+                       .exit_latency     = 107 + 410,
+                       .target_residency = 46057,
+                       .name             = "C3",
+                       .desc             = "MPU RET + CORE ON",
+               },
+               {
+                       .enter            = omap3_enter_idle_bm,
+                       .exit_latency     = 121 + 3374,
+                       .target_residency = 46057,
+                       .name             = "C4",
+                       .desc             = "MPU OFF + CORE ON",
+               },
+               {
+                       .enter            = omap3_enter_idle_bm,
+                       .exit_latency     = 855 + 1146,
+                       .target_residency = 46057,
+                       .name             = "C5",
+                       .desc             = "MPU RET + CORE RET",
+               },
+               {
+                       .enter            = omap3_enter_idle_bm,
+                       .exit_latency     = 7580 + 4134,
+                       .target_residency = 484329,
+                       .name             = "C6",
+                       .desc             = "MPU OFF + CORE RET",
+               },
+               {
+                       .enter            = omap3_enter_idle_bm,
+                       .exit_latency     = 7505 + 15274,
+                       .target_residency = 484329,
+                       .name             = "C7",
+                       .desc             = "MPU OFF + CORE OFF",
+               },
+       },
+       .state_count = ARRAY_SIZE(omap3_idle_data),
+       .safe_state_index = 0,
+};
+
 /* Public functions */
 
 /**
@@ -333,5 +397,8 @@ int __init omap3_idle_init(void)
        if (!mpu_pd || !core_pd || !per_pd || !cam_pd)
                return -ENODEV;
 
-       return cpuidle_register(&omap3_idle_driver, NULL);
+       if (cpu_is_omap3430())
+               return cpuidle_register(&omap3430_idle_driver, NULL);
+       else
+               return cpuidle_register(&omap3_idle_driver, NULL);
 }