These changes are the raw update to linux-4.4.6-rt14. Kernel sources

[kvmfornfv.git] / kernel / arch / arm / boot / dts / socfpga.dtsi

diff --git a/kernel/arch/arm/boot/dts/socfpga.dtsi b/kernel/arch/arm/boot/dts/socfpga.dtsi
index d9176e6..39c470e 100644 (file)
--- a/kernel/arch/arm/boot/dts/socfpga.dtsi
+++ b/kernel/arch/arm/boot/dts/socfpga.dtsi
@@ -36,6 +36,7 @@
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
+               enable-method = "altr,socfpga-smp";
 
                cpu@0 {
                        compatible = "arm,cortex-a9";
@@ -163,7 +164,7 @@
                                                dbg_base_clk: dbg_base_clk {
                                                        #clock-cells = <0>;
                                                        compatible = "altr,socfpga-perip-clk";
-                                                       clocks = <&main_pll>;
+                                                       clocks = <&main_pll>, <&osc1>;
                                                        div-reg = <0xe8 0 9>;
                                                        reg = <0x50>;
                                                };
@@ -317,7 +318,7 @@
                                        l3_sp_clk: l3_sp_clk {
                                                #clock-cells = <0>;
                                                compatible = "altr,socfpga-gate-clk";
-                                               clocks = <&mainclk>;
+                                               clocks = <&l3_mp_clk>;
                                                div-reg = <0x64 2 2>;
                                        };
 
@@ -348,7 +349,7 @@
                                        dbg_clk: dbg_clk {
                                                #clock-cells = <0>;
                                                compatible = "altr,socfpga-gate-clk";
-                                               clocks = <&dbg_base_clk>;
+                                               clocks = <&dbg_at_clk>;
                                                div-reg = <0x68 2 2>;
                                                clk-gate = <0x60 5>;
                                        };
@@ -451,6 +452,14 @@
                                                clk-phase = <0 135>;
                                        };
 
+                                       sdmmc_clk_divided: sdmmc_clk_divided {
+                                               #clock-cells = <0>;
+                                               compatible = "altr,socfpga-gate-clk";
+                                               clocks = <&sdmmc_clk>;
+                                               clk-gate = <0xa0 8>;
+                                               fixed-divider = <4>;
+                                       };
+
                                        nand_x_clk: nand_x_clk {
                                                #clock-cells = <0>;
                                                compatible = "altr,socfpga-gate-clk";
@@ -472,8 +481,44 @@
                                                clocks = <&f2s_periph_ref_clk>, <&main_qspi_clk>, <&per_qspi_clk>;
                                                clk-gate = <0xa0 11>;
                                        };
+
+                                       ddr_dqs_clk_gate: ddr_dqs_clk_gate {
+                                               #clock-cells = <0>;
+                                               compatible = "altr,socfpga-gate-clk";
+                                               clocks = <&ddr_dqs_clk>;
+                                               clk-gate = <0xd8 0>;
+                                       };
+
+                                       ddr_2x_dqs_clk_gate: ddr_2x_dqs_clk_gate {
+                                               #clock-cells = <0>;
+                                               compatible = "altr,socfpga-gate-clk";
+                                               clocks = <&ddr_2x_dqs_clk>;
+                                               clk-gate = <0xd8 1>;
+                                       };
+
+                                       ddr_dq_clk_gate: ddr_dq_clk_gate {
+                                               #clock-cells = <0>;
+                                               compatible = "altr,socfpga-gate-clk";
+                                               clocks = <&ddr_dq_clk>;
+                                               clk-gate = <0xd8 2>;
+                                       };
+
+                                       h2f_user2_clk: h2f_user2_clk {
+                                               #clock-cells = <0>;
+                                               compatible = "altr,socfpga-gate-clk";
+                                               clocks = <&h2f_usr2_clk>;
+                                               clk-gate = <0xd8 3>;
+                                       };
+
                                };
-                       };
+               };
+
+               fpgamgr0: fpgamgr@ff706000 {
+                       compatible = "altr,socfpga-fpga-mgr";
+                       reg = <0xff706000 0x1000
+                              0xffb90000 0x1000>;
+                       interrupts = <0 175 4>;
+               };
 
                gmac0: ethernet@ff700000 {
                        compatible = "altr,socfpga-stmmac", "snps,dwmac-3.70a", "snps,dwmac";
@@ -488,6 +533,8 @@
                        reset-names = "stmmaceth";
                        snps,multicast-filter-bins = <256>;
                        snps,perfect-filter-entries = <128>;
+                       tx-fifo-depth = <4096>;
+                       rx-fifo-depth = <4096>;
                        status = "disabled";
                };
 
@@ -504,46 +551,8 @@
                        reset-names = "stmmaceth";
                        snps,multicast-filter-bins = <256>;
                        snps,perfect-filter-entries = <128>;
-                       status = "disabled";
-               };
-
-               i2c0: i2c@ffc04000 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-                       compatible = "snps,designware-i2c";
-                       reg = <0xffc04000 0x1000>;
-                       clocks = <&l4_sp_clk>;
-                       interrupts = <0 158 0x4>;
-                       status = "disabled";
-               };
-
-               i2c1: i2c@ffc05000 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-                       compatible = "snps,designware-i2c";
-                       reg = <0xffc05000 0x1000>;
-                       clocks = <&l4_sp_clk>;
-                       interrupts = <0 159 0x4>;
-                       status = "disabled";
-               };
-
-               i2c2: i2c@ffc06000 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-                       compatible = "snps,designware-i2c";
-                       reg = <0xffc06000 0x1000>;
-                       clocks = <&l4_sp_clk>;
-                       interrupts = <0 160 0x4>;
-                       status = "disabled";
-               };
-
-               i2c3: i2c@ffc07000 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-                       compatible = "snps,designware-i2c";
-                       reg = <0xffc07000 0x1000>;
-                       clocks = <&l4_sp_clk>;
-                       interrupts = <0 161 0x4>;
+                       tx-fifo-depth = <4096>;
+                       rx-fifo-depth = <4096>;
                        status = "disabled";
                };
 
@@ -552,7 +561,7 @@
                        #size-cells = <0>;
                        compatible = "snps,dw-apb-gpio";
                        reg = <0xff708000 0x1000>;
-                       clocks = <&per_base_clk>;
+                       clocks = <&l4_mp_clk>;
                        status = "disabled";
 
                        porta: gpio-controller@0 {
@@ -572,7 +581,7 @@
                        #size-cells = <0>;
                        compatible = "snps,dw-apb-gpio";
                        reg = <0xff709000 0x1000>;
-                       clocks = <&per_base_clk>;
+                       clocks = <&l4_mp_clk>;
                        status = "disabled";
 
                        portb: gpio-controller@0 {
@@ -592,7 +601,7 @@
                        #size-cells = <0>;
                        compatible = "snps,dw-apb-gpio";
                        reg = <0xff70a000 0x1000>;
-                       clocks = <&per_base_clk>;
+                       clocks = <&l4_mp_clk>;
                        status = "disabled";
 
                        portc: gpio-controller@0 {
@@ -607,15 +616,44 @@
                        };
                };
 
-               sdr: sdr@ffc25000 {
-                       compatible = "syscon";
-                       reg = <0xffc25000 0x1000>;
+               i2c0: i2c@ffc04000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "snps,designware-i2c";
+                       reg = <0xffc04000 0x1000>;
+                       clocks = <&l4_sp_clk>;
+                       interrupts = <0 158 0x4>;
+                       status = "disabled";
                };
 
-               sdramedac {
-                       compatible = "altr,sdram-edac";
-                       altr,sdr-syscon = <&sdr>;
-                       interrupts = <0 39 4>;
+               i2c1: i2c@ffc05000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "snps,designware-i2c";
+                       reg = <0xffc05000 0x1000>;
+                       clocks = <&l4_sp_clk>;
+                       interrupts = <0 159 0x4>;
+                       status = "disabled";
+               };
+
+               i2c2: i2c@ffc06000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "snps,designware-i2c";
+                       reg = <0xffc06000 0x1000>;
+                       clocks = <&l4_sp_clk>;
+                       interrupts = <0 160 0x4>;
+                       status = "disabled";
+               };
+
+               i2c3: i2c@ffc07000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "snps,designware-i2c";
+                       reg = <0xffc07000 0x1000>;
+                       clocks = <&l4_sp_clk>;
+                       interrupts = <0 161 0x4>;
+                       status = "disabled";
                };
 
                L2: l2-cache@fffef000 {
@@ -626,6 +664,8 @@
                        cache-level = <2>;
                        arm,tag-latency = <1 1 1>;
                        arm,data-latency = <2 1 1>;
+                       prefetch-data = <1>;
+                       prefetch-instr = <1>;
                };
 
                mmc: dwmmc0@ff704000 {
@@ -635,7 +675,7 @@
                        fifo-depth = <0x400>;
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       clocks = <&l4_mp_clk>, <&sdmmc_clk>;
+                       clocks = <&l4_mp_clk>, <&sdmmc_clk_divided>;
                        clock-names = "biu", "ciu";
                };
 
@@ -644,6 +684,29 @@
                        reg = <0xffff0000 0x10000>;
                };
 
+               rst: rstmgr@ffd05000 {
+                       #reset-cells = <1>;
+                       compatible = "altr,rst-mgr";
+                       reg = <0xffd05000 0x1000>;
+                       altr,modrst-offset = <0x10>;
+               };
+
+               scu: snoop-control-unit@fffec000 {
+                       compatible = "arm,cortex-a9-scu";
+                       reg = <0xfffec000 0x100>;
+               };
+
+               sdr: sdr@ffc25000 {
+                       compatible = "syscon";
+                       reg = <0xffc25000 0x1000>;
+               };
+
+               sdramedac {
+                       compatible = "altr,sdram-edac";
+                       altr,sdr-syscon = <&sdr>;
+                       interrupts = <0 39 4>;
+               };
+
                spi0: spi@fff00000 {
                        compatible = "snps,dw-apb-ssi";
                        #address-cells = <1>;
@@ -666,6 +729,11 @@
                        status = "disabled";
                };
 
+               sysmgr: sysmgr@ffd08000 {
+                       compatible = "altr,sys-mgr", "syscon";
+                       reg = <0xffd08000 0x4000>;
+               };
+
                /* Local timer */
                timer@fffec600 {
                        compatible = "arm,cortex-a9-twd-timer";
@@ -730,12 +798,6 @@
                        dma-names = "tx", "rx";
                };
 
-               rst: rstmgr@ffd05000 {
-                       #reset-cells = <1>;
-                       compatible = "altr,rst-mgr";
-                       reg = <0xffd05000 0x1000>;
-               };
-
                usbphy0: usbphy@0 {
                        #phy-cells = <0>;
                        compatible = "usb-nop-xceiv";
@@ -779,10 +841,5 @@
                        clocks = <&osc1>;
                        status = "disabled";
                };
-
-               sysmgr: sysmgr@ffd08000 {
-                       compatible = "altr,sys-mgr", "syscon";
-                       reg = <0xffd08000 0x4000>;
-               };
        };
 };