These changes are the raw update to linux-4.4.6-rt14. Kernel sources

[kvmfornfv.git] / kernel / arch / arm / boot / dts / r8a7779.dtsi

diff --git a/kernel/arch/arm/boot/dts/r8a7779.dtsi b/kernel/arch/arm/boot/dts/r8a7779.dtsi
index 5c2219b..6afa909 100644 (file)
--- a/kernel/arch/arm/boot/dts/r8a7779.dtsi
+++ b/kernel/arch/arm/boot/dts/r8a7779.dtsi
@@ -148,7 +148,7 @@
                interrupt-controller;
        };
 
-       irqpin0: irqpin@fe780010 {
+       irqpin0: interrupt-controller@fe78001c {
                compatible = "renesas,intc-irqpin-r8a7779", "renesas,intc-irqpin";
                #interrupt-cells = <2>;
                status = "disabled";
@@ -157,7 +157,8 @@
                        <0xfe780010 4>,
                        <0xfe780024 4>,
                        <0xfe780044 4>,
-                       <0xfe780064 4>;
+                       <0xfe780064 4>,
+                       <0xfe780000 4>;
                interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH
                              0 28 IRQ_TYPE_LEVEL_HIGH
                              0 29 IRQ_TYPE_LEVEL_HIGH
@@ -172,6 +173,7 @@
                reg = <0xffc70000 0x1000>;
                interrupts = <0 79 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp0_clks R8A7779_CLK_I2C0>;
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -182,6 +184,7 @@
                reg = <0xffc71000 0x1000>;
                interrupts = <0 82 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp0_clks R8A7779_CLK_I2C1>;
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -192,6 +195,7 @@
                reg = <0xffc72000 0x1000>;
                interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp0_clks R8A7779_CLK_I2C2>;
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -202,6 +206,7 @@
                reg = <0xffc73000 0x1000>;
                interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp0_clks R8A7779_CLK_I2C3>;
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -211,6 +216,7 @@
                interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp0_clks R8A7779_CLK_SCIF0>;
                clock-names = "sci_ick";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -220,6 +226,7 @@
                interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp0_clks R8A7779_CLK_SCIF1>;
                clock-names = "sci_ick";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -229,6 +236,7 @@
                interrupts = <0 90 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp0_clks R8A7779_CLK_SCIF2>;
                clock-names = "sci_ick";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -238,6 +246,7 @@
                interrupts = <0 91 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp0_clks R8A7779_CLK_SCIF3>;
                clock-names = "sci_ick";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -247,6 +256,7 @@
                interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp0_clks R8A7779_CLK_SCIF4>;
                clock-names = "sci_ick";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -256,6 +266,7 @@
                interrupts = <0 93 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp0_clks R8A7779_CLK_SCIF5>;
                clock-names = "sci_ick";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -277,6 +288,7 @@
                             <0 34 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp0_clks R8A7779_CLK_TMU0>;
                clock-names = "fck";
+               power-domains = <&cpg_clocks>;
 
                #renesas,channels = <3>;
 
@@ -291,6 +303,7 @@
                             <0 38 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp0_clks R8A7779_CLK_TMU1>;
                clock-names = "fck";
+               power-domains = <&cpg_clocks>;
 
                #renesas,channels = <3>;
 
@@ -305,6 +318,7 @@
                             <0 42 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp0_clks R8A7779_CLK_TMU2>;
                clock-names = "fck";
+               power-domains = <&cpg_clocks>;
 
                #renesas,channels = <3>;
 
@@ -316,6 +330,7 @@
                reg = <0xfc600000 0x2000>;
                interrupts = <0 100 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp1_clks R8A7779_CLK_SATA>;
+               power-domains = <&cpg_clocks>;
        };
 
        sdhi0: sd@ffe4c000 {
@@ -323,6 +338,7 @@
                reg = <0xffe4c000 0x100>;
                interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp3_clks R8A7779_CLK_SDHI0>;
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -331,6 +347,7 @@
                reg = <0xffe4d000 0x100>;
                interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp3_clks R8A7779_CLK_SDHI1>;
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -339,6 +356,7 @@
                reg = <0xffe4e000 0x100>;
                interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp3_clks R8A7779_CLK_SDHI2>;
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -347,6 +365,7 @@
                reg = <0xffe4f000 0x100>;
                interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp3_clks R8A7779_CLK_SDHI3>;
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -357,6 +376,7 @@
                #address-cells = <1>;
                #size-cells = <0>;
                clocks = <&mstp0_clks R8A7779_CLK_HSPI>;
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -367,6 +387,7 @@
                #address-cells = <1>;
                #size-cells = <0>;
                clocks = <&mstp0_clks R8A7779_CLK_HSPI>;
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -377,6 +398,7 @@
                #address-cells = <1>;
                #size-cells = <0>;
                clocks = <&mstp0_clks R8A7779_CLK_HSPI>;
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -385,6 +407,7 @@
                reg = <0 0xfff80000 0 0x40000>;
                interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp1_clks R8A7779_CLK_DU>;
+               power-domains = <&cpg_clocks>;
                status = "disabled";
 
                ports {
@@ -426,6 +449,7 @@
                        #clock-cells = <1>;
                        clock-output-names = "plla", "z", "zs", "s",
                                             "s1", "p", "b", "out";
+                       #power-domain-cells = <0>;
                };
 
                /* Fixed factor clocks */