These changes are the raw update to linux-4.4.6-rt14. Kernel sources

[kvmfornfv.git] / kernel / arch / arm / boot / dts / exynos4412.dtsi

diff --git a/kernel/arch/arm/boot/dts/exynos4412.dtsi b/kernel/arch/arm/boot/dts/exynos4412.dtsi
index 68ad43b..294cfe4 100644 (file)
--- a/kernel/arch/arm/boot/dts/exynos4412.dtsi
+++ b/kernel/arch/arm/boot/dts/exynos4412.dtsi
@@ -30,6 +30,9 @@
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
                        reg = <0xA00>;
+                       clocks = <&clock CLK_ARM_CLK>;
+                       clock-names = "cpu";
+                       operating-points-v2 = <&cpu0_opp_table>;
                        cooling-min-level = <13>;
                        cooling-max-level = <7>;
                        #cooling-cells = <2>; /* min followed by max */
@@ -39,34 +42,115 @@
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
                        reg = <0xA01>;
+                       operating-points-v2 = <&cpu0_opp_table>;
                };
 
                cpu@A02 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
                        reg = <0xA02>;
+                       operating-points-v2 = <&cpu0_opp_table>;
                };
 
                cpu@A03 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
                        reg = <0xA03>;
+                       operating-points-v2 = <&cpu0_opp_table>;
                };
        };
 
-       combiner: interrupt-controller@10440000 {
-               samsung,combiner-nr = <20>;
+       cpu0_opp_table: opp_table0 {
+               compatible = "operating-points-v2";
+               opp-shared;
+
+               opp00 {
+                       opp-hz = /bits/ 64 <200000000>;
+                       opp-microvolt = <900000>;
+                       clock-latency-ns = <200000>;
+               };
+               opp01 {
+                       opp-hz = /bits/ 64 <300000000>;
+                       opp-microvolt = <900000>;
+                       clock-latency-ns = <200000>;
+               };
+               opp02 {
+                       opp-hz = /bits/ 64 <400000000>;
+                       opp-microvolt = <925000>;
+                       clock-latency-ns = <200000>;
+               };
+               opp03 {
+                       opp-hz = /bits/ 64 <500000000>;
+                       opp-microvolt = <950000>;
+                       clock-latency-ns = <200000>;
+               };
+               opp04 {
+                       opp-hz = /bits/ 64 <600000000>;
+                       opp-microvolt = <975000>;
+                       clock-latency-ns = <200000>;
+               };
+               opp05 {
+                       opp-hz = /bits/ 64 <700000000>;
+                       opp-microvolt = <987500>;
+                       clock-latency-ns = <200000>;
+               };
+               opp06 {
+                       opp-hz = /bits/ 64 <800000000>;
+                       opp-microvolt = <1000000>;
+                       clock-latency-ns = <200000>;
+                       opp-suspend;
+               };
+               opp07 {
+                       opp-hz = /bits/ 64 <900000000>;
+                       opp-microvolt = <1037500>;
+                       clock-latency-ns = <200000>;
+               };
+               opp08 {
+                       opp-hz = /bits/ 64 <1000000000>;
+                       opp-microvolt = <1087500>;
+                       clock-latency-ns = <200000>;
+               };
+               opp09 {
+                       opp-hz = /bits/ 64 <1100000000>;
+                       opp-microvolt = <1137500>;
+                       clock-latency-ns = <200000>;
+               };
+               opp10 {
+                       opp-hz = /bits/ 64 <1200000000>;
+                       opp-microvolt = <1187500>;
+                       clock-latency-ns = <200000>;
+               };
+               opp11 {
+                       opp-hz = /bits/ 64 <1300000000>;
+                       opp-microvolt = <1250000>;
+                       clock-latency-ns = <200000>;
+               };
+               opp12 {
+                       opp-hz = /bits/ 64 <1400000000>;
+                       opp-microvolt = <1287500>;
+                       clock-latency-ns = <200000>;
+               };
+               opp13 {
+                       opp-hz = /bits/ 64 <1500000000>;
+                       opp-microvolt = <1350000>;
+                       clock-latency-ns = <200000>;
+                       turbo-mode;
+               };
        };
 
        pmu {
                interrupts = <2 2>, <3 2>, <18 2>, <19 2>;
        };
+};
 
-       gic: interrupt-controller@10490000 {
-               cpu-offset = <0x4000>;
-       };
+&pmu_system_controller {
+       compatible = "samsung,exynos4412-pmu", "syscon";
+};
 
-       pmu_system_controller: system-controller@10020000 {
-               compatible = "samsung,exynos4412-pmu", "syscon";
-       };
+&combiner {
+       samsung,combiner-nr = <20>;
+};
+
+&gic {
+       cpu-offset = <0x4000>;
 };