These changes are the raw update to linux-4.4.6-rt14. Kernel sources

[kvmfornfv.git] / kernel / arch / arm / boot / dts / exynos4210.dtsi

diff --git a/kernel/arch/arm/boot/dts/exynos4210.dtsi b/kernel/arch/arm/boot/dts/exynos4210.dtsi
index be89f83..3e5ba66 100644 (file)
--- a/kernel/arch/arm/boot/dts/exynos4210.dtsi
+++ b/kernel/arch/arm/boot/dts/exynos4210.dtsi
@@ -40,6 +40,18 @@
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
                        reg = <0x900>;
+                       clocks = <&clock CLK_ARM_CLK>;
+                       clock-names = "cpu";
+                       clock-latency = <160000>;
+
+                       operating-points = <
+                               1200000 1250000
+                               1000000 1150000
+                               800000  1075000
+                               500000  975000
+                               400000  975000
+                               200000  950000
+                       >;
                        cooling-min-level = <4>;
                        cooling-max-level = <2>;
                        #cooling-cells = <2>; /* min followed by max */
@@ -52,17 +64,7 @@
                };
        };
 
-       pmu_system_controller: system-controller@10020000 {
-               clock-names = "clkout0", "clkout1", "clkout2", "clkout3",
-                               "clkout4", "clkout8", "clkout9";
-               clocks = <&clock CLK_OUT_DMC>, <&clock CLK_OUT_TOP>,
-                       <&clock CLK_OUT_LEFTBUS>, <&clock CLK_OUT_RIGHTBUS>,
-                       <&clock CLK_OUT_CPU>, <&clock CLK_XXTI>,
-                       <&clock CLK_XUSBXTI>;
-               #clock-cells = <1>;
-       };
-
-       sysram@02020000 {
+       sysram: sysram@02020000 {
                compatible = "mmio-sram";
                reg = <0x02020000 0x20000>;
                #address-cells = <1>;
@@ -95,19 +97,7 @@
                arm,data-latency = <2 2 1>;
        };
 
-       gic: interrupt-controller@10490000 {
-               cpu-offset = <0x8000>;
-       };
-
-       combiner: interrupt-controller@10440000 {
-               samsung,combiner-nr = <16>;
-               interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
-                            <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
-                            <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
-                            <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>;
-       };
-
-       mct@10050000 {
+       mct: mct@10050000 {
                compatible = "samsung,exynos4210-mct";
                reg = <0x10050000 0x800>;
                interrupt-parent = <&mct_map>;
@@ -189,12 +179,13 @@
                };
        };
 
-       g2d@12800000 {
+       g2d: g2d@12800000 {
                compatible = "samsung,s5pv210-g2d";
                reg = <0x12800000 0x1000>;
                interrupts = <0 89 0>;
                clocks = <&clock CLK_SCLK_FIMG2D>, <&clock CLK_G2D>;
                clock-names = "sclk_fimg2d", "fimg2d";
+               iommus = <&sysmmu_g2d>;
                status = "disabled";
        };
 
@@ -244,4 +235,47 @@
                clock-names = "ppmu";
                status = "disabled";
        };
+
+       sysmmu_g2d: sysmmu@12A20000 {
+               compatible = "samsung,exynos-sysmmu";
+               reg = <0x12A20000 0x1000>;
+               interrupt-parent = <&combiner>;
+               interrupts = <4 7>;
+               clock-names = "sysmmu", "master";
+               clocks = <&clock CLK_SMMU_G2D>, <&clock CLK_G2D>;
+               power-domains = <&pd_lcd0>;
+               #iommu-cells = <0>;
+       };
+
+       sysmmu_fimd1: sysmmu@12220000 {
+               compatible = "samsung,exynos-sysmmu";
+               interrupt-parent = <&combiner>;
+               reg = <0x12220000 0x1000>;
+               interrupts = <5 3>;
+               clock-names = "sysmmu", "master";
+               clocks = <&clock CLK_SMMU_FIMD1>, <&clock CLK_FIMD1>;
+               power-domains = <&pd_lcd1>;
+               #iommu-cells = <0>;
+       };
+};
+
+&gic {
+       cpu-offset = <0x8000>;
+};
+
+&combiner {
+       samsung,combiner-nr = <16>;
+       interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
+                    <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
+                    <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
+                    <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>;
+};
+
+&pmu_system_controller {
+       clock-names = "clkout0", "clkout1", "clkout2", "clkout3",
+                       "clkout4", "clkout8", "clkout9";
+       clocks = <&clock CLK_OUT_DMC>, <&clock CLK_OUT_TOP>,
+               <&clock CLK_OUT_LEFTBUS>, <&clock CLK_OUT_RIGHTBUS>,
+               <&clock CLK_OUT_CPU>, <&clock CLK_XXTI>, <&clock CLK_XUSBXTI>;
+       #clock-cells = <1>;
 };