/* * Universal Flash Storage Host controller driver * * This code is based on drivers/scsi/ufs/ufshcd.h * Copyright (C) 2011-2013 Samsung India Software Operations * * Authors: * Santosh Yaraganavi * Vinayak Holikatti * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 * of the License, or (at your option) any later version. * See the COPYING file in the top-level directory or visit * * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * This program is provided "AS IS" and "WITH ALL FAULTS" and * without warranty of any kind. You are solely responsible for * determining the appropriateness of using and distributing * the program and assume all risks associated with your exercise * of rights with respect to the program, including but not limited * to infringement of third party rights, the risks and costs of * program errors, damage to or loss of data, programs or equipment, * and unavailability or interruption of operations. Under no * circumstances will the contributor of this Program be liable for * any damages of any kind arising from your use or distribution of * this program. */ #ifndef _UFSHCD_H #define _UFSHCD_H #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "ufs.h" #include "ufshci.h" #define UFSHCD "ufshcd" #define UFSHCD_DRIVER_VERSION "0.2" struct ufs_hba; enum dev_cmd_type { DEV_CMD_TYPE_NOP = 0x0, DEV_CMD_TYPE_QUERY = 0x1, }; /** * struct uic_command - UIC command structure * @command: UIC command * @argument1: UIC command argument 1 * @argument2: UIC command argument 2 * @argument3: UIC command argument 3 * @cmd_active: Indicate if UIC command is outstanding * @result: UIC command result * @done: UIC command completion */ struct uic_command { u32 command; u32 argument1; u32 argument2; u32 argument3; int cmd_active; int result; struct completion done; }; /* Used to differentiate the power management options */ enum ufs_pm_op { UFS_RUNTIME_PM, UFS_SYSTEM_PM, UFS_SHUTDOWN_PM, }; #define ufshcd_is_runtime_pm(op) ((op) == UFS_RUNTIME_PM) #define ufshcd_is_system_pm(op) ((op) == UFS_SYSTEM_PM) #define ufshcd_is_shutdown_pm(op) ((op) == UFS_SHUTDOWN_PM) /* Host <-> Device UniPro Link state */ enum uic_link_state { UIC_LINK_OFF_STATE = 0, /* Link powered down or disabled */ UIC_LINK_ACTIVE_STATE = 1, /* Link is in Fast/Slow/Sleep state */ UIC_LINK_HIBERN8_STATE = 2, /* Link is in Hibernate state */ }; #define ufshcd_is_link_off(hba) ((hba)->uic_link_state == UIC_LINK_OFF_STATE) #define ufshcd_is_link_active(hba) ((hba)->uic_link_state == \ UIC_LINK_ACTIVE_STATE) #define ufshcd_is_link_hibern8(hba) ((hba)->uic_link_state == \ UIC_LINK_HIBERN8_STATE) #define ufshcd_set_link_off(hba) ((hba)->uic_link_state = UIC_LINK_OFF_STATE) #define ufshcd_set_link_active(hba) ((hba)->uic_link_state = \ UIC_LINK_ACTIVE_STATE) #define ufshcd_set_link_hibern8(hba) ((hba)->uic_link_state = \ UIC_LINK_HIBERN8_STATE) /* * UFS Power management levels. * Each level is in increasing order of power savings. */ enum ufs_pm_level { UFS_PM_LVL_0, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE */ UFS_PM_LVL_1, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE */ UFS_PM_LVL_2, /* UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE */ UFS_PM_LVL_3, /* UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE */ UFS_PM_LVL_4, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE */ UFS_PM_LVL_5, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE */ UFS_PM_LVL_MAX }; struct ufs_pm_lvl_states { enum ufs_dev_pwr_mode dev_state; enum uic_link_state link_state; }; /** * struct ufshcd_lrb - local reference block * @utr_descriptor_ptr: UTRD address of the command * @ucd_req_ptr: UCD address of the command * @ucd_rsp_ptr: Response UPIU address for this command * @ucd_prdt_ptr: PRDT address of the command * @cmd: pointer to SCSI command * @sense_buffer: pointer to sense buffer address of the SCSI command * @sense_bufflen: Length of the sense buffer * @scsi_status: SCSI status of the command * @command_type: SCSI, UFS, Query. * @task_tag: Task tag of the command * @lun: LUN of the command * @intr_cmd: Interrupt command (doesn't participate in interrupt aggregation) */ struct ufshcd_lrb { struct utp_transfer_req_desc *utr_descriptor_ptr; struct utp_upiu_req *ucd_req_ptr; struct utp_upiu_rsp *ucd_rsp_ptr; struct ufshcd_sg_entry *ucd_prdt_ptr; struct scsi_cmnd *cmd; u8 *sense_buffer; unsigned int sense_bufflen; int scsi_status; int command_type; int task_tag; u8 lun; /* UPIU LUN id field is only 8-bit wide */ bool intr_cmd; }; /** * struct ufs_query - holds relevent data structures for query request * @request: request upiu and function * @descriptor: buffer for sending/receiving descriptor * @response: response upiu and response */ struct ufs_query { struct ufs_query_req request; u8 *descriptor; struct ufs_query_res response; }; /** * struct ufs_dev_cmd - all assosiated fields with device management commands * @type: device management command type - Query, NOP OUT * @lock: lock to allow one command at a time * @complete: internal commands completion * @tag_wq: wait queue until free command slot is available */ struct ufs_dev_cmd { enum dev_cmd_type type; struct mutex lock; struct completion *complete; wait_queue_head_t tag_wq; struct ufs_query query; }; /** * struct ufs_clk_info - UFS clock related info * @list: list headed by hba->clk_list_head * @clk: clock node * @name: clock name * @max_freq: maximum frequency supported by the clock * @min_freq: min frequency that can be used for clock scaling * @curr_freq: indicates the current frequency that it is set to * @enabled: variable to check against multiple enable/disable */ struct ufs_clk_info { struct list_head list; struct clk *clk; const char *name; u32 max_freq; u32 min_freq; u32 curr_freq; bool enabled; }; #define PRE_CHANGE 0 #define POST_CHANGE 1 struct ufs_pa_layer_attr { u32 gear_rx; u32 gear_tx; u32 lane_rx; u32 lane_tx; u32 pwr_rx; u32 pwr_tx; u32 hs_rate; }; struct ufs_pwr_mode_info { bool is_valid; struct ufs_pa_layer_attr info; }; /** * struct ufs_hba_variant_ops - variant specific callbacks * @name: variant name * @init: called when the driver is initialized * @exit: called to cleanup everything done in init * @clk_scale_notify: notifies that clks are scaled up/down * @setup_clocks: called before touching any of the controller registers * @setup_regulators: called before accessing the host controller * @hce_enable_notify: called before and after HCE enable bit is set to allow * variant specific Uni-Pro initialization. * @link_startup_notify: called before and after Link startup is carried out * to allow variant specific Uni-Pro initialization. * @pwr_change_notify: called before and after a power mode change * is carried out to allow vendor spesific capabilities * to be set. * @suspend: called during host controller PM callback * @resume: called during host controller PM callback */ struct ufs_hba_variant_ops { const char *name; int (*init)(struct ufs_hba *); void (*exit)(struct ufs_hba *); void (*clk_scale_notify)(struct ufs_hba *); int (*setup_clocks)(struct ufs_hba *, bool); int (*setup_regulators)(struct ufs_hba *, bool); int (*hce_enable_notify)(struct ufs_hba *, bool); int (*link_startup_notify)(struct ufs_hba *, bool); int (*pwr_change_notify)(struct ufs_hba *, bool, struct ufs_pa_layer_attr *, struct ufs_pa_layer_attr *); int (*suspend)(struct ufs_hba *, enum ufs_pm_op); int (*resume)(struct ufs_hba *, enum ufs_pm_op); }; /* clock gating state */ enum clk_gating_state { CLKS_OFF, CLKS_ON, REQ_CLKS_OFF, REQ_CLKS_ON, }; /** * struct ufs_clk_gating - UFS clock gating related info * @gate_work: worker to turn off clocks after some delay as specified in * delay_ms * @ungate_work: worker to turn on clocks that will be used in case of * interrupt context * @state: the current clocks state * @delay_ms: gating delay in ms * @is_suspended: clk gating is suspended when set to 1 which can be used * during suspend/resume * @delay_attr: sysfs attribute to control delay_attr * @active_reqs: number of requests that are pending and should be waited for * completion before gating clocks. */ struct ufs_clk_gating { struct delayed_work gate_work; struct work_struct ungate_work; enum clk_gating_state state; unsigned long delay_ms; bool is_suspended; struct device_attribute delay_attr; int active_reqs; }; struct ufs_clk_scaling { ktime_t busy_start_t; bool is_busy_started; unsigned long tot_busy_t; unsigned long window_start_t; }; /** * struct ufs_init_prefetch - contains data that is pre-fetched once during * initialization * @icc_level: icc level which was read during initialization */ struct ufs_init_prefetch { u32 icc_level; }; /** * struct ufs_hba - per adapter private structure * @mmio_base: UFSHCI base register address * @ucdl_base_addr: UFS Command Descriptor base address * @utrdl_base_addr: UTP Transfer Request Descriptor base address * @utmrdl_base_addr: UTP Task Management Descriptor base address * @ucdl_dma_addr: UFS Command Descriptor DMA address * @utrdl_dma_addr: UTRDL DMA address * @utmrdl_dma_addr: UTMRDL DMA address * @host: Scsi_Host instance of the driver * @dev: device handle * @lrb: local reference block * @lrb_in_use: lrb in use * @outstanding_tasks: Bits representing outstanding task requests * @outstanding_reqs: Bits representing outstanding transfer requests * @capabilities: UFS Controller Capabilities * @nutrs: Transfer Request Queue depth supported by controller * @nutmrs: Task Management Queue depth supported by controller * @ufs_version: UFS Version to which controller complies * @vops: pointer to variant specific operations * @priv: pointer to variant specific private data * @irq: Irq number of the controller * @active_uic_cmd: handle of active UIC command * @uic_cmd_mutex: mutex for uic command * @tm_wq: wait queue for task management * @tm_tag_wq: wait queue for free task management slots * @tm_slots_in_use: bit map of task management request slots in use * @pwr_done: completion for power mode change * @tm_condition: condition variable for task management * @ufshcd_state: UFSHCD states * @eh_flags: Error handling flags * @intr_mask: Interrupt Mask Bits * @ee_ctrl_mask: Exception event control mask * @is_powered: flag to check if HBA is powered * @is_init_prefetch: flag to check if data was pre-fetched in initialization * @init_prefetch_data: data pre-fetched during initialization * @eh_work: Worker to handle UFS errors that require s/w attention * @eeh_work: Worker to handle exception events * @errors: HBA errors * @uic_error: UFS interconnect layer error status * @saved_err: sticky error mask * @saved_uic_err: sticky UIC error mask * @dev_cmd: ufs device management command information * @last_dme_cmd_tstamp: time stamp of the last completed DME command * @auto_bkops_enabled: to track whether bkops is enabled in device * @vreg_info: UFS device voltage regulator information * @clk_list_head: UFS host controller clocks list node head * @pwr_info: holds current power mode * @max_pwr_info: keeps the device max valid pwm */ struct ufs_hba { void __iomem *mmio_base; /* Virtual memory reference */ struct utp_transfer_cmd_desc *ucdl_base_addr; struct utp_transfer_req_desc *utrdl_base_addr; struct utp_task_req_desc *utmrdl_base_addr; /* DMA memory reference */ dma_addr_t ucdl_dma_addr; dma_addr_t utrdl_dma_addr; dma_addr_t utmrdl_dma_addr; struct Scsi_Host *host; struct device *dev; /* * This field is to keep a reference to "scsi_device" corresponding to * "UFS device" W-LU. */ struct scsi_device *sdev_ufs_device; enum ufs_dev_pwr_mode curr_dev_pwr_mode; enum uic_link_state uic_link_state; /* Desired UFS power management level during runtime PM */ enum ufs_pm_level rpm_lvl; /* Desired UFS power management level during system PM */ enum ufs_pm_level spm_lvl; int pm_op_in_progress; struct ufshcd_lrb *lrb; unsigned long lrb_in_use; unsigned long outstanding_tasks; unsigned long outstanding_reqs; u32 capabilities; int nutrs; int nutmrs; u32 ufs_version; struct ufs_hba_variant_ops *vops; void *priv; unsigned int irq; bool is_irq_enabled; /* * delay before each dme command is required as the unipro * layer has shown instabilities */ #define UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS UFS_BIT(0) unsigned int quirks; /* Deviations from standard UFSHCI spec. */ wait_queue_head_t tm_wq; wait_queue_head_t tm_tag_wq; unsigned long tm_condition; unsigned long tm_slots_in_use; struct uic_command *active_uic_cmd; struct mutex uic_cmd_mutex; struct completion *uic_async_done; u32 ufshcd_state; u32 eh_flags; u32 intr_mask; u16 ee_ctrl_mask; bool is_powered; bool is_init_prefetch; struct ufs_init_prefetch init_prefetch_data; /* Work Queues */ struct work_struct eh_work; struct work_struct eeh_work; /* HBA Errors */ u32 errors; u32 uic_error; u32 saved_err; u32 saved_uic_err; /* Device management request data */ struct ufs_dev_cmd dev_cmd; ktime_t last_dme_cmd_tstamp; /* Keeps information of the UFS device connected to this host */ struct ufs_dev_info dev_info; bool auto_bkops_enabled; struct ufs_vreg_info vreg_info; struct list_head clk_list_head; bool wlun_dev_clr_ua; struct ufs_pa_layer_attr pwr_info; struct ufs_pwr_mode_info max_pwr_info; struct ufs_clk_gating clk_gating; /* Control to enable/disable host capabilities */ u32 caps; /* Allow dynamic clk gating */ #define UFSHCD_CAP_CLK_GATING (1 << 0) /* Allow hiberb8 with clk gating */ #define UFSHCD_CAP_HIBERN8_WITH_CLK_GATING (1 << 1) /* Allow dynamic clk scaling */ #define UFSHCD_CAP_CLK_SCALING (1 << 2) /* Allow auto bkops to enabled during runtime suspend */ #define UFSHCD_CAP_AUTO_BKOPS_SUSPEND (1 << 3) struct devfreq *devfreq; struct ufs_clk_scaling clk_scaling; bool is_sys_suspended; }; /* Returns true if clocks can be gated. Otherwise false */ static inline bool ufshcd_is_clkgating_allowed(struct ufs_hba *hba) { return hba->caps & UFSHCD_CAP_CLK_GATING; } static inline bool ufshcd_can_hibern8_during_gating(struct ufs_hba *hba) { return hba->caps & UFSHCD_CAP_HIBERN8_WITH_CLK_GATING; } static inline int ufshcd_is_clkscaling_enabled(struct ufs_hba *hba) { return hba->caps & UFSHCD_CAP_CLK_SCALING; } static inline bool ufshcd_can_autobkops_during_suspend(struct ufs_hba *hba) { return hba->caps & UFSHCD_CAP_AUTO_BKOPS_SUSPEND; } #define ufshcd_writel(hba, val, reg) \ writel((val), (hba)->mmio_base + (reg)) #define ufshcd_readl(hba, reg) \ readl((hba)->mmio_base + (reg)) /** * ufshcd_rmwl - read modify write into a register * @hba - per adapter instance * @mask - mask to apply on read value * @val - actual value to write * @reg - register address */ static inline void ufshcd_rmwl(struct ufs_hba *hba, u32 mask, u32 val, u32 reg) { u32 tmp; tmp = ufshcd_readl(hba, reg); tmp &= ~mask; tmp |= (val & mask); ufshcd_writel(hba, tmp, reg); } int ufshcd_alloc_host(struct device *, struct ufs_hba **); int ufshcd_init(struct ufs_hba * , void __iomem * , unsigned int); void ufshcd_remove(struct ufs_hba *); /** * ufshcd_hba_stop - Send controller to reset state * @hba: per adapter instance */ static inline void ufshcd_hba_stop(struct ufs_hba *hba) { ufshcd_writel(hba, CONTROLLER_DISABLE, REG_CONTROLLER_ENABLE); } static inline void check_upiu_size(void) { BUILD_BUG_ON(ALIGNED_UPIU_SIZE < GENERAL_UPIU_REQUEST_SIZE + QUERY_DESC_MAX_SIZE); } extern int ufshcd_runtime_suspend(struct ufs_hba *hba); extern int ufshcd_runtime_resume(struct ufs_hba *hba); extern int ufshcd_runtime_idle(struct ufs_hba *hba); extern int ufshcd_system_suspend(struct ufs_hba *hba); extern int ufshcd_system_resume(struct ufs_hba *hba); extern int ufshcd_shutdown(struct ufs_hba *hba); extern int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel, u8 attr_set, u32 mib_val, u8 peer); extern int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel, u32 *mib_val, u8 peer); /* UIC command interfaces for DME primitives */ #define DME_LOCAL 0 #define DME_PEER 1 #define ATTR_SET_NOR 0 /* NORMAL */ #define ATTR_SET_ST 1 /* STATIC */ static inline int ufshcd_dme_set(struct ufs_hba *hba, u32 attr_sel, u32 mib_val) { return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR, mib_val, DME_LOCAL); } static inline int ufshcd_dme_st_set(struct ufs_hba *hba, u32 attr_sel, u32 mib_val) { return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST, mib_val, DME_LOCAL); } static inline int ufshcd_dme_peer_set(struct ufs_hba *hba, u32 attr_sel, u32 mib_val) { return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR, mib_val, DME_PEER); } static inline int ufshcd_dme_peer_st_set(struct ufs_hba *hba, u32 attr_sel, u32 mib_val) { return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST, mib_val, DME_PEER); } static inline int ufshcd_dme_get(struct ufs_hba *hba, u32 attr_sel, u32 *mib_val) { return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_LOCAL); } static inline int ufshcd_dme_peer_get(struct ufs_hba *hba, u32 attr_sel, u32 *mib_val) { return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_PEER); } int ufshcd_hold(struct ufs_hba *hba, bool async); void ufshcd_release(struct ufs_hba *hba); #endif /* End of Header */