X-Git-Url: https://gerrit.opnfv.org/gerrit/gitweb?a=blobdiff_plain;f=qemu%2Froms%2Fu-boot%2Fboard%2Fgaisler%2Fgr_ep2s60%2Fu-boot.lds;fp=qemu%2Froms%2Fu-boot%2Fboard%2Fgaisler%2Fgr_ep2s60%2Fu-boot.lds;h=973603c7cc934abffe64a540fcd60449fb58f00f;hb=e44e3482bdb4d0ebde2d8b41830ac2cdb07948fb;hp=0000000000000000000000000000000000000000;hpb=9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00;p=kvmfornfv.git

diff --git a/qemu/roms/u-boot/board/gaisler/gr_ep2s60/u-boot.lds b/qemu/roms/u-boot/board/gaisler/gr_ep2s60/u-boot.lds
new file mode 100644
index 000000000..973603c7c
--- /dev/null
+++ b/qemu/roms/u-boot/board/gaisler/gr_ep2s60/u-boot.lds
@@ -0,0 +1,143 @@
+/*
+ * Linker script for Gaisler Research AB's Template design
+ * for Altera NIOS Development board Stratix II Edition, EP2S60 FPGA.
+ *
+ * (C) Copyright 2008
+ * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+OUTPUT_FORMAT("elf32-sparc", "elf32-sparc", "elf32-sparc")
+OUTPUT_ARCH(sparc)
+ENTRY(_start)
+SECTIONS
+{
+
+/* Read-only sections, merged into text segment: */
+	. = + SIZEOF_HEADERS;
+	.interp : { *(.interp) }
+	.hash          : { *(.hash)		}
+	.dynsym        : { *(.dynsym)		}
+	.dynstr        : { *(.dynstr)		}
+	.rel.text      : { *(.rel.text)		}
+	.rela.text     : { *(.rela.text)	}
+	.rel.data      : { *(.rel.data)		}
+	.rela.data     : { *(.rela.data)	}
+	.rel.rodata    : { *(.rel.rodata)	}
+	.rela.rodata   : { *(.rela.rodata)	}
+	.rel.got       : { *(.rel.got)		}
+	.rela.got      : { *(.rela.got)		}
+	.rel.ctors     : { *(.rel.ctors)	}
+	.rela.ctors    : { *(.rela.ctors)	}
+	.rel.dtors     : { *(.rel.dtors)	}
+	.rela.dtors    : { *(.rela.dtors)	}
+	.rel.bss       : { *(.rel.bss)		}
+	.rela.bss      : { *(.rela.bss)		}
+	.rel.plt       : { *(.rel.plt)		}
+	.rela.plt      : { *(.rela.plt)		}
+	.init          : { *(.init)		}
+	.plt : { *(.plt) }
+
+	.text : {
+		_load_addr = .;
+		_text = .;
+
+		*(.start)
+		arch/sparc/cpu/leon3/start.o (.text)
+/* 8k is the same as the PROM offset from end of main memory, (CONFIG_SYS_PROM_SIZE) */
+		. = ALIGN(8192);
+/* PROM CODE, Will be relocated to the end of memory,
+ * no global data accesses please.
+ */
+		__prom_start = .;
+		*(.prom.pgt)
+		*(.prom.data)
+		*(.prom.text)
+		. = ALIGN(16);
+		__prom_end = .;
+		*(.text)
+		*(.fixup)
+		*(.gnu.warning)
+/*		*(.got1)*/
+		. = ALIGN(16);
+		*(.eh_frame)
+		*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
+	}
+	. = ALIGN(4);
+	_etext = .;
+
+	/* CMD Table */
+
+
+	. = ALIGN(4);
+	.u_boot_list : {
+		KEEP(*(SORT(.u_boot_list*)));
+	}
+
+	.data	:
+	{
+		*(.data)
+		*(.data1)
+		*(.data.rel)
+		*(.data.rel.*)
+		*(.sdata)
+		*(.sdata2)
+		*(.dynamic)
+		CONSTRUCTORS
+	}
+	_edata	=	.;
+	PROVIDE (edata = .);
+
+	. = ALIGN(4);
+	__got_start = .;
+	.got : {
+		*(.got)
+/*		*(.data.rel)
+		*(.data.rel.local)*/
+		. = ALIGN(16);
+	}
+	__got_end = .;
+
+/*	.data.rel : { } */
+
+	. = ALIGN(4096);
+	__init_begin = .;
+	.text.init : { *(.text.init) }
+	.data.init : { *(.data.init) }
+	. = ALIGN(4096);
+	__init_end = .;
+
+	__bss_start = .;
+	.bss		:
+	{
+	 *(.sbss) *(.scommon)
+	 *(.dynbss)
+	 *(.bss)
+	 *(COMMON)
+	. = ALIGN(16); /* to speed clearing of bss up */
+	}
+	__bss_end = . ;
+	__bss_end = . ;
+	PROVIDE (end = .);
+
+/* Relocated into main memory */
+
+	/* Start of main memory */
+	/*. = 0x40000000;*/
+
+	.stack (NOLOAD)	: { *(.stack) }
+
+	/* PROM CODE */
+
+	/* global data in RAM passed to kernel after booting */
+
+  .stab 0		: { *(.stab) }
+  .stabstr 0		: { *(.stabstr) }
+  .stab.excl 0		: { *(.stab.excl) }
+  .stab.exclstr 0	: { *(.stab.exclstr) }
+  .stab.index 0		: { *(.stab.index) }
+  .stab.indexstr 0	: { *(.stab.indexstr) }
+  .comment 0		: { *(.comment) }
+
+}