X-Git-Url: https://gerrit.opnfv.org/gerrit/gitweb?a=blobdiff_plain;f=qemu%2Froms%2Fu-boot%2Fboard%2Ffreescale%2Fp2020come%2Fddr.c;fp=qemu%2Froms%2Fu-boot%2Fboard%2Ffreescale%2Fp2020come%2Fddr.c;h=b642e1255ca3141def00e73569b14caf5fffdf33;hb=e44e3482bdb4d0ebde2d8b41830ac2cdb07948fb;hp=0000000000000000000000000000000000000000;hpb=9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00;p=kvmfornfv.git diff --git a/qemu/roms/u-boot/board/freescale/p2020come/ddr.c b/qemu/roms/u-boot/board/freescale/p2020come/ddr.c new file mode 100644 index 000000000..b642e1255 --- /dev/null +++ b/qemu/roms/u-boot/board/freescale/p2020come/ddr.c @@ -0,0 +1,29 @@ +/* + * Copyright 2009, 2011 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#include + +#include +#include + +void fsl_ddr_board_options(memctl_options_t *popts, + dimm_params_t *pdimm, + unsigned int ctrl_num) +{ + if (ctrl_num) { + printf("Wrong parameter for controller number %d", ctrl_num); + return; + } + + if (!pdimm->n_ranks) + return; + + /* + * Set DDR_SDRAM_CLK_CNTL = 0x02800000 + * + * Clock is launched 5/8 applied cycle after address/command + */ + popts->clk_adjust = 5; +}