X-Git-Url: https://gerrit.opnfv.org/gerrit/gitweb?a=blobdiff_plain;f=qemu%2Froms%2Fu-boot%2Farch%2Farm%2Finclude%2Fasm%2Farch-omap3%2Fsys_proto.h;fp=qemu%2Froms%2Fu-boot%2Farch%2Farm%2Finclude%2Fasm%2Farch-omap3%2Fsys_proto.h;h=5866bf23e8d2a003515cf0e1637c1c27e2e66a40;hb=e44e3482bdb4d0ebde2d8b41830ac2cdb07948fb;hp=0000000000000000000000000000000000000000;hpb=9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00;p=kvmfornfv.git diff --git a/qemu/roms/u-boot/arch/arm/include/asm/arch-omap3/sys_proto.h b/qemu/roms/u-boot/arch/arm/include/asm/arch-omap3/sys_proto.h new file mode 100644 index 000000000..5866bf23e --- /dev/null +++ b/qemu/roms/u-boot/arch/arm/include/asm/arch-omap3/sys_proto.h @@ -0,0 +1,76 @@ +/* + * (C) Copyright 2004-2008 + * Texas Instruments, + * Richard Woodruff + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#ifndef _SYS_PROTO_H_ +#define _SYS_PROTO_H_ +#include +#include + +typedef struct { + u32 mtype; + char *board_string; + char *nand_string; +} omap3_sysinfo; + +struct emu_hal_params { + u32 num_params; + u32 param1; +}; + +/* Board SDRC timing values */ +struct board_sdrc_timings { + u32 mcfg; + u32 ctrla; + u32 ctrlb; + u32 rfr_ctrl; + u32 mr; +}; + +void prcm_init(void); +void per_clocks_enable(void); +void ehci_clocks_enable(void); + +void memif_init(void); +void sdrc_init(void); +void do_sdrc_init(u32, u32); + +void get_board_mem_timings(struct board_sdrc_timings *timings); +void identify_nand_chip(int *mfr, int *id); +void emif4_init(void); +void gpmc_init(void); +void enable_gpmc_cs_config(const u32 *gpmc_config, struct gpmc_cs *cs, u32 base, + u32 size); + +void watchdog_init(void); +void set_muxconf_regs(void); + +u32 get_cpu_family(void); +u32 get_cpu_rev(void); +u32 get_sku_id(void); +u32 get_sysboot_value(void); +u32 is_gpmc_muxed(void); +u32 get_gpmc0_type(void); +u32 get_gpmc0_width(void); +u32 is_running_in_sdram(void); +u32 is_running_in_sram(void); +u32 is_running_in_flash(void); +u32 get_device_type(void); +void secureworld_exit(void); +void try_unlock_memory(void); +u32 get_boot_type(void); +void invalidate_dcache(u32); +u32 wait_on_value(u32, u32, void *, u32); +void sdelay(unsigned long); +void make_cs1_contiguous(void); +void omap_nand_switch_ecc(uint32_t, uint32_t); +void power_init_r(void); +void dieid_num_r(void); +void get_dieid(u32 *id); +void do_omap3_emu_romcode_call(u32 service_id, u32 parameters); +void omap3_gp_romcode_call(u32 service_id, u32 parameter); +u32 warm_reset(void); +#endif