X-Git-Url: https://gerrit.opnfv.org/gerrit/gitweb?a=blobdiff_plain;f=qemu%2Froms%2Fopenbios%2Finclude%2Farch%2Famd64%2Fpci.h;fp=qemu%2Froms%2Fopenbios%2Finclude%2Farch%2Famd64%2Fpci.h;h=3e88e150be81b38b98e3d938103d72da79c30e3f;hb=e44e3482bdb4d0ebde2d8b41830ac2cdb07948fb;hp=0000000000000000000000000000000000000000;hpb=9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00;p=kvmfornfv.git

diff --git a/qemu/roms/openbios/include/arch/amd64/pci.h b/qemu/roms/openbios/include/arch/amd64/pci.h
new file mode 100644
index 000000000..3e88e150b
--- /dev/null
+++ b/qemu/roms/openbios/include/arch/amd64/pci.h
@@ -0,0 +1,66 @@
+#ifndef AMD64_PCI_H
+#define AMD64_PCI_H
+
+#include "asm/io.h"
+
+#if !(defined(PCI_CONFIG_1) || defined(PCI_CONFIG_2))
+#define PCI_CONFIG_1 1 /* default */
+#endif
+
+#ifdef PCI_CONFIG_1
+
+/* PCI Configuration Mechanism #1 */
+
+/* Have pci_addr in the same format as the values written to 0xcf8
+ * so register accesses can be made easy. */
+#define PCI_ADDR(bus, dev, fn) \
+    ((pci_addr) (0x80000000u \
+		| (uint32_t) (bus) << 16 \
+		| (uint32_t) (dev) << 11 \
+		| (uint32_t) (fn) << 8))
+
+#define PCI_BUS(pcidev) ((uint8_t) ((pcidev) >> 16))
+#define PCI_DEV(pcidev) ((uint8_t) ((pcidev) >> 11) & 0x1f)
+#define PCI_FN(pcidev) ((uint8_t) ((pcidev) >> 8) & 7)
+
+static inline uint8_t pci_config_read8(pci_addr dev, uint8_t reg)
+{
+    outl(dev | (reg & ~3), 0xcf8);
+    return inb(0xcfc | (reg & 3));
+}
+
+static inline uint16_t pci_config_read16(pci_addr dev, uint8_t reg)
+{
+    outl(dev | (reg & ~3), 0xcf8);
+    return inw(0xcfc | (reg & 2));
+}
+
+static inline uint32_t pci_config_read32(pci_addr dev, uint8_t reg)
+{
+    outl(dev | reg, 0xcf8);
+    return inl(0xcfc | reg);
+}
+
+static inline void pci_config_write8(pci_addr dev, uint8_t reg, uint8_t val)
+{
+    outl(dev | (reg & ~3), 0xcf8);
+    outb(val, 0xcfc | (reg & 3));
+}
+
+static inline void pci_config_write16(pci_addr dev, uint8_t reg, uint16_t val)
+{
+    outl(dev | (reg & ~3), 0xcf8);
+    outw(val, 0xcfc | (reg & 2));
+}
+
+static inline void pci_config_write32(pci_addr dev, uint8_t reg, uint32_t val)
+{
+    outl(dev | reg, 0xcf8);
+    outl(val, 0xcfc);
+}
+
+#else /* !PCI_CONFIG_1 */
+#error PCI Configuration Mechanism is not specified or implemented
+#endif
+
+#endif /* AMD64_PCI_H */