X-Git-Url: https://gerrit.opnfv.org/gerrit/gitweb?a=blobdiff_plain;f=kernel%2Fdrivers%2Fpinctrl%2Fsamsung%2Fpinctrl-s3c64xx.c;fp=kernel%2Fdrivers%2Fpinctrl%2Fsamsung%2Fpinctrl-s3c64xx.c;h=43407ab248f5121d0ca5625112592a32a9f1a968;hb=e09b41010ba33a20a87472ee821fa407a5b8da36;hp=7756c1e9e76313565d23431fd807278fa70b0246;hpb=f93b97fd65072de626c074dbe099a1fff05ce060;p=kvmfornfv.git diff --git a/kernel/drivers/pinctrl/samsung/pinctrl-s3c64xx.c b/kernel/drivers/pinctrl/samsung/pinctrl-s3c64xx.c index 7756c1e9e..43407ab24 100644 --- a/kernel/drivers/pinctrl/samsung/pinctrl-s3c64xx.c +++ b/kernel/drivers/pinctrl/samsung/pinctrl-s3c64xx.c @@ -260,13 +260,13 @@ static int s3c64xx_irq_get_trigger(unsigned int type) return trigger; } -static void s3c64xx_irq_set_handler(unsigned int irq, unsigned int type) +static void s3c64xx_irq_set_handler(struct irq_data *d, unsigned int type) { /* Edge- and level-triggered interrupts need different handlers */ if (type & IRQ_TYPE_EDGE_BOTH) - __irq_set_handler_locked(irq, handle_edge_irq); + irq_set_handler_locked(d, handle_edge_irq); else - __irq_set_handler_locked(irq, handle_level_irq); + irq_set_handler_locked(d, handle_level_irq); } static void s3c64xx_irq_set_function(struct samsung_pinctrl_drv_data *d, @@ -356,7 +356,7 @@ static int s3c64xx_gpio_irq_set_type(struct irq_data *irqd, unsigned int type) return -EINVAL; } - s3c64xx_irq_set_handler(irqd->irq, type); + s3c64xx_irq_set_handler(irqd, type); /* Set up interrupt trigger */ reg = d->virt_base + EINTCON_REG(bank->eint_offset); @@ -395,7 +395,6 @@ static int s3c64xx_gpio_irq_map(struct irq_domain *h, unsigned int virq, irq_set_chip_and_handler(virq, &s3c64xx_gpio_irq_chip, handle_level_irq); irq_set_chip_data(virq, bank); - set_irq_flags(virq, IRQF_VALID); return 0; } @@ -408,10 +407,10 @@ static const struct irq_domain_ops s3c64xx_gpio_irqd_ops = { .xlate = irq_domain_xlate_twocell, }; -static void s3c64xx_eint_gpio_irq(unsigned int irq, struct irq_desc *desc) +static void s3c64xx_eint_gpio_irq(struct irq_desc *desc) { - struct irq_chip *chip = irq_get_chip(irq); - struct s3c64xx_eint_gpio_data *data = irq_get_handler_data(irq); + struct irq_chip *chip = irq_desc_get_chip(desc); + struct s3c64xx_eint_gpio_data *data = irq_desc_get_handler_data(desc); struct samsung_pinctrl_drv_data *drvdata = data->drvdata; chained_irq_enter(chip, desc); @@ -506,8 +505,7 @@ static int s3c64xx_eint_gpio_init(struct samsung_pinctrl_drv_data *d) data->domains[nr_domains++] = bank->irq_domain; } - irq_set_chained_handler(d->irq, s3c64xx_eint_gpio_irq); - irq_set_handler_data(d->irq, data); + irq_set_chained_handler_and_data(d->irq, s3c64xx_eint_gpio_irq, data); return 0; } @@ -568,7 +566,7 @@ static int s3c64xx_eint0_irq_set_type(struct irq_data *irqd, unsigned int type) return -EINVAL; } - s3c64xx_irq_set_handler(irqd->irq, type); + s3c64xx_irq_set_handler(irqd, type); /* Set up interrupt trigger */ reg = d->virt_base + EINT0CON0_REG; @@ -600,11 +598,10 @@ static struct irq_chip s3c64xx_eint0_irq_chip = { .irq_set_type = s3c64xx_eint0_irq_set_type, }; -static inline void s3c64xx_irq_demux_eint(unsigned int irq, - struct irq_desc *desc, u32 range) +static inline void s3c64xx_irq_demux_eint(struct irq_desc *desc, u32 range) { - struct irq_chip *chip = irq_get_chip(irq); - struct s3c64xx_eint0_data *data = irq_get_handler_data(irq); + struct irq_chip *chip = irq_desc_get_chip(desc); + struct s3c64xx_eint0_data *data = irq_desc_get_handler_data(desc); struct samsung_pinctrl_drv_data *drvdata = data->drvdata; unsigned int pend, mask; @@ -617,11 +614,10 @@ static inline void s3c64xx_irq_demux_eint(unsigned int irq, pend &= range; while (pend) { - unsigned int virq; + unsigned int virq, irq; irq = fls(pend) - 1; pend &= ~(1 << irq); - virq = irq_linear_revmap(data->domains[irq], data->pins[irq]); /* * Something must be really wrong if an unmapped EINT @@ -635,24 +631,24 @@ static inline void s3c64xx_irq_demux_eint(unsigned int irq, chained_irq_exit(chip, desc); } -static void s3c64xx_demux_eint0_3(unsigned int irq, struct irq_desc *desc) +static void s3c64xx_demux_eint0_3(struct irq_desc *desc) { - s3c64xx_irq_demux_eint(irq, desc, 0xf); + s3c64xx_irq_demux_eint(desc, 0xf); } -static void s3c64xx_demux_eint4_11(unsigned int irq, struct irq_desc *desc) +static void s3c64xx_demux_eint4_11(struct irq_desc *desc) { - s3c64xx_irq_demux_eint(irq, desc, 0xff0); + s3c64xx_irq_demux_eint(desc, 0xff0); } -static void s3c64xx_demux_eint12_19(unsigned int irq, struct irq_desc *desc) +static void s3c64xx_demux_eint12_19(struct irq_desc *desc) { - s3c64xx_irq_demux_eint(irq, desc, 0xff000); + s3c64xx_irq_demux_eint(desc, 0xff000); } -static void s3c64xx_demux_eint20_27(unsigned int irq, struct irq_desc *desc) +static void s3c64xx_demux_eint20_27(struct irq_desc *desc) { - s3c64xx_irq_demux_eint(irq, desc, 0xff00000); + s3c64xx_irq_demux_eint(desc, 0xff00000); } static irq_flow_handler_t s3c64xx_eint0_handlers[NUM_EINT0_IRQ] = { @@ -674,7 +670,6 @@ static int s3c64xx_eint0_irq_map(struct irq_domain *h, unsigned int virq, irq_set_chip_and_handler(virq, &s3c64xx_eint0_irq_chip, handle_level_irq); irq_set_chip_data(virq, ddata); - set_irq_flags(virq, IRQF_VALID); return 0; } @@ -731,8 +726,9 @@ static int s3c64xx_eint_eint0_init(struct samsung_pinctrl_drv_data *d) return -ENXIO; } - irq_set_chained_handler(irq, s3c64xx_eint0_handlers[i]); - irq_set_handler_data(irq, data); + irq_set_chained_handler_and_data(irq, + s3c64xx_eint0_handlers[i], + data); } bank = d->pin_banks;