X-Git-Url: https://gerrit.opnfv.org/gerrit/gitweb?a=blobdiff_plain;f=kernel%2Fdrivers%2Fclk%2Fhisilicon%2Fclk.c;fp=kernel%2Fdrivers%2Fclk%2Fhisilicon%2Fclk.c;h=9f8e76676553894ee08f4718b039c6dcaac4cfc5;hb=e09b41010ba33a20a87472ee821fa407a5b8da36;hp=a078e84f7b05629a4d27bb3a6cc5a945a1beac8e;hpb=f93b97fd65072de626c074dbe099a1fff05ce060;p=kvmfornfv.git diff --git a/kernel/drivers/clk/hisilicon/clk.c b/kernel/drivers/clk/hisilicon/clk.c index a078e84f7..9f8e76676 100644 --- a/kernel/drivers/clk/hisilicon/clk.c +++ b/kernel/drivers/clk/hisilicon/clk.c @@ -24,15 +24,14 @@ */ #include -#include #include +#include #include #include #include #include #include #include -#include #include "clk.h" @@ -45,14 +44,9 @@ struct hisi_clock_data __init *hisi_clk_init(struct device_node *np, struct clk **clk_table; void __iomem *base; - if (np) { - base = of_iomap(np, 0); - if (!base) { - pr_err("failed to map Hisilicon clock registers\n"); - goto err; - } - } else { - pr_err("failed to find Hisilicon clock node in DTS\n"); + base = of_iomap(np, 0); + if (!base) { + pr_err("%s: failed to map clock registers\n", __func__); goto err; } @@ -232,3 +226,32 @@ void __init hisi_clk_register_gate_sep(struct hisi_gate_clock *clks, data->clk_data.clks[clks[i].id] = clk; } } + +void __init hi6220_clk_register_divider(struct hi6220_divider_clock *clks, + int nums, struct hisi_clock_data *data) +{ + struct clk *clk; + void __iomem *base = data->base; + int i; + + for (i = 0; i < nums; i++) { + clk = hi6220_register_clkdiv(NULL, clks[i].name, + clks[i].parent_name, + clks[i].flags, + base + clks[i].offset, + clks[i].shift, + clks[i].width, + clks[i].mask_bit, + &hisi_clk_lock); + if (IS_ERR(clk)) { + pr_err("%s: failed to register clock %s\n", + __func__, clks[i].name); + continue; + } + + if (clks[i].alias) + clk_register_clkdev(clk, clks[i].alias, NULL); + + data->clk_data.clks[clks[i].id] = clk; + } +}