X-Git-Url: https://gerrit.opnfv.org/gerrit/gitweb?a=blobdiff_plain;f=kernel%2FDocumentation%2Fdevicetree%2Fbindings%2Fspi%2Fspi_atmel.txt;h=fb588b3e6a9a3de0bbe9223beef95372a18c7567;hb=e09b41010ba33a20a87472ee821fa407a5b8da36;hp=4f8184d069cb5a472058a59578101d7b70896367;hpb=9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00;p=kvmfornfv.git

diff --git a/kernel/Documentation/devicetree/bindings/spi/spi_atmel.txt b/kernel/Documentation/devicetree/bindings/spi/spi_atmel.txt
index 4f8184d06..fb588b3e6 100644
--- a/kernel/Documentation/devicetree/bindings/spi/spi_atmel.txt
+++ b/kernel/Documentation/devicetree/bindings/spi/spi_atmel.txt
@@ -4,11 +4,16 @@ Required properties:
 - compatible : should be "atmel,at91rm9200-spi".
 - reg: Address and length of the register set for the device
 - interrupts: Should contain spi interrupt
-- cs-gpios: chipselects
+- cs-gpios: chipselects (optional for SPI controller version >= 2 with the
+  Chip Select Active After Transfer feature).
 - clock-names: tuple listing input clock names.
 	Required elements: "spi_clk"
 - clocks: phandles to input clocks.
 
+Optional properties:
+- atmel,fifo-size: maximum number of data the RX and TX FIFOs can store for FIFO
+  capable SPI controllers.
+
 Example:
 
 spi1: spi@fffcc000 {
@@ -20,6 +25,7 @@ spi1: spi@fffcc000 {
 	clocks = <&spi1_clk>;
 	clock-names = "spi_clk";
 	cs-gpios = <&pioB 3 0>;
+	atmel,fifo-size = <32>;
 	status = "okay";
 
 	mmc-slot@0 {