X-Git-Url: https://gerrit.opnfv.org/gerrit/gitweb?a=blobdiff_plain;ds=sidebyside;f=kernel%2Farch%2Farm%2Fboot%2Fdts%2Fstih407-clock.dtsi;h=ad45f5e8fac7b6ed158fae7768b4bda550fff61a;hb=e09b41010ba33a20a87472ee821fa407a5b8da36;hp=e65744fc12ab0e293ae8d43ce1d05311f7216f10;hpb=f93b97fd65072de626c074dbe099a1fff05ce060;p=kvmfornfv.git

diff --git a/kernel/arch/arm/boot/dts/stih407-clock.dtsi b/kernel/arch/arm/boot/dts/stih407-clock.dtsi
index e65744fc1..ad45f5e8f 100644
--- a/kernel/arch/arm/boot/dts/stih407-clock.dtsi
+++ b/kernel/arch/arm/boot/dts/stih407-clock.dtsi
@@ -134,7 +134,7 @@
 
 			clk_s_c0_pll0: clk-s-c0-pll0 {
 				#clock-cells = <1>;
-				compatible = "st,stih407-plls-c32-c0_0", "st,clkgen-plls-c32";
+				compatible = "st,plls-c32-cx_0", "st,clkgen-plls-c32";
 
 				clocks = <&clk_sysin>;
 
@@ -143,7 +143,7 @@
 
 			clk_s_c0_pll1: clk-s-c0-pll1 {
 				#clock-cells = <1>;
-				compatible = "st,stih407-plls-c32-c0_1", "st,clkgen-plls-c32";
+				compatible = "st,plls-c32-cx_1", "st,clkgen-plls-c32";
 
 				clocks = <&clk_sysin>;