Add the rt linux 4.1.3-rt3 as base

[kvmfornfv.git] / kernel / drivers / net / ethernet / stmicro / stmmac / dwmac-sunxi.c

diff --git a/kernel/drivers/net/ethernet/stmicro/stmmac/dwmac-sunxi.c b/kernel/drivers/net/ethernet/stmicro/stmmac/dwmac-sunxi.c
new file mode 100644 (file)
index 0000000..c5ea9ab
--- /dev/null
+++ b/kernel/drivers/net/ethernet/stmicro/stmmac/dwmac-sunxi.c
@@ -0,0 +1,142 @@
+/*
+ * dwmac-sunxi.c - Allwinner sunxi DWMAC specific glue layer
+ *
+ * Copyright (C) 2013 Chen-Yu Tsai
+ *
+ * Chen-Yu Tsai  <wens@csie.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/stmmac.h>
+#include <linux/clk.h>
+#include <linux/phy.h>
+#include <linux/of_net.h>
+#include <linux/regulator/consumer.h>
+
+#include "stmmac_platform.h"
+
+struct sunxi_priv_data {
+       int interface;
+       int clk_enabled;
+       struct clk *tx_clk;
+       struct regulator *regulator;
+};
+
+static void *sun7i_gmac_setup(struct platform_device *pdev)
+{
+       struct sunxi_priv_data *gmac;
+       struct device *dev = &pdev->dev;
+
+       gmac = devm_kzalloc(dev, sizeof(*gmac), GFP_KERNEL);
+       if (!gmac)
+               return ERR_PTR(-ENOMEM);
+
+       gmac->interface = of_get_phy_mode(dev->of_node);
+
+       gmac->tx_clk = devm_clk_get(dev, "allwinner_gmac_tx");
+       if (IS_ERR(gmac->tx_clk)) {
+               dev_err(dev, "could not get tx clock\n");
+               return gmac->tx_clk;
+       }
+
+       /* Optional regulator for PHY */
+       gmac->regulator = devm_regulator_get_optional(dev, "phy");
+       if (IS_ERR(gmac->regulator)) {
+               if (PTR_ERR(gmac->regulator) == -EPROBE_DEFER)
+                       return ERR_PTR(-EPROBE_DEFER);
+               dev_info(dev, "no regulator found\n");
+               gmac->regulator = NULL;
+       }
+
+       return gmac;
+}
+
+#define SUN7I_GMAC_GMII_RGMII_RATE     125000000
+#define SUN7I_GMAC_MII_RATE            25000000
+
+static int sun7i_gmac_init(struct platform_device *pdev, void *priv)
+{
+       struct sunxi_priv_data *gmac = priv;
+       int ret;
+
+       if (gmac->regulator) {
+               ret = regulator_enable(gmac->regulator);
+               if (ret)
+                       return ret;
+       }
+
+       /* Set GMAC interface port mode
+        *
+        * The GMAC TX clock lines are configured by setting the clock
+        * rate, which then uses the auto-reparenting feature of the
+        * clock driver, and enabling/disabling the clock.
+        */
+       if (gmac->interface == PHY_INTERFACE_MODE_RGMII) {
+               clk_set_rate(gmac->tx_clk, SUN7I_GMAC_GMII_RGMII_RATE);
+               clk_prepare_enable(gmac->tx_clk);
+               gmac->clk_enabled = 1;
+       } else {
+               clk_set_rate(gmac->tx_clk, SUN7I_GMAC_MII_RATE);
+               clk_prepare(gmac->tx_clk);
+       }
+
+       return 0;
+}
+
+static void sun7i_gmac_exit(struct platform_device *pdev, void *priv)
+{
+       struct sunxi_priv_data *gmac = priv;
+
+       if (gmac->clk_enabled) {
+               clk_disable(gmac->tx_clk);
+               gmac->clk_enabled = 0;
+       }
+       clk_unprepare(gmac->tx_clk);
+
+       if (gmac->regulator)
+               regulator_disable(gmac->regulator);
+}
+
+static void sun7i_fix_speed(void *priv, unsigned int speed)
+{
+       struct sunxi_priv_data *gmac = priv;
+
+       /* only GMII mode requires us to reconfigure the clock lines */
+       if (gmac->interface != PHY_INTERFACE_MODE_GMII)
+               return;
+
+       if (gmac->clk_enabled) {
+               clk_disable(gmac->tx_clk);
+               gmac->clk_enabled = 0;
+       }
+       clk_unprepare(gmac->tx_clk);
+
+       if (speed == 1000) {
+               clk_set_rate(gmac->tx_clk, SUN7I_GMAC_GMII_RGMII_RATE);
+               clk_prepare_enable(gmac->tx_clk);
+               gmac->clk_enabled = 1;
+       } else {
+               clk_set_rate(gmac->tx_clk, SUN7I_GMAC_MII_RATE);
+               clk_prepare(gmac->tx_clk);
+       }
+}
+
+/* of_data specifying hardware features and callbacks.
+ * hardware features were copied from Allwinner drivers. */
+const struct stmmac_of_data sun7i_gmac_data = {
+       .has_gmac = 1,
+       .tx_coe = 1,
+       .fix_mac_speed = sun7i_fix_speed,
+       .setup = sun7i_gmac_setup,
+       .init = sun7i_gmac_init,
+       .exit = sun7i_gmac_exit,
+};