Add the rt linux 4.1.3-rt3 as base
[kvmfornfv.git] / kernel / drivers / gpu / drm / nouveau / nvkm / engine / gr / ctxgk20a.c
diff --git a/kernel/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk20a.c b/kernel/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk20a.c
new file mode 100644 (file)
index 0000000..2f241f6
--- /dev/null
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+#include "ctxgf100.h"
+
+static const struct gf100_gr_pack
+gk20a_grctx_pack_mthd[] = {
+       { gk104_grctx_init_a097_0, 0xa297 },
+       { gf100_grctx_init_902d_0, 0x902d },
+       {}
+};
+
+struct nvkm_oclass *
+gk20a_grctx_oclass = &(struct gf100_grctx_oclass) {
+       .base.handle = NV_ENGCTX(GR, 0xea),
+       .base.ofuncs = &(struct nvkm_ofuncs) {
+               .ctor = gf100_gr_context_ctor,
+               .dtor = gf100_gr_context_dtor,
+               .init = _nvkm_gr_context_init,
+               .fini = _nvkm_gr_context_fini,
+               .rd32 = _nvkm_gr_context_rd32,
+               .wr32 = _nvkm_gr_context_wr32,
+       },
+       .main  = gk104_grctx_generate_main,
+       .unkn  = gk104_grctx_generate_unkn,
+       .hub   = gk104_grctx_pack_hub,
+       .gpc   = gk104_grctx_pack_gpc,
+       .zcull = gf100_grctx_pack_zcull,
+       .tpc   = gk104_grctx_pack_tpc,
+       .ppc   = gk104_grctx_pack_ppc,
+       .icmd  = gk104_grctx_pack_icmd,
+       .mthd  = gk20a_grctx_pack_mthd,
+       .bundle = gk104_grctx_generate_bundle,
+       .bundle_size = 0x1800,
+       .bundle_min_gpm_fifo_depth = 0x62,
+       .bundle_token_limit = 0x100,
+       .pagepool = gk104_grctx_generate_pagepool,
+       .pagepool_size = 0x8000,
+       .attrib = gf117_grctx_generate_attrib,
+       .attrib_nr_max = 0x240,
+       .attrib_nr = 0x240,
+       .alpha_nr_max = 0x648 + (0x648 / 2),
+       .alpha_nr = 0x648,
+}.base;