These changes are the raw update to linux-4.4.6-rt14. Kernel sources

[kvmfornfv.git] / kernel / drivers / gpu / drm / nouveau / nvkm / engine / disp / piocgf119.c

diff --git a/kernel/drivers/gpu/drm/nouveau/nvkm/engine/disp/piocgf119.c b/kernel/drivers/gpu/drm/nouveau/nvkm/engine/disp/piocgf119.c
new file mode 100644 (file)
index 0000000..a625a98
--- /dev/null
+++ b/kernel/drivers/gpu/drm/nouveau/nvkm/engine/disp/piocgf119.c
@@ -0,0 +1,81 @@
+/*
+ * Copyright 2012 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+#include "channv50.h"
+#include "rootnv50.h"
+
+#include <subdev/timer.h>
+
+static void
+gf119_disp_pioc_fini(struct nv50_disp_chan *chan)
+{
+       struct nv50_disp *disp = chan->root->disp;
+       struct nvkm_subdev *subdev = &disp->base.engine.subdev;
+       struct nvkm_device *device = subdev->device;
+       int chid = chan->chid;
+
+       nvkm_mask(device, 0x610490 + (chid * 0x10), 0x00000001, 0x00000000);
+       if (nvkm_msec(device, 2000,
+               if (!(nvkm_rd32(device, 0x610490 + (chid * 0x10)) & 0x00030000))
+                       break;
+       ) < 0) {
+               nvkm_error(subdev, "ch %d fini: %08x\n", chid,
+                          nvkm_rd32(device, 0x610490 + (chid * 0x10)));
+       }
+
+       /* disable error reporting and completion notification */
+       nvkm_mask(device, 0x610090, 0x00000001 << chid, 0x00000000);
+       nvkm_mask(device, 0x6100a0, 0x00000001 << chid, 0x00000000);
+}
+
+static int
+gf119_disp_pioc_init(struct nv50_disp_chan *chan)
+{
+       struct nv50_disp *disp = chan->root->disp;
+       struct nvkm_subdev *subdev = &disp->base.engine.subdev;
+       struct nvkm_device *device = subdev->device;
+       int chid = chan->chid;
+
+       /* enable error reporting */
+       nvkm_mask(device, 0x6100a0, 0x00000001 << chid, 0x00000001 << chid);
+
+       /* activate channel */
+       nvkm_wr32(device, 0x610490 + (chid * 0x10), 0x00000001);
+       if (nvkm_msec(device, 2000,
+               u32 tmp = nvkm_rd32(device, 0x610490 + (chid * 0x10));
+               if ((tmp & 0x00030000) == 0x00010000)
+                       break;
+       ) < 0) {
+               nvkm_error(subdev, "ch %d init: %08x\n", chid,
+                          nvkm_rd32(device, 0x610490 + (chid * 0x10)));
+               return -EBUSY;
+       }
+
+       return 0;
+}
+
+const struct nv50_disp_chan_func
+gf119_disp_pioc_func = {
+       .init = gf119_disp_pioc_init,
+       .fini = gf119_disp_pioc_fini,
+};