Add the rt linux 4.1.3-rt3 as base

[kvmfornfv.git] / kernel / arch / powerpc / boot / dts / mpc8536ds.dts

diff --git a/kernel/arch/powerpc/boot/dts/mpc8536ds.dts b/kernel/arch/powerpc/boot/dts/mpc8536ds.dts
new file mode 100644 (file)
index 0000000..1973622
--- /dev/null
+++ b/kernel/arch/powerpc/boot/dts/mpc8536ds.dts
@@ -0,0 +1,109 @@
+/*
+ * MPC8536 DS Device Tree Source
+ *
+ * Copyright 2008, 2011 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+/include/ "fsl/mpc8536si-pre.dtsi"
+
+/ {
+       model = "fsl,mpc8536ds";
+       compatible = "fsl,mpc8536ds";
+
+       cpus {
+               #cpus = <1>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               PowerPC,8536@0 {
+                       device_type = "cpu";
+                       reg = <0>;
+                       next-level-cache = <&L2>;
+               };
+       };
+
+       memory {
+               device_type = "memory";
+               reg = <0 0 0 0>;        // Filled by U-Boot
+       };
+
+       lbc: localbus@ffe05000 {
+               reg = <0 0xffe05000 0 0x1000>;
+
+               ranges = <0x0 0x0 0x0 0xe8000000 0x08000000
+                         0x2 0x0 0x0 0xffa00000 0x00040000
+                         0x3 0x0 0x0 0xffdf0000 0x00008000>;
+       };
+
+       board_soc: soc: soc@ffe00000 {
+               ranges = <0x0 0 0xffe00000 0x100000>;
+       };
+
+       pci0: pci@ffe08000 {
+               reg = <0 0xffe08000 0 0x1000>;
+               ranges = <0x02000000 0 0x80000000 0 0x80000000 0 0x10000000
+                         0x01000000 0 0x00000000 0 0xffc00000 0 0x00010000>;
+               clock-frequency = <66666666>;
+               interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+               interrupt-map = <
+
+                       /* IDSEL 0x11 J17 Slot 1 */
+                       0x8800 0 0 1 &mpic 1 1 0 0
+                       0x8800 0 0 2 &mpic 2 1 0 0
+                       0x8800 0 0 3 &mpic 3 1 0 0
+                       0x8800 0 0 4 &mpic 4 1 0 0>;
+       };
+
+       pci1: pcie@ffe09000 {
+               reg = <0 0xffe09000 0 0x1000>;
+               ranges = <0x02000000 0 0x98000000 0 0x98000000 0 0x08000000
+                         0x01000000 0 0x00000000 0 0xffc20000 0 0x00010000>;
+               pcie@0 {
+                       ranges = <0x02000000 0 0x98000000
+                                 0x02000000 0 0x98000000
+                                 0 0x08000000
+
+                                 0x01000000 0 0x00000000
+                                 0x01000000 0 0x00000000
+                                 0 0x00010000>;
+               };
+       };
+
+       pci2: pcie@ffe0a000 {
+               reg = <0 0xffe0a000 0 0x1000>;
+               ranges = <0x02000000 0 0x90000000 0 0x90000000 0 0x08000000
+                         0x01000000 0 0x00000000 0 0xffc10000 0 0x00010000>;
+               pcie@0 {
+                       ranges = <0x02000000 0 0x90000000
+                                 0x02000000 0 0x90000000
+                                 0 0x08000000
+
+                                 0x01000000 0 0x00000000
+                                 0x01000000 0 0x00000000
+                                 0 0x00010000>;
+               };
+       };
+
+       pci3: pcie@ffe0b000 {
+               reg = <0 0xffe0b000 0 0x1000>;
+               ranges = <0x02000000 0 0xa0000000 0 0xa0000000 0 0x20000000
+                         0x01000000 0 0x00000000 0 0xffc30000 0 0x00010000>;
+               pcie@0 {
+                       ranges = <0x02000000 0 0xa0000000
+                                 0x02000000 0 0xa0000000
+                                 0 0x20000000
+
+                                 0x01000000 0 0x00000000
+                                 0x01000000 0 0x00000000
+                                 0 0x00100000>;
+               };
+       };
+};
+
+/include/ "fsl/mpc8536si-post.dtsi"
+/include/ "mpc8536ds.dtsi"