Add the rt linux 4.1.3-rt3 as base
[kvmfornfv.git] / kernel / arch / arm / boot / dts / vf-colibri.dtsi
diff --git a/kernel/arch/arm/boot/dts/vf-colibri.dtsi b/kernel/arch/arm/boot/dts/vf-colibri.dtsi
new file mode 100644 (file)
index 0000000..fbef082
--- /dev/null
@@ -0,0 +1,202 @@
+/*
+ * Copyright 2014 Toradex AG
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+/ {
+       bl: backlight {
+               compatible = "pwm-backlight";
+               pwms = <&pwm0 0 5000000 0>;
+               status = "disabled";
+       };
+};
+
+&adc0 {
+       status = "okay";
+};
+
+&adc1 {
+       status = "okay";
+};
+
+&dspi1 {
+       bus-num = <1>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_dspi1>;
+};
+
+&edma0 {
+       status = "okay";
+};
+
+&esdhc1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_esdhc1>;
+       bus-width = <4>;
+       cd-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
+};
+
+&fec1 {
+       phy-mode = "rmii";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_fec1>;
+};
+
+&i2c0 {
+       clock-frequency = <400000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c0>;
+};
+
+&pwm0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_pwm0>;
+};
+
+&pwm1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_pwm1>;
+};
+
+&uart0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart0>;
+};
+
+&uart1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart1>;
+};
+
+&uart2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart2>;
+};
+
+&usbdev0 {
+       disable-over-current;
+       status = "okay";
+};
+
+&usbh1 {
+       disable-over-current;
+       status = "okay";
+};
+
+&usbmisc0 {
+       status = "okay";
+};
+
+&usbmisc1 {
+       status = "okay";
+};
+
+&usbphy0 {
+       status = "okay";
+};
+
+&usbphy1 {
+       status = "okay";
+};
+
+&iomuxc {
+       vf610-colibri {
+               pinctrl_gpio_ext: gpio_ext {
+                       fsl,pins = <
+                               VF610_PAD_PTD10__GPIO_89        0x22ed /* EXT_IO_0 */
+                               VF610_PAD_PTD9__GPIO_88         0x22ed /* EXT_IO_1 */
+                               VF610_PAD_PTD26__GPIO_68        0x22ed /* EXT_IO_2 */
+                       >;
+               };
+
+               pinctrl_dspi1: dspi1grp {
+                       fsl,pins = <
+                               VF610_PAD_PTD5__DSPI1_CS0               0x33e2
+                               VF610_PAD_PTD6__DSPI1_SIN               0x33e1
+                               VF610_PAD_PTD7__DSPI1_SOUT              0x33e2
+                               VF610_PAD_PTD8__DSPI1_SCK               0x33e2
+                       >;
+               };
+
+               pinctrl_esdhc1: esdhc1grp {
+                       fsl,pins = <
+                               VF610_PAD_PTA24__ESDHC1_CLK     0x31ef
+                               VF610_PAD_PTA25__ESDHC1_CMD     0x31ef
+                               VF610_PAD_PTA26__ESDHC1_DAT0    0x31ef
+                               VF610_PAD_PTA27__ESDHC1_DAT1    0x31ef
+                               VF610_PAD_PTA28__ESDHC1_DATA2   0x31ef
+                               VF610_PAD_PTA29__ESDHC1_DAT3    0x31ef
+                               VF610_PAD_PTB20__GPIO_42        0x219d
+                       >;
+               };
+
+               pinctrl_fec1: fec1grp {
+                       fsl,pins = <
+                               VF610_PAD_PTA6__RMII_CLKOUT             0x30d2
+                               VF610_PAD_PTC9__ENET_RMII1_MDC          0x30d2
+                               VF610_PAD_PTC10__ENET_RMII1_MDIO        0x30d3
+                               VF610_PAD_PTC11__ENET_RMII1_CRS         0x30d1
+                               VF610_PAD_PTC12__ENET_RMII_RXD1         0x30d1
+                               VF610_PAD_PTC13__ENET_RMII1_RXD0        0x30d1
+                               VF610_PAD_PTC14__ENET_RMII1_RXER        0x30d1
+                               VF610_PAD_PTC15__ENET_RMII1_TXD1        0x30d2
+                               VF610_PAD_PTC16__ENET_RMII1_TXD0        0x30d2
+                               VF610_PAD_PTC17__ENET_RMII1_TXEN        0x30d2
+                       >;
+               };
+
+               pinctrl_i2c0: i2c0grp {
+                       fsl,pins = <
+                               VF610_PAD_PTB14__I2C0_SCL               0x37ff
+                               VF610_PAD_PTB15__I2C0_SDA               0x37ff
+                       >;
+               };
+
+               pinctrl_pwm0: pwm0grp {
+                       fsl,pins = <
+                               VF610_PAD_PTB0__FTM0_CH0                0x1182
+                               VF610_PAD_PTB1__FTM0_CH1                0x1182
+                       >;
+               };
+
+               pinctrl_pwm1: pwm1grp {
+                       fsl,pins = <
+                               VF610_PAD_PTB8__FTM1_CH0                0x1182
+                               VF610_PAD_PTB9__FTM1_CH1                0x1182
+                       >;
+               };
+
+               pinctrl_uart0: uart0grp {
+                       fsl,pins = <
+                               VF610_PAD_PTB10__UART0_TX               0x21a2
+                               VF610_PAD_PTB11__UART0_RX               0x21a1
+                       >;
+               };
+
+               pinctrl_uart1: uart1grp {
+                       fsl,pins = <
+                               VF610_PAD_PTB4__UART1_TX                0x21a2
+                               VF610_PAD_PTB5__UART1_RX                0x21a1
+                       >;
+               };
+
+               pinctrl_uart2: uart2grp {
+                       fsl,pins = <
+                               VF610_PAD_PTD0__UART2_TX                0x21a2
+                               VF610_PAD_PTD1__UART2_RX                0x21a1
+                               VF610_PAD_PTD2__UART2_RTS               0x21a2
+                               VF610_PAD_PTD3__UART2_CTS               0x21a1
+                       >;
+               };
+
+               pinctrl_usbh1_reg: gpio_usb_vbus {
+                       fsl,pins = <
+                               VF610_PAD_PTD4__GPIO_83                 0x22ed
+                       >;
+               };
+       };
+};