Add the rt linux 4.1.3-rt3 as base
[kvmfornfv.git] / kernel / arch / arm / boot / dts / k2l-evm.dts
diff --git a/kernel/arch/arm/boot/dts/k2l-evm.dts b/kernel/arch/arm/boot/dts/k2l-evm.dts
new file mode 100644 (file)
index 0000000..85cc7f2
--- /dev/null
@@ -0,0 +1,130 @@
+/*
+ * Copyright 2014 Texas Instruments, Inc.
+ *
+ * Keystone 2 Lamarr EVM device tree
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include "keystone.dtsi"
+#include "k2l.dtsi"
+
+/ {
+       compatible =  "ti,k2l-evm","ti,keystone";
+       model = "Texas Instruments Keystone 2 Lamarr EVM";
+
+       soc {
+               clocks {
+                       refclksys: refclksys {
+                               #clock-cells = <0>;
+                               compatible = "fixed-clock";
+                               clock-frequency = <122880000>;
+                               clock-output-names = "refclk-sys";
+                       };
+               };
+       };
+};
+
+&usb_phy {
+       status = "okay";
+};
+
+&usb {
+       status = "okay";
+};
+
+&i2c0 {
+       dtt@50 {
+               compatible = "at,24c1024";
+               reg = <0x50>;
+       };
+};
+
+&aemif {
+       cs0 {
+               #address-cells = <2>;
+               #size-cells = <1>;
+               clock-ranges;
+               ranges;
+
+               ti,cs-chipselect = <0>;
+               /* all timings in nanoseconds */
+               ti,cs-min-turnaround-ns = <12>;
+               ti,cs-read-hold-ns = <6>;
+               ti,cs-read-strobe-ns = <23>;
+               ti,cs-read-setup-ns = <9>;
+               ti,cs-write-hold-ns = <8>;
+               ti,cs-write-strobe-ns = <23>;
+               ti,cs-write-setup-ns = <8>;
+
+               nand@0,0 {
+                       compatible = "ti,keystone-nand","ti,davinci-nand";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       reg = <0 0 0x4000000
+                              1 0 0x0000100>;
+
+                       ti,davinci-chipselect = <0>;
+                       ti,davinci-mask-ale = <0x2000>;
+                       ti,davinci-mask-cle = <0x4000>;
+                       ti,davinci-mask-chipsel = <0>;
+                       nand-ecc-mode = "hw";
+                       ti,davinci-ecc-bits = <4>;
+                       nand-on-flash-bbt;
+
+                       partition@0 {
+                               label = "u-boot";
+                               reg = <0x0 0x100000>;
+                               read-only;
+                       };
+
+                       partition@100000 {
+                               label = "params";
+                               reg = <0x100000 0x80000>;
+                               read-only;
+                       };
+
+                       partition@180000 {
+                               label = "ubifs";
+                               reg = <0x180000 0x7FE80000>;
+                       };
+               };
+       };
+};
+
+&spi0 {
+       nor_flash: n25q128a11@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "Micron,n25q128a11";
+               spi-max-frequency = <54000000>;
+               m25p,fast-read;
+               reg = <0>;
+
+               partition@0 {
+                       label = "u-boot-spl";
+                       reg = <0x0 0x80000>;
+                       read-only;
+               };
+
+               partition@1 {
+                       label = "misc";
+                       reg = <0x80000 0xf80000>;
+               };
+       };
+};
+
+&mdio {
+       ethphy0: ethernet-phy@0 {
+               compatible = "marvell,88E1514", "marvell,88E1510", "ethernet-phy-ieee802.3-c22";
+               reg = <0>;
+       };
+
+       ethphy1: ethernet-phy@1 {
+               compatible = "marvell,88E1514", "marvell,88E1510", "ethernet-phy-ieee802.3-c22";
+               reg = <1>;
+       };
+};