Add the rt linux 4.1.3-rt3 as base
[kvmfornfv.git] / kernel / arch / arm / boot / dts / imx51-babbage.dts
diff --git a/kernel/arch/arm/boot/dts/imx51-babbage.dts b/kernel/arch/arm/boot/dts/imx51-babbage.dts
new file mode 100644 (file)
index 0000000..649befe
--- /dev/null
@@ -0,0 +1,655 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+#include "imx51.dtsi"
+
+/ {
+       model = "Freescale i.MX51 Babbage Board";
+       compatible = "fsl,imx51-babbage", "fsl,imx51";
+
+       chosen {
+               stdout-path = &uart1;
+       };
+
+       memory {
+               reg = <0x90000000 0x20000000>;
+       };
+
+       clocks {
+               ckih1 {
+                       clock-frequency = <22579200>;
+               };
+
+               clk_26M: codec_clock {
+                       compatible = "fixed-clock";
+                       reg=<0>;
+                       #clock-cells = <0>;
+                       clock-frequency = <26000000>;
+                       gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
+               };
+       };
+
+       display0: display@di0 {
+               compatible = "fsl,imx-parallel-display";
+               interface-pix-fmt = "rgb24";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_ipu_disp1>;
+               display-timings {
+                       native-mode = <&timing0>;
+                       timing0: dvi {
+                               clock-frequency = <65000000>;
+                               hactive = <1024>;
+                               vactive = <768>;
+                               hback-porch = <220>;
+                               hfront-porch = <40>;
+                               vback-porch = <21>;
+                               vfront-porch = <7>;
+                               hsync-len = <60>;
+                               vsync-len = <10>;
+                       };
+               };
+
+               port {
+                       display0_in: endpoint {
+                               remote-endpoint = <&ipu_di0_disp0>;
+                       };
+               };
+       };
+
+       display1: display@di1 {
+               compatible = "fsl,imx-parallel-display";
+               interface-pix-fmt = "rgb565";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_ipu_disp2>;
+               status = "disabled";
+               display-timings {
+                       native-mode = <&timing1>;
+                       timing1: claawvga {
+                               clock-frequency = <27000000>;
+                               hactive = <800>;
+                               vactive = <480>;
+                               hback-porch = <40>;
+                               hfront-porch = <60>;
+                               vback-porch = <10>;
+                               vfront-porch = <10>;
+                               hsync-len = <20>;
+                               vsync-len = <10>;
+                               hsync-active = <0>;
+                               vsync-active = <0>;
+                               de-active = <1>;
+                               pixelclk-active = <0>;
+                       };
+               };
+
+               port {
+                       display1_in: endpoint {
+                               remote-endpoint = <&ipu_di1_disp1>;
+                       };
+               };
+       };
+
+       gpio-keys {
+               compatible = "gpio-keys";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_gpio_keys>;
+
+               power {
+                       label = "Power Button";
+                       gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>;
+                       linux,code = <KEY_POWER>;
+                       gpio-key,wakeup;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_gpio_leds>;
+
+               led-diagnostic {
+                       label = "diagnostic";
+                       gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
+               };
+       };
+
+       regulators {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               reg_hub_reset: regulator@0 {
+                       compatible = "regulator-fixed";
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_usbotgreg>;
+                       reg = <0>;
+                       regulator-name = "hub_reset";
+                       regulator-min-microvolt = <5000000>;
+                       regulator-max-microvolt = <5000000>;
+                       gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
+                       enable-active-high;
+               };
+       };
+
+       sound {
+               compatible = "fsl,imx51-babbage-sgtl5000",
+                            "fsl,imx-audio-sgtl5000";
+               model = "imx51-babbage-sgtl5000";
+               ssi-controller = <&ssi2>;
+               audio-codec = <&sgtl5000>;
+               audio-routing =
+                       "MIC_IN", "Mic Jack",
+                       "Mic Jack", "Mic Bias",
+                       "Headphone Jack", "HP_OUT";
+               mux-int-port = <2>;
+               mux-ext-port = <3>;
+       };
+
+       usbphy {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "simple-bus";
+
+               usbh1phy: usbh1phy@0 {
+                       compatible = "usb-nop-xceiv";
+                       reg = <0>;
+                       clocks = <&clks IMX5_CLK_DUMMY>;
+                       clock-names = "main_clk";
+                       reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
+               };
+       };
+};
+
+&audmux {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_audmux>;
+       status = "okay";
+};
+
+&ecspi1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_ecspi1>;
+       fsl,spi-num-chipselects = <2>;
+       cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>,
+                  <&gpio4 25 GPIO_ACTIVE_LOW>;
+       status = "okay";
+
+       pmic: mc13892@0 {
+               compatible = "fsl,mc13892";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_pmic>;
+               spi-max-frequency = <6000000>;
+               spi-cs-high;
+               reg = <0>;
+               interrupt-parent = <&gpio1>;
+               interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
+               fsl,mc13xxx-uses-rtc;
+
+               regulators {
+                       sw1_reg: sw1 {
+                               regulator-min-microvolt = <600000>;
+                               regulator-max-microvolt = <1375000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       sw2_reg: sw2 {
+                               regulator-min-microvolt = <900000>;
+                               regulator-max-microvolt = <1850000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       sw3_reg: sw3 {
+                               regulator-min-microvolt = <1100000>;
+                               regulator-max-microvolt = <1850000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       sw4_reg: sw4 {
+                               regulator-min-microvolt = <1100000>;
+                               regulator-max-microvolt = <1850000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       vpll_reg: vpll {
+                               regulator-min-microvolt = <1050000>;
+                               regulator-max-microvolt = <1800000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       vdig_reg: vdig {
+                               regulator-min-microvolt = <1650000>;
+                               regulator-max-microvolt = <1650000>;
+                               regulator-boot-on;
+                       };
+
+                       vsd_reg: vsd {
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <3150000>;
+                       };
+
+                       vusb2_reg: vusb2 {
+                               regulator-min-microvolt = <2400000>;
+                               regulator-max-microvolt = <2775000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       vvideo_reg: vvideo {
+                               regulator-min-microvolt = <2775000>;
+                               regulator-max-microvolt = <2775000>;
+                       };
+
+                       vaudio_reg: vaudio {
+                               regulator-min-microvolt = <2300000>;
+                               regulator-max-microvolt = <3000000>;
+                       };
+
+                       vcam_reg: vcam {
+                               regulator-min-microvolt = <2500000>;
+                               regulator-max-microvolt = <3000000>;
+                       };
+
+                       vgen1_reg: vgen1 {
+                               regulator-min-microvolt = <1200000>;
+                               regulator-max-microvolt = <1200000>;
+                       };
+
+                       vgen2_reg: vgen2 {
+                               regulator-min-microvolt = <1200000>;
+                               regulator-max-microvolt = <3150000>;
+                               regulator-always-on;
+                       };
+
+                       vgen3_reg: vgen3 {
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <2900000>;
+                               regulator-always-on;
+                       };
+               };
+       };
+
+       flash: at45db321d@1 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash";
+               spi-max-frequency = <25000000>;
+               reg = <1>;
+
+               partition@0 {
+                       label = "U-Boot";
+                       reg = <0x0 0x40000>;
+                       read-only;
+               };
+
+               partition@40000 {
+                       label = "Kernel";
+                       reg = <0x40000 0x3c0000>;
+               };
+       };
+};
+
+&esdhc1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_esdhc1>;
+       cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
+       wp-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
+       status = "okay";
+};
+
+&esdhc2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_esdhc2>;
+       cd-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+       wp-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
+       status = "okay";
+};
+
+&fec {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_fec>;
+       phy-mode = "mii";
+       phy-reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>;
+       phy-reset-duration = <1>;
+       status = "okay";
+};
+
+&i2c1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c1>;
+       status = "okay";
+};
+
+&i2c2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c2>;
+       status = "okay";
+
+       sgtl5000: codec@0a {
+               compatible = "fsl,sgtl5000";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_clkcodec>;
+               reg = <0x0a>;
+               clocks = <&clk_26M>;
+               VDDA-supply = <&vdig_reg>;
+               VDDIO-supply = <&vvideo_reg>;
+       };
+};
+
+&ipu_di0_disp0 {
+       remote-endpoint = <&display0_in>;
+};
+
+&ipu_di1_disp1 {
+       remote-endpoint = <&display1_in>;
+};
+
+&kpp {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_kpp>;
+       linux,keymap = <
+               MATRIX_KEY(0, 0, KEY_UP)
+               MATRIX_KEY(0, 1, KEY_DOWN)
+               MATRIX_KEY(0, 2, KEY_VOLUMEDOWN)
+               MATRIX_KEY(0, 3, KEY_HOME)
+               MATRIX_KEY(1, 0, KEY_RIGHT)
+               MATRIX_KEY(1, 1, KEY_LEFT)
+               MATRIX_KEY(1, 2, KEY_ENTER)
+               MATRIX_KEY(1, 3, KEY_VOLUMEUP)
+               MATRIX_KEY(2, 0, KEY_F6)
+               MATRIX_KEY(2, 1, KEY_F8)
+               MATRIX_KEY(2, 2, KEY_F9)
+               MATRIX_KEY(2, 3, KEY_F10)
+               MATRIX_KEY(3, 0, KEY_F1)
+               MATRIX_KEY(3, 1, KEY_F2)
+               MATRIX_KEY(3, 2, KEY_F3)
+               MATRIX_KEY(3, 3, KEY_POWER)
+       >;
+       status = "okay";
+};
+
+&ssi2 {
+       status = "okay";
+};
+
+&uart1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart1>;
+       fsl,uart-has-rtscts;
+       status = "okay";
+};
+
+&uart2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart2>;
+       status = "okay";
+};
+
+&uart3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart3>;
+       fsl,uart-has-rtscts;
+       status = "okay";
+};
+
+&usbh1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usbh1>;
+       vbus-supply = <&reg_hub_reset>;
+       fsl,usbphy = <&usbh1phy>;
+       phy_type = "ulpi";
+       status = "okay";
+};
+
+&usbotg {
+       dr_mode = "otg";
+       disable-over-current;
+       phy_type = "utmi_wide";
+       status = "okay";
+};
+
+&iomuxc {
+       imx51-babbage {
+               pinctrl_audmux: audmuxgrp {
+                       fsl,pins = <
+                               MX51_PAD_AUD3_BB_TXD__AUD3_TXD          0x80000000
+                               MX51_PAD_AUD3_BB_RXD__AUD3_RXD          0x80000000
+                               MX51_PAD_AUD3_BB_CK__AUD3_TXC           0x80000000
+                               MX51_PAD_AUD3_BB_FS__AUD3_TXFS          0x80000000
+                       >;
+               };
+
+               pinctrl_clkcodec: clkcodecgrp {
+                       fsl,pins = <
+                               MX51_PAD_CSPI1_RDY__GPIO4_26            0x80000000
+                       >;
+               };
+
+               pinctrl_ecspi1: ecspi1grp {
+                       fsl,pins = <
+                               MX51_PAD_CSPI1_MISO__ECSPI1_MISO        0x185
+                               MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI        0x185
+                               MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK        0x185
+                               MX51_PAD_CSPI1_SS0__GPIO4_24            0x85 /* CS0 */
+                               MX51_PAD_CSPI1_SS1__GPIO4_25            0x85 /* CS1 */
+                       >;
+               };
+
+               pinctrl_esdhc1: esdhc1grp {
+                       fsl,pins = <
+                               MX51_PAD_SD1_CMD__SD1_CMD               0x400020d5
+                               MX51_PAD_SD1_CLK__SD1_CLK               0x20d5
+                               MX51_PAD_SD1_DATA0__SD1_DATA0           0x20d5
+                               MX51_PAD_SD1_DATA1__SD1_DATA1           0x20d5
+                               MX51_PAD_SD1_DATA2__SD1_DATA2           0x20d5
+                               MX51_PAD_SD1_DATA3__SD1_DATA3           0x20d5
+                               MX51_PAD_GPIO1_0__GPIO1_0               0x100
+                               MX51_PAD_GPIO1_1__GPIO1_1               0x100
+                       >;
+               };
+
+               pinctrl_esdhc2: esdhc2grp {
+                       fsl,pins = <
+                               MX51_PAD_SD2_CMD__SD2_CMD               0x400020d5
+                               MX51_PAD_SD2_CLK__SD2_CLK               0x20d5
+                               MX51_PAD_SD2_DATA0__SD2_DATA0           0x20d5
+                               MX51_PAD_SD2_DATA1__SD2_DATA1           0x20d5
+                               MX51_PAD_SD2_DATA2__SD2_DATA2           0x20d5
+                               MX51_PAD_SD2_DATA3__SD2_DATA3           0x20d5
+                               MX51_PAD_GPIO1_5__GPIO1_5               0x100 /* WP */
+                               MX51_PAD_GPIO1_6__GPIO1_6               0x100 /* CD */
+                       >;
+               };
+
+               pinctrl_fec: fecgrp {
+                       fsl,pins = <
+                               MX51_PAD_EIM_EB2__FEC_MDIO              0x000001f5
+                               MX51_PAD_EIM_EB3__FEC_RDATA1            0x00000085
+                               MX51_PAD_EIM_CS2__FEC_RDATA2            0x00000085
+                               MX51_PAD_EIM_CS3__FEC_RDATA3            0x00000085
+                               MX51_PAD_EIM_CS4__FEC_RX_ER             0x00000180
+                               MX51_PAD_EIM_CS5__FEC_CRS               0x00000180
+                               MX51_PAD_NANDF_RB2__FEC_COL             0x00000180
+                               MX51_PAD_NANDF_RB3__FEC_RX_CLK          0x00000180
+                               MX51_PAD_NANDF_D9__FEC_RDATA0           0x00002180
+                               MX51_PAD_NANDF_D8__FEC_TDATA0           0x00002004
+                               MX51_PAD_NANDF_CS2__FEC_TX_ER           0x00002004
+                               MX51_PAD_NANDF_CS3__FEC_MDC             0x00002004
+                               MX51_PAD_NANDF_CS4__FEC_TDATA1          0x00002004
+                               MX51_PAD_NANDF_CS5__FEC_TDATA2          0x00002004
+                               MX51_PAD_NANDF_CS6__FEC_TDATA3          0x00002004
+                               MX51_PAD_NANDF_CS7__FEC_TX_EN           0x00002004
+                               MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK      0x00002180
+                               MX51_PAD_NANDF_D11__FEC_RX_DV           0x000020a4
+                               MX51_PAD_EIM_A20__GPIO2_14              0x00000085 /* Phy Reset */
+                       >;
+               };
+
+               pinctrl_gpio_keys: gpiokeysgrp {
+                       fsl,pins = <
+                               MX51_PAD_EIM_A27__GPIO2_21              0x5
+                       >;
+               };
+
+               pinctrl_gpio_leds: gpioledsgrp {
+                       fsl,pins = <
+                               MX51_PAD_EIM_D22__GPIO2_6               0x80000000
+                       >;
+               };
+
+               pinctrl_i2c1: i2c1grp {
+                       fsl,pins = <
+                               MX51_PAD_EIM_D19__I2C1_SCL              0x400001ed
+                               MX51_PAD_EIM_D16__I2C1_SDA              0x400001ed
+                       >;
+               };
+
+               pinctrl_i2c2: i2c2grp {
+                       fsl,pins = <
+                               MX51_PAD_KEY_COL4__I2C2_SCL             0x400001ed
+                               MX51_PAD_KEY_COL5__I2C2_SDA             0x400001ed
+                       >;
+               };
+
+               pinctrl_ipu_disp1: ipudisp1grp {
+                       fsl,pins = <
+                               MX51_PAD_DISP1_DAT0__DISP1_DAT0         0x5
+                               MX51_PAD_DISP1_DAT1__DISP1_DAT1         0x5
+                               MX51_PAD_DISP1_DAT2__DISP1_DAT2         0x5
+                               MX51_PAD_DISP1_DAT3__DISP1_DAT3         0x5
+                               MX51_PAD_DISP1_DAT4__DISP1_DAT4         0x5
+                               MX51_PAD_DISP1_DAT5__DISP1_DAT5         0x5
+                               MX51_PAD_DISP1_DAT6__DISP1_DAT6         0x5
+                               MX51_PAD_DISP1_DAT7__DISP1_DAT7         0x5
+                               MX51_PAD_DISP1_DAT8__DISP1_DAT8         0x5
+                               MX51_PAD_DISP1_DAT9__DISP1_DAT9         0x5
+                               MX51_PAD_DISP1_DAT10__DISP1_DAT10       0x5
+                               MX51_PAD_DISP1_DAT11__DISP1_DAT11       0x5
+                               MX51_PAD_DISP1_DAT12__DISP1_DAT12       0x5
+                               MX51_PAD_DISP1_DAT13__DISP1_DAT13       0x5
+                               MX51_PAD_DISP1_DAT14__DISP1_DAT14       0x5
+                               MX51_PAD_DISP1_DAT15__DISP1_DAT15       0x5
+                               MX51_PAD_DISP1_DAT16__DISP1_DAT16       0x5
+                               MX51_PAD_DISP1_DAT17__DISP1_DAT17       0x5
+                               MX51_PAD_DISP1_DAT18__DISP1_DAT18       0x5
+                               MX51_PAD_DISP1_DAT19__DISP1_DAT19       0x5
+                               MX51_PAD_DISP1_DAT20__DISP1_DAT20       0x5
+                               MX51_PAD_DISP1_DAT21__DISP1_DAT21       0x5
+                               MX51_PAD_DISP1_DAT22__DISP1_DAT22       0x5
+                               MX51_PAD_DISP1_DAT23__DISP1_DAT23       0x5
+                               MX51_PAD_DI1_PIN2__DI1_PIN2             0x5
+                               MX51_PAD_DI1_PIN3__DI1_PIN3             0x5
+                       >;
+               };
+
+               pinctrl_ipu_disp2: ipudisp2grp {
+                       fsl,pins = <
+                               MX51_PAD_DISP2_DAT0__DISP2_DAT0         0x5
+                               MX51_PAD_DISP2_DAT1__DISP2_DAT1         0x5
+                               MX51_PAD_DISP2_DAT2__DISP2_DAT2         0x5
+                               MX51_PAD_DISP2_DAT3__DISP2_DAT3         0x5
+                               MX51_PAD_DISP2_DAT4__DISP2_DAT4         0x5
+                               MX51_PAD_DISP2_DAT5__DISP2_DAT5         0x5
+                               MX51_PAD_DISP2_DAT6__DISP2_DAT6         0x5
+                               MX51_PAD_DISP2_DAT7__DISP2_DAT7         0x5
+                               MX51_PAD_DISP2_DAT8__DISP2_DAT8         0x5
+                               MX51_PAD_DISP2_DAT9__DISP2_DAT9         0x5
+                               MX51_PAD_DISP2_DAT10__DISP2_DAT10       0x5
+                               MX51_PAD_DISP2_DAT11__DISP2_DAT11       0x5
+                               MX51_PAD_DISP2_DAT12__DISP2_DAT12       0x5
+                               MX51_PAD_DISP2_DAT13__DISP2_DAT13       0x5
+                               MX51_PAD_DISP2_DAT14__DISP2_DAT14       0x5
+                               MX51_PAD_DISP2_DAT15__DISP2_DAT15       0x5
+                               MX51_PAD_DI2_PIN2__DI2_PIN2             0x5
+                               MX51_PAD_DI2_PIN3__DI2_PIN3             0x5
+                               MX51_PAD_DI2_DISP_CLK__DI2_DISP_CLK     0x5
+                               MX51_PAD_DI_GP4__DI2_PIN15              0x5
+                       >;
+               };
+
+               pinctrl_kpp: kppgrp {
+                       fsl,pins = <
+                               MX51_PAD_KEY_ROW0__KEY_ROW0             0xe0
+                               MX51_PAD_KEY_ROW1__KEY_ROW1             0xe0
+                               MX51_PAD_KEY_ROW2__KEY_ROW2             0xe0
+                               MX51_PAD_KEY_ROW3__KEY_ROW3             0xe0
+                               MX51_PAD_KEY_COL0__KEY_COL0             0xe8
+                               MX51_PAD_KEY_COL1__KEY_COL1             0xe8
+                               MX51_PAD_KEY_COL2__KEY_COL2             0xe8
+                               MX51_PAD_KEY_COL3__KEY_COL3             0xe8
+                       >;
+               };
+
+               pinctrl_pmic: pmicgrp {
+                       fsl,pins = <
+                               MX51_PAD_GPIO1_8__GPIO1_8               0xe5 /* IRQ */
+                       >;
+               };
+
+               pinctrl_uart1: uart1grp {
+                       fsl,pins = <
+                               MX51_PAD_UART1_RXD__UART1_RXD           0x1c5
+                               MX51_PAD_UART1_TXD__UART1_TXD           0x1c5
+                               MX51_PAD_UART1_RTS__UART1_RTS           0x1c5
+                               MX51_PAD_UART1_CTS__UART1_CTS           0x1c5
+                       >;
+               };
+
+               pinctrl_uart2: uart2grp {
+                       fsl,pins = <
+                               MX51_PAD_UART2_RXD__UART2_RXD           0x1c5
+                               MX51_PAD_UART2_TXD__UART2_TXD           0x1c5
+                       >;
+               };
+
+               pinctrl_uart3: uart3grp {
+                       fsl,pins = <
+                               MX51_PAD_EIM_D25__UART3_RXD             0x1c5
+                               MX51_PAD_EIM_D26__UART3_TXD             0x1c5
+                               MX51_PAD_EIM_D27__UART3_RTS             0x1c5
+                               MX51_PAD_EIM_D24__UART3_CTS             0x1c5
+                       >;
+               };
+
+               pinctrl_usbh1: usbh1grp {
+                       fsl,pins = <
+                               MX51_PAD_USBH1_CLK__USBH1_CLK           0x80000000
+                               MX51_PAD_USBH1_DIR__USBH1_DIR           0x80000000
+                               MX51_PAD_USBH1_NXT__USBH1_NXT           0x80000000
+                               MX51_PAD_USBH1_DATA0__USBH1_DATA0       0x80000000
+                               MX51_PAD_USBH1_DATA1__USBH1_DATA1       0x80000000
+                               MX51_PAD_USBH1_DATA2__USBH1_DATA2       0x80000000
+                               MX51_PAD_USBH1_DATA3__USBH1_DATA3       0x80000000
+                               MX51_PAD_USBH1_DATA4__USBH1_DATA4       0x80000000
+                               MX51_PAD_USBH1_DATA5__USBH1_DATA5       0x80000000
+                               MX51_PAD_USBH1_DATA6__USBH1_DATA6       0x80000000
+                               MX51_PAD_USBH1_DATA7__USBH1_DATA7       0x80000000
+                       >;
+               };
+
+               pinctrl_usbh1reg: usbh1reggrp {
+                       fsl,pins = <
+                               MX51_PAD_EIM_D21__GPIO2_5               0x85
+                       >;
+               };
+
+               pinctrl_usbotgreg: usbotgreggrp {
+                       fsl,pins = <
+                               MX51_PAD_GPIO1_7__GPIO1_7               0x85
+                       >;
+               };
+       };
+};