These changes are the raw update to linux-4.4.6-rt14. Kernel sources

[kvmfornfv.git] / kernel / Documentation / devicetree / bindings / pci / altera-pcie.txt

diff --git a/kernel/Documentation/devicetree/bindings/pci/altera-pcie.txt b/kernel/Documentation/devicetree/bindings/pci/altera-pcie.txt
new file mode 100644 (file)
index 0000000..2951a6a
--- /dev/null
+++ b/kernel/Documentation/devicetree/bindings/pci/altera-pcie.txt
@@ -0,0 +1,49 @@
+* Altera PCIe controller
+
+Required properties:
+- compatible : should contain "altr,pcie-root-port-1.0"
+- reg:         a list of physical base address and length for TXS and CRA.
+- reg-names:   must include the following entries:
+               "Txs": TX slave port region
+               "Cra": Control register access region
+- interrupt-parent:    interrupt source phandle.
+- interrupts:  specifies the interrupt source of the parent interrupt controller.
+               The format of the interrupt specifier depends on the parent interrupt
+               controller.
+- device_type: must be "pci"
+- #address-cells:      set to <3>
+- #size-cells: set to <2>
+- #interrupt-cells:    set to <1>
+- ranges:              describes the translation of addresses for root ports and standard
+               PCI regions.
+- interrupt-map-mask and interrupt-map: standard PCI properties to define the
+               mapping of the PCIe interface to interrupt numbers.
+
+Optional properties:
+- msi-parent:  Link to the hardware entity that serves as the MSI controller for this PCIe
+               controller.
+- bus-range:   PCI bus numbers covered
+
+Example
+       pcie_0: pcie@0xc00000000 {
+               compatible = "altr,pcie-root-port-1.0";
+               reg = <0xc0000000 0x20000000>,
+                       <0xff220000 0x00004000>;
+               reg-names = "Txs", "Cra";
+               interrupt-parent = <&hps_0_arm_gic_0>;
+               interrupts = <0 40 4>;
+               interrupt-controller;
+               #interrupt-cells = <1>;
+               bus-range = <0x0 0xFF>;
+               device_type = "pci";
+               msi-parent = <&msi_to_gic_gen_0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               interrupt-map-mask = <0 0 0 7>;
+               interrupt-map = <0 0 0 1 &pcie_0 1>,
+                                   <0 0 0 2 &pcie_0 2>,
+                                   <0 0 0 3 &pcie_0 3>,
+                                   <0 0 0 4 &pcie_0 4>;
+               ranges = <0x82000000 0x00000000 0x00000000 0xc0000000 0x00000000 0x10000000
+                           0x82000000 0x00000000 0x10000000 0xd0000000 0x00000000 0x10000000>;
+       };