Add the rt linux 4.1.3-rt3 as base

[kvmfornfv.git] / kernel / Documentation / devicetree / bindings / gpio / snps-dwapb-gpio.txt

diff --git a/kernel/Documentation/devicetree/bindings/gpio/snps-dwapb-gpio.txt b/kernel/Documentation/devicetree/bindings/gpio/snps-dwapb-gpio.txt
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+* Synopsys DesignWare APB GPIO controller
+
+Required properties:
+- compatible : Should contain "snps,dw-apb-gpio"
+- reg : Address and length of the register set for the device.
+- #address-cells : should be 1 (for addressing port subnodes).
+- #size-cells : should be 0 (port subnodes).
+
+The GPIO controller has a configurable number of ports, each of which are
+represented as child nodes with the following properties:
+
+Required properties:
+- compatible : "snps,dw-apb-gpio-port"
+- gpio-controller : Marks the device node as a gpio controller.
+- #gpio-cells : Should be two.  The first cell is the pin number and
+  the second cell is used to specify the gpio polarity:
+      0 = active high
+      1 = active low
+- reg : The integer port index of the port, a single cell.
+
+Optional properties:
+- interrupt-controller : The first port may be configured to be an interrupt
+controller.
+- #interrupt-cells : Specifies the number of cells needed to encode an
+  interrupt.  Shall be set to 2.  The first cell defines the interrupt number,
+  the second encodes the triger flags encoded as described in
+  Documentation/devicetree/bindings/interrupts.txt
+- interrupt-parent : The parent interrupt controller.
+- interrupts : The interrupt to the parent controller raised when GPIOs
+  generate the interrupts.
+- snps,nr-gpios : The number of pins in the port, a single cell.
+
+Example:
+
+gpio: gpio@20000 {
+       compatible = "snps,dw-apb-gpio";
+       reg = <0x20000 0x1000>;
+       #address-cells = <1>;
+       #size-cells = <0>;
+
+       porta: gpio-controller@0 {
+               compatible = "snps,dw-apb-gpio-port";
+               gpio-controller;
+               #gpio-cells = <2>;
+               snps,nr-gpios = <8>;
+               reg = <0>;
+               interrupt-controller;
+               #interrupt-cells = <2>;
+               interrupt-parent = <&vic1>;
+               interrupts = <0>;
+       };
+
+       portb: gpio-controller@1 {
+               compatible = "snps,dw-apb-gpio-port";
+               gpio-controller;
+               #gpio-cells = <2>;
+               snps,nr-gpios = <8>;
+               reg = <1>;
+       };
+};