Add the rt linux 4.1.3-rt3 as base

[kvmfornfv.git] / kernel / Documentation / devicetree / bindings / drm / msm / mdp.txt

diff --git a/kernel/Documentation/devicetree/bindings/drm/msm/mdp.txt b/kernel/Documentation/devicetree/bindings/drm/msm/mdp.txt
new file mode 100644 (file)
index 0000000..1a0598e
--- /dev/null
+++ b/kernel/Documentation/devicetree/bindings/drm/msm/mdp.txt
@@ -0,0 +1,48 @@
+Qualcomm adreno/snapdragon display controller
+
+Required properties:
+- compatible:
+  * "qcom,mdp" - mdp4
+- reg: Physical base address and length of the controller's registers.
+- interrupts: The interrupt signal from the display controller.
+- connectors: array of phandles for output device(s)
+- clocks: device clocks
+  See ../clocks/clock-bindings.txt for details.
+- clock-names: the following clocks are required:
+  * "core_clk"
+  * "iface_clk"
+  * "lut_clk"
+  * "src_clk"
+  * "hdmi_clk"
+  * "mpd_clk"
+
+Optional properties:
+- gpus: phandle for gpu device
+
+Example:
+
+/ {
+       ...
+
+       mdp: qcom,mdp@5100000 {
+               compatible = "qcom,mdp";
+               reg = <0x05100000 0xf0000>;
+               interrupts = <GIC_SPI 75 0>;
+               connectors = <&hdmi>;
+               gpus = <&gpu>;
+               clock-names =
+                   "core_clk",
+                   "iface_clk",
+                   "lut_clk",
+                   "src_clk",
+                   "hdmi_clk",
+                   "mdp_clk";
+               clocks =
+                   <&mmcc MDP_SRC>,
+                   <&mmcc MDP_AHB_CLK>,
+                   <&mmcc MDP_LUT_CLK>,
+                   <&mmcc TV_SRC>,
+                   <&mmcc HDMI_TV_CLK>,
+                   <&mmcc MDP_TV_CLK>;
+       };
+};