Add the rt linux 4.1.3-rt3 as base

[kvmfornfv.git] / kernel / Documentation / devicetree / bindings / clock / st / st,clkgen.txt

diff --git a/kernel/Documentation/devicetree/bindings/clock/st/st,clkgen.txt b/kernel/Documentation/devicetree/bindings/clock/st/st,clkgen.txt
new file mode 100644 (file)
index 0000000..78978f1
--- /dev/null
+++ b/kernel/Documentation/devicetree/bindings/clock/st/st,clkgen.txt
@@ -0,0 +1,100 @@
+Binding for a Clockgen hardware block found on
+certain STMicroelectronics consumer electronics SoC devices.
+
+A Clockgen node can contain pll, diviser or multiplexer nodes.
+
+We will find only the base address of the Clockgen, this base
+address is common of all subnode.
+
+       clockgen_node {
+               reg = <>;
+
+               pll_node {
+                       ...
+               };
+
+               prediv_node {
+                       ...
+               };
+
+               divmux_node {
+                       ...
+               };
+
+               quadfs_node {
+                       ...
+               };
+
+               mux_node {
+                       ...
+               };
+
+               vcc_node {
+                       ...
+               };
+
+               flexgen_node {
+                       ...
+               };
+               ...
+       };
+
+This binding uses the common clock binding[1].
+Each subnode should use the binding discribe in [2]..[7]
+
+[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
+[2] Documentation/devicetree/bindings/clock/st,clkgen-divmux.txt
+[3] Documentation/devicetree/bindings/clock/st,clkgen-mux.txt
+[4] Documentation/devicetree/bindings/clock/st,clkgen-pll.txt
+[5] Documentation/devicetree/bindings/clock/st,clkgen-prediv.txt
+[6] Documentation/devicetree/bindings/clock/st,vcc.txt
+[7] Documentation/devicetree/bindings/clock/st,quadfs.txt
+[8] Documentation/devicetree/bindings/clock/st,flexgen.txt
+
+
+Required properties:
+- reg : A Base address and length of the register set.
+
+Example:
+
+       clockgen-a@fee62000 {
+
+               reg = <0xfee62000 0xb48>;
+
+               clk_s_a0_pll: clk-s-a0-pll {
+                       #clock-cells = <1>;
+                       compatible = "st,clkgena-plls-c65";
+
+                       clocks = <&clk-sysin>;
+
+                       clock-output-names = "clk-s-a0-pll0-hs",
+                                            "clk-s-a0-pll0-ls",
+                                            "clk-s-a0-pll1";
+               };
+
+               clk_s_a0_osc_prediv: clk-s-a0-osc-prediv {
+                       #clock-cells = <0>;
+                       compatible = "st,clkgena-prediv-c65",
+                                    "st,clkgena-prediv";
+
+                       clocks = <&clk_sysin>;
+
+                       clock-output-names = "clk-s-a0-osc-prediv";
+               };
+
+               clk_s_a0_hs: clk-s-a0-hs {
+                       #clock-cells = <1>;
+                       compatible = "st,clkgena-divmux-c65-hs",
+                                    "st,clkgena-divmux";
+
+                       clocks = <&clk-s_a0_osc_prediv>,
+                                <&clk-s_a0_pll 0>, /* pll0 hs */
+                                <&clk-s_a0_pll 2>; /* pll1 */
+
+                       clock-output-names = "clk-s-fdma-0",
+                                            "clk-s-fdma-1",
+                                            ""; /* clk-s-jit-sense */
+                                            /* fourth output unused */
+               };
+       };
+