#include "stats_irq.h"
#include "prox_compat.h"
#include "rte_ethdev.h"
+#include "lconf.h"
struct prox_port_cfg prox_port_cfg[PROX_MAX_PORTS];
plog_info("\t\t%s disabled\n", #flag);\
}\
+static inline uint32_t get_netmask(uint8_t prefix)
+{
+ if (prefix == 0)
+ return(~((uint32_t) -1));
+ else
+ return rte_cpu_to_be_32(~((1 << (32 - prefix)) - 1));
+}
-static void set_ip_address (char *devname, uint32_t *ip)
+static void set_ip_address(char *devname, uint32_t ip, uint8_t prefix)
{
struct ifreq ifreq;
struct sockaddr_in in_addr;
int fd, rc;
+ uint32_t netmask = get_netmask(prefix);
+ plog_info("Setting netmask to %x\n", netmask);
+ uint32_t ip_cpu = rte_be_to_cpu_32(ip);
+
+ fd = socket(AF_INET, SOCK_DGRAM, 0);
memset(&ifreq, 0, sizeof(struct ifreq));
memset(&in_addr, 0, sizeof(struct sockaddr_in));
in_addr.sin_family = AF_INET;
- in_addr.sin_addr = *(struct in_addr *)ip;
- fd = socket(in_addr.sin_family, SOCK_DGRAM, 0);
+ in_addr.sin_addr = *(struct in_addr *)&ip_cpu;
- strncpy(ifreq.ifr_name, devname, IFNAMSIZ);
+ prox_strncpy(ifreq.ifr_name, devname, IFNAMSIZ);
ifreq.ifr_addr = *(struct sockaddr *)&in_addr;
rc = ioctl(fd, SIOCSIFADDR, &ifreq);
- PROX_PANIC(rc < 0, "Failed to set IP address %d on device %s: error = %d\n", *ip, devname, errno);
+ PROX_PANIC(rc < 0, "Failed to set IP address %x on device %s: error = %d (%s)\n", ip_cpu, devname, errno, strerror(errno));
+
+ in_addr.sin_addr = *(struct in_addr *)&netmask;
+ ifreq.ifr_netmask = *(struct sockaddr *)&in_addr;
+ rc = ioctl(fd, SIOCSIFNETMASK, &ifreq);
+ PROX_PANIC(rc < 0, "Failed to set netmask %x (prefix %d) on device %s: error = %d (%s)\n", netmask, prefix, devname, errno, strerror(errno));
close(fd);
}
struct rte_eth_dev_info dev_info;
const struct rte_pci_device *pci_dev;
+ for (uint8_t port_id = 0; port_id < PROX_MAX_PORTS; ++port_id) {
+ if (prox_port_cfg[port_id].active && (prox_port_cfg[port_id].virtual == 0) && (port_id >= prox_rte_eth_dev_count_avail())) {
+ PROX_PANIC(1, "port %u used but only %u available\n", port_id, prox_rte_eth_dev_count_avail());
+ }
+ }
for (uint8_t port_id = 0; port_id < PROX_MAX_PORTS; ++port_id) {
if (!prox_port_cfg[port_id].active) {
continue;
}
struct prox_port_cfg* port_cfg = &prox_port_cfg[port_id];
+
+ prox_port_cfg[port_id].n_vlans = 0;
+ while ((prox_port_cfg[port_id].n_vlans < PROX_MAX_VLAN_TAGS) && (prox_port_cfg[port_id].vlan_tags[prox_port_cfg[port_id].n_vlans])) {
+ prox_port_cfg[port_id].n_vlans++;
+ }
+
if (port_cfg->vdev[0]) {
-#if (RTE_VERSION > RTE_VERSION_NUM(17,5,0,1))
- char name[MAX_NAME_SIZE], tap[MAX_NAME_SIZE];
+ char name[MAX_NAME_BUFFER_SIZE], tap[MAX_NAME_SIZE];
snprintf(tap, MAX_NAME_SIZE, "net_tap%d", port_id);
- snprintf(name, MAX_NAME_SIZE, "iface=%s", port_cfg->vdev);
+#if (RTE_VERSION > RTE_VERSION_NUM(17,5,0,1))
+ snprintf(name, MAX_NAME_BUFFER_SIZE, "iface=%s", port_cfg->vdev);
rc = rte_vdev_init(tap, name);
#else
- rc = eth_dev_null_create(tap, name, PROX_RTE_ETHER_MIN_LEN, 0);
+ PROX_PANIC(1, "vdev not supported in DPDK < 17.05\n");
#endif
PROX_PANIC(rc != 0, "Unable to create device %s %s\n", "net tap", port_cfg->vdev);
int vdev_port_id = prox_rte_eth_dev_count_avail() - 1;
PROX_PANIC(vdev_port_id >= PROX_MAX_PORTS, "Too many port defined %d >= %d\n", vdev_port_id, PROX_MAX_PORTS);
plog_info("\tCreating device %s, port %d\n", port_cfg->vdev, vdev_port_id);
+ prox_port_cfg[vdev_port_id].is_vdev = 1;
prox_port_cfg[vdev_port_id].active = 1;
prox_port_cfg[vdev_port_id].dpdk_mapping = port_id;
prox_port_cfg[vdev_port_id].n_txq = 1;
+ prox_port_cfg[vdev_port_id].n_vlans = prox_port_cfg[port_id].n_vlans;
- if (prox_port_cfg[port_id].vlan_tag) {
+ for (uint32_t tag_id = 0; tag_id < prox_port_cfg[port_id].n_vlans; tag_id++) {
+ prox_port_cfg[vdev_port_id].vlan_tags[tag_id] = prox_port_cfg[port_id].vlan_tags[tag_id];
char command[1024];
- snprintf(prox_port_cfg[vdev_port_id].name, MAX_NAME_SIZE, "%s_%d", port_cfg->vdev, prox_port_cfg[port_id].vlan_tag);
- sprintf(command, "ip link add link %s name %s type vlan id %d", port_cfg->vdev, prox_port_cfg[vdev_port_id].name, prox_port_cfg[port_id].vlan_tag);
+ snprintf(prox_port_cfg[vdev_port_id].names[tag_id], MAX_NAME_BUFFER_SIZE, "%s_%d", port_cfg->vdev, prox_port_cfg[port_id].vlan_tags[tag_id]);
+ sprintf(command, "ip link add link %s name %s type vlan id %d", port_cfg->vdev, prox_port_cfg[vdev_port_id].names[tag_id], prox_port_cfg[port_id].vlan_tags[tag_id]);
system(command);
- plog_info("Running %s\n", command);
- plog_info("Using vlan tag %d - added device %s\n", prox_port_cfg[port_id].vlan_tag, prox_port_cfg[vdev_port_id].name);
- } else
- strncpy(prox_port_cfg[vdev_port_id].name, port_cfg->vdev, MAX_NAME_SIZE);
+ plog_info("\tRunning %s\n", command);
+ plog_info("\tUsing vlan tag %d - added device %s\n", prox_port_cfg[port_id].vlan_tags[tag_id], prox_port_cfg[vdev_port_id].names[tag_id]);
+ }
+ if (prox_port_cfg[port_id].n_vlans == 0) {
+ strncpy(prox_port_cfg[vdev_port_id].names[0], port_cfg->vdev, MAX_NAME_SIZE);
+ prox_port_cfg[vdev_port_id].n_vlans = 1;
+ prox_port_cfg[vdev_port_id].vlan_tags[0] = 0;
+ }
prox_port_cfg[port_id].dpdk_mapping = vdev_port_id;
- prox_port_cfg[vdev_port_id].ip = rte_be_to_cpu_32(prox_port_cfg[port_id].ip);
- prox_port_cfg[port_id].ip = 0; // So only vdev has an IP associated
+ uint32_t i = 0;
+ while ((i < PROX_MAX_VLAN_TAGS) && (prox_port_cfg[port_id].ip_addr[i].ip)) {
+ prox_port_cfg[vdev_port_id].ip_addr[i].ip = prox_port_cfg[port_id].ip_addr[i].ip;
+ prox_port_cfg[vdev_port_id].ip_addr[i].prefix = prox_port_cfg[port_id].ip_addr[i].prefix;
+ i++;
+ }
prox_port_cfg[vdev_port_id].type = prox_port_cfg[port_id].type;
if (prox_port_cfg[vdev_port_id].type == PROX_PORT_MAC_HW) {
// If DPDK port MAC set to HW, then make sure the vdev has the same MAC as DPDK port
} else
memcpy(&prox_port_cfg[vdev_port_id].eth_addr, &prox_port_cfg[port_id].eth_addr, sizeof(prox_port_cfg[port_id].eth_addr));
}
+ if (prox_port_cfg[port_id].n_vlans == 0) {
+ prox_port_cfg[port_id].n_vlans = 1;
+ prox_port_cfg[port_id].vlan_tags[0] = 0;
+ }
}
nb_ports = prox_rte_eth_dev_count_avail();
/* get available ports configuration */
nb_ports = PROX_MAX_PORTS;
}
+
+#if (RTE_VERSION >= RTE_VERSION_NUM(17,5,0,0))
port_id_max = -1;
uint16_t id;
RTE_ETH_FOREACH_DEV(id) {
port_id_max = id;
}
}
+#else
+ port_id_max = nb_ports - 1;
+#endif
+
port_id_last = prox_last_port_active();
PROX_PANIC(port_id_last > port_id_max,
"\tError: invalid port(s) specified, last port index active: %d (max index is %d)\n",
port_id_last, port_id_max);
/* Assign ports to PROX interfaces & Read max RX/TX queues per port */
+#if (RTE_VERSION >= RTE_VERSION_NUM(17,5,0,0))
for (uint8_t port_id = 0; port_id <= port_id_last; ++port_id) {
+#else
+ for (uint8_t port_id = 0; port_id <= nb_ports; ++port_id) {
+#endif
/* skip ports that are not enabled */
if (!prox_port_cfg[port_id].active) {
continue;
+#if (RTE_VERSION >= RTE_VERSION_NUM(17,5,0,0))
} else if (prox_port_cfg[port_id].available == 0) {
PROX_PANIC(1, "port %u enabled but not available\n", port_id);
+#endif
}
plog_info("\tGetting info for rte dev %u\n", port_id);
rte_eth_dev_info_get(port_id, &dev_info);
if ((ptr = strstr(port_cfg->short_name, "_pmd")) != NULL) {
*ptr = '\x0';
}
+ // Set socket for vdev device identical to socket of corresponding port
+ if (prox_port_cfg[port_id].is_vdev) {
+ prox_port_cfg[port_id].socket = prox_port_cfg[prox_port_cfg[port_id].dpdk_mapping].socket;
+ continue;
+ }
#if RTE_VERSION < RTE_VERSION_NUM(18,5,0,0)
pci_dev = dev_info.pci_dev;
}
// In DPDK 18.08 vmxnet3 reports it supports IPV4 checksum, but packets does not go through when IPv4 cksum is enabled
- if ((!strcmp(port_cfg->short_name, "vmxnet3")) && (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_IPV4_CKSUM)) {
+ if ((!strcmp(port_cfg->short_name, "vmxnet3")) && (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_IPV4_CKSUM)) {
plog_info("\t\tDisabling IPV4 cksum on vmxnet3\n");
- port_cfg->disabled_tx_offload |= DEV_TX_OFFLOAD_IPV4_CKSUM;
+ port_cfg->disabled_tx_offload |= RTE_ETH_TX_OFFLOAD_IPV4_CKSUM;
}
- if ((!strcmp(port_cfg->short_name, "vmxnet3")) && (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_UDP_CKSUM)) {
+ if ((!strcmp(port_cfg->short_name, "vmxnet3")) && (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_UDP_CKSUM)) {
plog_info("\t\tDisabling UDP cksum on vmxnet3\n");
- port_cfg->disabled_tx_offload |= DEV_TX_OFFLOAD_UDP_CKSUM;
+ port_cfg->disabled_tx_offload |= RTE_ETH_TX_OFFLOAD_UDP_CKSUM;
}
// Some OVS versions reports that they support UDP offload and no IPv4 offload, but fails when UDP offload is enabled
if ((!strcmp(port_cfg->short_name, "virtio")) &&
- ((port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_IPV4_CKSUM) == 0) &&
- (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_UDP_CKSUM)) {
+ ((port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_IPV4_CKSUM) == 0) &&
+ (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_UDP_CKSUM)) {
plog_info("\t\tDisabling UDP cksum on virtio\n");
- port_cfg->disabled_tx_offload |= DEV_TX_OFFLOAD_UDP_CKSUM;
+ port_cfg->disabled_tx_offload |= RTE_ETH_TX_OFFLOAD_UDP_CKSUM;
}
}
}
struct rte_ring* tx_ring = rte_ring_lookup(port_cfg->tx_ring);
PROX_PANIC(tx_ring == NULL, "Ring %s not found for port %d!\n", port_cfg->tx_ring, port_id);
- int ret = rte_eth_from_rings(port_cfg->name, &rx_ring, 1, &tx_ring, 1, rte_socket_id());
+ int ret = rte_eth_from_rings(port_cfg->names[0], &rx_ring, 1, &tx_ring, 1, rte_socket_id());
PROX_PANIC(ret != 0, "Failed to create eth_dev from rings for port %d\n", port_id);
port_cfg->port_conf.intr_conf.lsc = 0; /* Link state interrupt not supported for ring-backed ports */
port_id = port_cfg - prox_port_cfg;
plog_info("\t*** Initializing port %u ***\n", port_id);
- plog_info("\t\tPort name is set to %s\n", port_cfg->name);
+ plog_info("\t\tPort name is set to %s\n", port_cfg->names[0]);
plog_info("\t\tPort max RX/TX queue is %u/%u\n", port_cfg->max_rxq, port_cfg->max_txq);
plog_info("\t\tPort driver is %s\n", port_cfg->driver_name);
#if RTE_VERSION >= RTE_VERSION_NUM(16,4,0,0)
#if RTE_VERSION >= RTE_VERSION_NUM(18,8,0,1)
plog_info("\t\tRX offload capa = 0x%lx = ", port_cfg->dev_info.rx_offload_capa);
- if (port_cfg->dev_info.rx_offload_capa & DEV_RX_OFFLOAD_VLAN_STRIP)
+ if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_VLAN_STRIP)
plog_info("VLAN STRIP | ");
- if (port_cfg->dev_info.rx_offload_capa & DEV_RX_OFFLOAD_IPV4_CKSUM)
+ if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_IPV4_CKSUM)
plog_info("IPV4 CKSUM | ");
- if (port_cfg->dev_info.rx_offload_capa & DEV_RX_OFFLOAD_UDP_CKSUM)
+ if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_UDP_CKSUM)
plog_info("UDP CKSUM | ");
- if (port_cfg->dev_info.rx_offload_capa & DEV_RX_OFFLOAD_TCP_CKSUM)
+ if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_TCP_CKSUM)
plog_info("TCP CKSUM | ");
- if (port_cfg->dev_info.rx_offload_capa & DEV_RX_OFFLOAD_TCP_LRO)
+ if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_TCP_LRO)
plog_info("TCP LRO | ");
- if (port_cfg->dev_info.rx_offload_capa & DEV_RX_OFFLOAD_QINQ_STRIP)
+ if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_QINQ_STRIP)
plog_info("QINQ STRIP | ");
- if (port_cfg->dev_info.rx_offload_capa & DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM)
+ if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM)
plog_info("OUTER_IPV4_CKSUM | ");
- if (port_cfg->dev_info.rx_offload_capa & DEV_RX_OFFLOAD_MACSEC_STRIP)
+ if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_MACSEC_STRIP)
plog_info("MACSEC STRIP | ");
- if (port_cfg->dev_info.rx_offload_capa & DEV_RX_OFFLOAD_HEADER_SPLIT)
+#if defined(RTE_ETH_RX_OFFLOAD_HEADER_SPLIT)
+ if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_HEADER_SPLIT)
plog_info("HEADER SPLIT | ");
- if (port_cfg->dev_info.rx_offload_capa & DEV_RX_OFFLOAD_VLAN_FILTER)
+#endif
+ if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_VLAN_FILTER)
plog_info("VLAN FILTER | ");
- if (port_cfg->dev_info.rx_offload_capa & DEV_RX_OFFLOAD_VLAN_EXTEND)
+ if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_VLAN_EXTEND)
plog_info("VLAN EXTEND | ");
- if (port_cfg->dev_info.rx_offload_capa & DEV_RX_OFFLOAD_JUMBO_FRAME)
+ if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_JUMBO_FRAME)
plog_info("JUMBO FRAME | ");
-#if defined(DEV_RX_OFFLOAD_CRC_STRIP)
- if (port_cfg->dev_info.rx_offload_capa & DEV_RX_OFFLOAD_CRC_STRIP)
+#if defined(RTE_ETH_RX_OFFLOAD_CRC_STRIP)
+ if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_CRC_STRIP)
plog_info("CRC STRIP | ");
#endif
-#if defined(DEV_RX_OFFLOAD_KEEP_CRC)
- if (port_cfg->dev_info.rx_offload_capa & DEV_RX_OFFLOAD_KEEP_CRC)
+#if defined(RTE_ETH_RX_OFFLOAD_KEEP_CRC)
+ if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_KEEP_CRC)
plog_info("KEEP CRC | ");
#endif
- if (port_cfg->dev_info.rx_offload_capa & DEV_RX_OFFLOAD_SCATTER)
+ if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_SCATTER)
plog_info("SCATTER | ");
- if (port_cfg->dev_info.rx_offload_capa & DEV_RX_OFFLOAD_TIMESTAMP)
+ if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_TIMESTAMP)
plog_info("TIMESTAMP | ");
- if (port_cfg->dev_info.rx_offload_capa & DEV_RX_OFFLOAD_SECURITY)
+ if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_SECURITY)
plog_info("SECURITY ");
plog_info("\n");
plog_info("\t\tTX offload capa = 0x%lx = ", port_cfg->dev_info.tx_offload_capa);
- if (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_VLAN_INSERT)
+ if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_VLAN_INSERT)
plog_info("VLAN INSERT | ");
- if (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_IPV4_CKSUM)
+ if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_IPV4_CKSUM)
plog_info("IPV4 CKSUM | ");
- if (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_UDP_CKSUM)
+ if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_UDP_CKSUM)
plog_info("UDP CKSUM | ");
- if (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_TCP_CKSUM)
+ if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_TCP_CKSUM)
plog_info("TCP CKSUM | ");
- if (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_SCTP_CKSUM)
+ if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_SCTP_CKSUM)
plog_info("SCTP CKSUM | ");
- if (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_TCP_TSO)
+ if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_TCP_TSO)
plog_info("TCP TS0 | ");
- if (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_UDP_TSO)
+ if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_UDP_TSO)
plog_info("UDP TSO | ");
- if (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM)
+ if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM)
plog_info("OUTER IPV4 CKSUM | ");
- if (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_QINQ_INSERT)
+ if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_QINQ_INSERT)
plog_info("QINQ INSERT | ");
- if (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_VXLAN_TNL_TSO)
+ if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_VXLAN_TNL_TSO)
plog_info("VLAN TNL TSO | ");
- if (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_GRE_TNL_TSO)
+ if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_GRE_TNL_TSO)
plog_info("GRE TNL TSO | ");
- if (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_IPIP_TNL_TSO)
+ if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_IPIP_TNL_TSO)
plog_info("IPIP TNL TSO | ");
- if (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_GENEVE_TNL_TSO)
+ if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_GENEVE_TNL_TSO)
plog_info("GENEVE TNL TSO | ");
- if (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_MACSEC_INSERT)
+ if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_MACSEC_INSERT)
plog_info("MACSEC INSERT | ");
- if (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_MT_LOCKFREE)
+ if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_MT_LOCKFREE)
plog_info("MT LOCKFREE | ");
- if (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_MULTI_SEGS)
+ if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_MULTI_SEGS)
plog_info("MULTI SEG | ");
- if (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_SECURITY)
+ if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_SECURITY)
plog_info("SECURITY | ");
- if (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_UDP_TNL_TSO)
+ if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_UDP_TNL_TSO)
plog_info("UDP TNL TSO | ");
- if (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_IP_TNL_TSO)
+ if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_IP_TNL_TSO)
plog_info("IP TNL TSO | ");
plog_info("\n");
// or rte_eth_link_get_nowait) might be reported too late
// and might result in wrong exrapolation, and hence should not be used
// for extrapolation purposes
- if (port_cfg->dev_info.speed_capa & ETH_LINK_SPEED_100G)
- port_cfg->max_link_speed = ETH_SPEED_NUM_100G;
- else if (port_cfg->dev_info.speed_capa & ETH_LINK_SPEED_56G)
- port_cfg->max_link_speed = ETH_SPEED_NUM_56G;
- else if (port_cfg->dev_info.speed_capa & ETH_LINK_SPEED_50G)
- port_cfg->max_link_speed = ETH_SPEED_NUM_50G;
- else if (port_cfg->dev_info.speed_capa & ETH_LINK_SPEED_40G)
- port_cfg->max_link_speed = ETH_SPEED_NUM_40G;
- else if (port_cfg->dev_info.speed_capa & ETH_LINK_SPEED_25G)
- port_cfg->max_link_speed = ETH_SPEED_NUM_25G;
- else if (port_cfg->dev_info.speed_capa & ETH_LINK_SPEED_20G)
- port_cfg->max_link_speed = ETH_SPEED_NUM_20G;
- else if (port_cfg->dev_info.speed_capa & ETH_LINK_SPEED_10G)
- port_cfg->max_link_speed = ETH_SPEED_NUM_10G;
- else if (port_cfg->dev_info.speed_capa & ETH_LINK_SPEED_5G)
- port_cfg->max_link_speed = ETH_SPEED_NUM_5G;
- else if (port_cfg->dev_info.speed_capa & ETH_LINK_SPEED_2_5G)
- port_cfg->max_link_speed = ETH_SPEED_NUM_2_5G;
- else if (port_cfg->dev_info.speed_capa & ETH_LINK_SPEED_1G)
- port_cfg->max_link_speed = ETH_SPEED_NUM_1G;
- else if (port_cfg->dev_info.speed_capa & (ETH_LINK_SPEED_100M_HD | ETH_LINK_SPEED_100M))
- port_cfg->max_link_speed = ETH_SPEED_NUM_100M;
- else if (port_cfg->dev_info.speed_capa & (ETH_LINK_SPEED_10M_HD | ETH_LINK_SPEED_10M))
- port_cfg->max_link_speed = ETH_SPEED_NUM_10M;
+ if (port_cfg->dev_info.speed_capa & RTE_ETH_LINK_SPEED_100G)
+ port_cfg->max_link_speed = RTE_ETH_SPEED_NUM_100G;
+ else if (port_cfg->dev_info.speed_capa & RTE_ETH_LINK_SPEED_56G)
+ port_cfg->max_link_speed = RTE_ETH_SPEED_NUM_56G;
+ else if (port_cfg->dev_info.speed_capa & RTE_ETH_LINK_SPEED_50G)
+ port_cfg->max_link_speed = RTE_ETH_SPEED_NUM_50G;
+ else if (port_cfg->dev_info.speed_capa & RTE_ETH_LINK_SPEED_40G)
+ port_cfg->max_link_speed = RTE_ETH_SPEED_NUM_40G;
+ else if (port_cfg->dev_info.speed_capa & RTE_ETH_LINK_SPEED_25G)
+ port_cfg->max_link_speed = RTE_ETH_SPEED_NUM_25G;
+ else if (port_cfg->dev_info.speed_capa & RTE_ETH_LINK_SPEED_20G)
+ port_cfg->max_link_speed = RTE_ETH_SPEED_NUM_20G;
+ else if (port_cfg->dev_info.speed_capa & RTE_ETH_LINK_SPEED_10G)
+ port_cfg->max_link_speed = RTE_ETH_SPEED_NUM_10G;
+ else if (port_cfg->dev_info.speed_capa & RTE_ETH_LINK_SPEED_5G)
+ port_cfg->max_link_speed = RTE_ETH_SPEED_NUM_5G;
+ else if (port_cfg->dev_info.speed_capa & RTE_ETH_LINK_SPEED_2_5G)
+ port_cfg->max_link_speed = RTE_ETH_SPEED_NUM_2_5G;
+ else if (port_cfg->dev_info.speed_capa & RTE_ETH_LINK_SPEED_1G)
+ port_cfg->max_link_speed = RTE_ETH_SPEED_NUM_1G;
+ else if (port_cfg->dev_info.speed_capa & (RTE_ETH_LINK_SPEED_100M_HD | RTE_ETH_LINK_SPEED_100M))
+ port_cfg->max_link_speed = RTE_ETH_SPEED_NUM_100M;
+ else if (port_cfg->dev_info.speed_capa & (RTE_ETH_LINK_SPEED_10M_HD | RTE_ETH_LINK_SPEED_10M))
+ port_cfg->max_link_speed = RTE_ETH_SPEED_NUM_10M;
}
#endif
if (port_cfg->n_rxq > 1) {
// Enable RSS if multiple receive queues
- port_cfg->port_conf.rxmode.mq_mode |= ETH_MQ_RX_RSS;
- port_cfg->port_conf.rx_adv_conf.rss_conf.rss_key = toeplitz_init_key;
- port_cfg->port_conf.rx_adv_conf.rss_conf.rss_key_len = TOEPLITZ_KEY_LEN;
+ if (strcmp(port_cfg->short_name, "virtio")) {
+ port_cfg->port_conf.rxmode.mq_mode |= RTE_ETH_MQ_RX_RSS;
+ port_cfg->port_conf.rx_adv_conf.rss_conf.rss_key = toeplitz_init_key;
+ port_cfg->port_conf.rx_adv_conf.rss_conf.rss_key_len = TOEPLITZ_KEY_LEN;
#if RTE_VERSION >= RTE_VERSION_NUM(2,0,0,0)
- port_cfg->port_conf.rx_adv_conf.rss_conf.rss_hf = ETH_RSS_IP|ETH_RSS_UDP;
+ port_cfg->port_conf.rx_adv_conf.rss_conf.rss_hf = RTE_ETH_RSS_IP|RTE_ETH_RSS_UDP;
#else
- port_cfg->port_conf.rx_adv_conf.rss_conf.rss_hf = ETH_RSS_IPV4|ETH_RSS_NONF_IPV4_UDP;
+ port_cfg->port_conf.rx_adv_conf.rss_conf.rss_hf = RTE_ETH_RSS_IPV4|ETH_RSS_NONF_IPV4_UDP;
#endif
+ }
}
// Make sure that the requested RSS offload is supported by the PMD
#if RTE_VERSION >= RTE_VERSION_NUM(2,0,0,0)
port_cfg->port_conf.rx_adv_conf.rss_conf.rss_hf &= port_cfg->dev_info.flow_type_rss_offloads;
#endif
- plog_info("\t\t Enabling RSS rss_hf = 0x%lx (requested 0x%llx, supported 0x%lx)\n", port_cfg->port_conf.rx_adv_conf.rss_conf.rss_hf, ETH_RSS_IP|ETH_RSS_UDP, port_cfg->dev_info.flow_type_rss_offloads);
+ if (strcmp(port_cfg->short_name, "virtio")) {
+ plog_info("\t\t Enabling RSS rss_hf = 0x%lx (requested 0x%llx, supported 0x%lx)\n", port_cfg->port_conf.rx_adv_conf.rss_conf.rss_hf, RTE_ETH_RSS_IP|RTE_ETH_RSS_UDP, port_cfg->dev_info.flow_type_rss_offloads);
+ } else {
+ plog_info("\t\t Not enabling RSS on virtio port");
+ }
// rxmode such as hw src strip
#if RTE_VERSION >= RTE_VERSION_NUM(18,8,0,1)
-#if defined (DEV_RX_OFFLOAD_CRC_STRIP)
- CONFIGURE_RX_OFFLOAD(DEV_RX_OFFLOAD_CRC_STRIP);
+#if defined (RTE_ETH_RX_OFFLOAD_CRC_STRIP)
+ CONFIGURE_RX_OFFLOAD(RTE_ETH_RX_OFFLOAD_CRC_STRIP);
#endif
-#if defined (DEV_RX_OFFLOAD_KEEP_CRC)
- CONFIGURE_RX_OFFLOAD(DEV_RX_OFFLOAD_KEEP_CRC);
+#if defined (RTE_ETH_RX_OFFLOAD_KEEP_CRC)
+ CONFIGURE_RX_OFFLOAD(RTE_ETH_RX_OFFLOAD_KEEP_CRC);
#endif
- CONFIGURE_RX_OFFLOAD(DEV_RX_OFFLOAD_JUMBO_FRAME);
- CONFIGURE_RX_OFFLOAD(DEV_RX_OFFLOAD_VLAN_STRIP);
+ CONFIGURE_RX_OFFLOAD(RTE_ETH_RX_OFFLOAD_JUMBO_FRAME);
+ CONFIGURE_RX_OFFLOAD(RTE_ETH_RX_OFFLOAD_VLAN_STRIP);
#else
- if (port_cfg->requested_rx_offload & DEV_RX_OFFLOAD_CRC_STRIP) {
+ if (port_cfg->requested_rx_offload & RTE_ETH_RX_OFFLOAD_CRC_STRIP) {
port_cfg->port_conf.rxmode.hw_strip_crc = 1;
}
- if (port_cfg->requested_rx_offload & DEV_RX_OFFLOAD_JUMBO_FRAME) {
+ if (port_cfg->requested_rx_offload & RTE_ETH_RX_OFFLOAD_JUMBO_FRAME) {
port_cfg->port_conf.rxmode.jumbo_frame = 1;
}
#endif
// IPV4, UDP, SCTP Checksums
#if RTE_VERSION >= RTE_VERSION_NUM(18,8,0,1)
- CONFIGURE_TX_OFFLOAD(DEV_TX_OFFLOAD_IPV4_CKSUM);
- CONFIGURE_TX_OFFLOAD(DEV_TX_OFFLOAD_UDP_CKSUM);
- CONFIGURE_TX_OFFLOAD(DEV_TX_OFFLOAD_VLAN_INSERT);
+ CONFIGURE_TX_OFFLOAD(RTE_ETH_TX_OFFLOAD_IPV4_CKSUM);
+ CONFIGURE_TX_OFFLOAD(RTE_ETH_TX_OFFLOAD_UDP_CKSUM);
+ CONFIGURE_TX_OFFLOAD(RTE_ETH_TX_OFFLOAD_VLAN_INSERT);
#else
- if ((port_cfg->dev_info.tx_offload_capa & (DEV_TX_OFFLOAD_IPV4_CKSUM | DEV_TX_OFFLOAD_UDP_CKSUM)) == 0) {
+ if ((port_cfg->dev_info.tx_offload_capa & (RTE_ETH_TX_OFFLOAD_IPV4_CKSUM | RTE_ETH_TX_OFFLOAD_UDP_CKSUM)) == 0) {
port_cfg->tx_conf.txq_flags |= ETH_TXQ_FLAGS_NOOFFLOADS;
plog_info("\t\tDisabling TX offloads as pmd reports that it does not support them)\n");
}
#endif
// Multi Segments
#if RTE_VERSION >= RTE_VERSION_NUM(18,8,0,1)
- CONFIGURE_TX_OFFLOAD(DEV_TX_OFFLOAD_MULTI_SEGS);
+ CONFIGURE_TX_OFFLOAD(RTE_ETH_TX_OFFLOAD_MULTI_SEGS);
#else
if (!strcmp(port_cfg->short_name, "vmxnet3")) {
port_cfg->tx_conf.txq_flags |= ETH_TXQ_FLAGS_NOMULTSEGS;
// Refcount
#if RTE_VERSION >= RTE_VERSION_NUM(18,8,0,1)
- CONFIGURE_TX_OFFLOAD(DEV_TX_OFFLOAD_MBUF_FAST_FREE);
+ CONFIGURE_TX_OFFLOAD(RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE);
#else
if (port_cfg->tx_conf.txq_flags & ETH_TXQ_FLAGS_NOREFCOUNT)
plog_info("\t\tEnabling No refcnt on port %d\n", port_id);
PROX_PANIC(ret < 0, "\n\t\t\trte_eth_dev_start() failed on port %u: error %d\n", port_id, ret);
plog_info(" done: ");
- if (prox_port_cfg[port_id].ip) {
- set_ip_address(prox_port_cfg[port_id].name, &prox_port_cfg[port_id].ip);
+ if (prox_port_cfg[port_id].is_vdev) {
+ for (int vlan_id = 0; vlan_id < prox_port_cfg[port_id].n_vlans; vlan_id++) {
+ set_ip_address(prox_port_cfg[port_id].names[vlan_id], prox_port_cfg[port_id].ip_addr[vlan_id].ip, prox_port_cfg[port_id].ip_addr[vlan_id].prefix);
+ }
}
/* Getting link status can be done without waiting if Link
State Interrupt is enabled since in that case, if the link
if (link.link_status) {
plog_info("Link Up - speed %'u Mbps - %s\n",
link.link_speed,
- (link.link_duplex == ETH_LINK_FULL_DUPLEX) ?
+ (link.link_duplex == RTE_ETH_LINK_FULL_DUPLEX) ?
"full-duplex" : "half-duplex");
}
else {
plog_info("Closing port %u\n", portid);
rte_eth_dev_close(portid);
}
+
+ if (lcore_cfg == NULL)
+ return;
+
+ struct lcore_cfg *lconf = NULL;
+ struct task_args *targ;
+ while (core_targ_next(&lconf, &targ, 0) == 0) {
+ if (targ->pool) {
+ rte_mempool_free(targ->pool);
+ plog_info("freeing pool %p\n", targ->pool);
+ targ->pool = NULL;
+ }
+ }
}
void init_port_addr(void)
Code Review / samplevnf.git / blobdiff