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Merge "CI integration for KVMforNFV."
[kvmfornfv.git]
/
qemu
/
target-cris
/
cpu.h
diff --git
a/qemu/target-cris/cpu.h
b/qemu/target-cris/cpu.h
index
d422e35
..
415cf91
100644
(file)
--- a/
qemu/target-cris/cpu.h
+++ b/
qemu/target-cris/cpu.h
@@
-20,7
+20,6
@@
#ifndef CPU_CRIS_H
#define CPU_CRIS_H
#ifndef CPU_CRIS_H
#define CPU_CRIS_H
-#include "config.h"
#include "qemu-common.h"
#define TARGET_LONG_BITS 32
#include "qemu-common.h"
#define TARGET_LONG_BITS 32
@@
-29,8
+28,6
@@
#include "exec/cpu-defs.h"
#include "exec/cpu-defs.h"
-#define ELF_MACHINE EM_CRIS
-
#define EXCP_NMI 1
#define EXCP_GURU 2
#define EXCP_BUSFAULT 3
#define EXCP_NMI 1
#define EXCP_GURU 2
#define EXCP_BUSFAULT 3
@@
-108,6
+105,11
@@
#define NB_MMU_MODES 2
#define NB_MMU_MODES 2
+typedef struct {
+ uint32_t hi;
+ uint32_t lo;
+} TLBSet;
+
typedef struct CPUCRISState {
uint32_t regs[16];
/* P0 - P15 are referred to as special registers in the docs. */
typedef struct CPUCRISState {
uint32_t regs[16];
/* P0 - P15 are referred to as special registers in the docs. */
@@
-151,7
+153,7
@@
typedef struct CPUCRISState {
uint32_t sregs[4][16];
/* Linear feedback shift reg in the mmu. Used to provide pseudo
uint32_t sregs[4][16];
/* Linear feedback shift reg in the mmu. Used to provide pseudo
- randomness for the 'hint' the mmu gives to sw for chosing valid
+ randomness for the 'hint' the mmu gives to sw for cho
o
sing valid
sets on TLB refills. */
uint32_t mmu_rand_lfsr;
sets on TLB refills. */
uint32_t mmu_rand_lfsr;
@@
-161,11
+163,7
@@
typedef struct CPUCRISState {
*
* One for I and another for D.
*/
*
* One for I and another for D.
*/
- struct
- {
- uint32_t hi;
- uint32_t lo;
- } tlbsets[2][4][16];
+ TLBSet tlbsets[2][4][16];
CPU_COMMON
CPU_COMMON
@@
-224,16
+222,13
@@
enum {
#define cpu_init(cpu_model) CPU(cpu_cris_init(cpu_model))
#define cpu_exec cpu_cris_exec
#define cpu_init(cpu_model) CPU(cpu_cris_init(cpu_model))
#define cpu_exec cpu_cris_exec
-#define cpu_gen_code cpu_cris_gen_code
#define cpu_signal_handler cpu_cris_signal_handler
#define cpu_signal_handler cpu_cris_signal_handler
-#define CPU_SAVE_VERSION 1
-
/* MMU modes definitions */
#define MMU_MODE0_SUFFIX _kernel
#define MMU_MODE1_SUFFIX _user
#define MMU_USER_IDX 1
/* MMU modes definitions */
#define MMU_MODE0_SUFFIX _kernel
#define MMU_MODE1_SUFFIX _user
#define MMU_USER_IDX 1
-static inline int cpu_mmu_index (CPUCRISState *env)
+static inline int cpu_mmu_index (CPUCRISState *env
, bool ifetch
)
{
return !!(env->pregs[PR_CCS] & U_FLAG);
}
{
return !!(env->pregs[PR_CCS] & U_FLAG);
}