4 #include "types.h" // u32
7 * ACPI 2.0 Generic Address Space definition.
9 struct acpi_20_generic_address {
11 u8 register_bit_width;
12 u8 register_bit_offset;
17 #define RSDP_SIGNATURE 0x2052545020445352LL // "RSD PTR "
19 struct rsdp_descriptor { /* Root System Descriptor Pointer */
20 u64 signature; /* ACPI signature, contains "RSD PTR " */
21 u8 checksum; /* To make sum of struct == 0 */
22 u8 oem_id [6]; /* OEM identification */
23 u8 revision; /* Must be 0 for 1.0, 2 for 2.0 */
24 u32 rsdt_physical_address; /* 32-bit physical address of RSDT */
25 u32 length; /* XSDT Length in bytes including hdr */
26 u64 xsdt_physical_address; /* 64-bit physical address of XSDT */
27 u8 extended_checksum; /* Checksum of entire table */
28 u8 reserved [3]; /* Reserved field must be 0 */
31 /* Table structure from Linux kernel (the ACPI tables are under the
34 #define ACPI_TABLE_HEADER_DEF /* ACPI common table header */ \
35 u32 signature; /* ACPI signature (4 ASCII characters) */ \
36 u32 length; /* Length of table, in bytes, including header */ \
37 u8 revision; /* ACPI Specification minor version # */ \
38 u8 checksum; /* To make sum of entire table == 0 */ \
39 u8 oem_id [6]; /* OEM identification */ \
40 u8 oem_table_id [8]; /* OEM table identification */ \
41 u32 oem_revision; /* OEM revision number */ \
42 u8 asl_compiler_id [4]; /* ASL compiler vendor ID */ \
43 u32 asl_compiler_revision; /* ASL compiler revision number */
46 * Fixed ACPI Description Table Fixed Feature Flags
48 #define ACPI_FADT_F_WBINVD (1 << 0)
49 #define ACPI_FADT_F_WBINVD_FLUSH (1 << 1)
50 #define ACPI_FADT_F_PROC_C1 (1 << 2)
51 #define ACPI_FADT_F_P_LVL2_UP (1 << 3)
52 #define ACPI_FADT_F_PWR_BUTTON (1 << 4)
53 #define ACPI_FADT_F_SLP_BUTTON (1 << 5)
54 #define ACPI_FADT_F_FIX_RTC (1 << 6)
55 #define ACPI_FADT_F_RTC_S4 (1 << 7)
56 #define ACPI_FADT_F_TMR_VAL_EXT (1 << 8)
57 #define ACPI_FADT_F_DCK_CAP (1 << 9)
58 #define ACPI_FADT_F_RESET_REG_SUP (1 << 10)
59 #define ACPI_FADT_F_SEALED_CASE (1 << 11)
60 #define ACPI_FADT_F_HEADLESS (1 << 12)
61 #define ACPI_FADT_F_CPU_SW_SLP (1 << 13)
62 #define ACPI_FADT_F_PCI_EXP_WAK (1 << 14)
63 #define ACPI_FADT_F_USE_PLATFORM_CLOCK (1 << 15)
64 #define ACPI_FADT_F_S4_RTC_STS_VALID (1 << 16)
65 #define ACPI_FADT_F_REMOTE_POWER_ON_CAPABLE (1 << 17)
66 #define ACPI_FADT_F_FORCE_APIC_CLUSTER_MODEL (1 << 18)
67 #define ACPI_FADT_F_FORCE_APIC_PHYSICAL_DESTINATION_MODE (1 << 19)
68 #define ACPI_FADT_F_HW_REDUCED_ACPI (1 << 20)
69 #define ACPI_FADT_F_LOW_POWER_S0_IDLE_CAPABLE (1 << 21)
72 * ACPI 1.0 Fixed ACPI Description Table (FADT)
74 #define FACP_SIGNATURE 0x50434146 // FACP
75 struct fadt_descriptor_rev1
77 ACPI_TABLE_HEADER_DEF /* ACPI common table header */
78 u32 firmware_ctrl; /* Physical address of FACS */
79 u32 dsdt; /* Physical address of DSDT */
80 u8 model; /* System Interrupt Model */
81 u8 reserved1; /* Reserved */
82 u16 sci_int; /* System vector of SCI interrupt */
83 u32 smi_cmd; /* Port address of SMI command port */
84 u8 acpi_enable; /* Value to write to smi_cmd to enable ACPI */
85 u8 acpi_disable; /* Value to write to smi_cmd to disable ACPI */
86 u8 S4bios_req; /* Value to write to SMI CMD to enter S4BIOS state */
87 u8 reserved2; /* Reserved - must be zero */
88 u32 pm1a_evt_blk; /* Port address of Power Mgt 1a acpi_event Reg Blk */
89 u32 pm1b_evt_blk; /* Port address of Power Mgt 1b acpi_event Reg Blk */
90 u32 pm1a_cnt_blk; /* Port address of Power Mgt 1a Control Reg Blk */
91 u32 pm1b_cnt_blk; /* Port address of Power Mgt 1b Control Reg Blk */
92 u32 pm2_cnt_blk; /* Port address of Power Mgt 2 Control Reg Blk */
93 u32 pm_tmr_blk; /* Port address of Power Mgt Timer Ctrl Reg Blk */
94 u32 gpe0_blk; /* Port addr of General Purpose acpi_event 0 Reg Blk */
95 u32 gpe1_blk; /* Port addr of General Purpose acpi_event 1 Reg Blk */
96 u8 pm1_evt_len; /* Byte length of ports at pm1_x_evt_blk */
97 u8 pm1_cnt_len; /* Byte length of ports at pm1_x_cnt_blk */
98 u8 pm2_cnt_len; /* Byte Length of ports at pm2_cnt_blk */
99 u8 pm_tmr_len; /* Byte Length of ports at pm_tm_blk */
100 u8 gpe0_blk_len; /* Byte Length of ports at gpe0_blk */
101 u8 gpe1_blk_len; /* Byte Length of ports at gpe1_blk */
102 u8 gpe1_base; /* Offset in gpe model where gpe1 events start */
103 u8 reserved3; /* Reserved */
104 u16 plvl2_lat; /* Worst case HW latency to enter/exit C2 state */
105 u16 plvl3_lat; /* Worst case HW latency to enter/exit C3 state */
106 u16 flush_size; /* Size of area read to flush caches */
107 u16 flush_stride; /* Stride used in flushing caches */
108 u8 duty_offset; /* Bit location of duty cycle field in p_cnt reg */
109 u8 duty_width; /* Bit width of duty cycle field in p_cnt reg */
110 u8 day_alrm; /* Index to day-of-month alarm in RTC CMOS RAM */
111 u8 mon_alrm; /* Index to month-of-year alarm in RTC CMOS RAM */
112 u8 century; /* Index to century in RTC CMOS RAM */
113 u8 reserved4; /* Reserved */
114 u8 reserved4a; /* Reserved */
115 u8 reserved4b; /* Reserved */
119 struct acpi_table_header /* ACPI common table header */
121 ACPI_TABLE_HEADER_DEF
125 * ACPI 1.0 Root System Description Table (RSDT)
127 #define RSDT_SIGNATURE 0x54445352 // RSDT
128 struct rsdt_descriptor_rev1
130 ACPI_TABLE_HEADER_DEF /* ACPI common table header */
131 u32 table_offset_entry[0]; /* Array of pointers to other */
136 * ACPI 1.0 Firmware ACPI Control Structure (FACS)
138 #define FACS_SIGNATURE 0x53434146 // FACS
139 struct facs_descriptor_rev1
141 u32 signature; /* ACPI Signature */
142 u32 length; /* Length of structure, in bytes */
143 u32 hardware_signature; /* Hardware configuration signature */
144 u32 firmware_waking_vector; /* ACPI OS waking vector */
145 u32 global_lock; /* Global Lock */
147 u8 resverved3 [40]; /* Reserved - must be zero */
151 * Differentiated System Description Table (DSDT)
153 #define DSDT_SIGNATURE 0x54445344 // DSDT
156 * MADT values and structures
159 /* Values for MADT PCATCompat */
162 #define MULTIPLE_APIC 1
166 #define APIC_SIGNATURE 0x43495041 // APIC
167 struct multiple_apic_table
169 ACPI_TABLE_HEADER_DEF /* ACPI common table header */
170 u32 local_apic_address; /* Physical address of local APIC */
174 /* Values for Type in APIC sub-headers */
176 #define APIC_PROCESSOR 0
178 #define APIC_XRUPT_OVERRIDE 2
180 #define APIC_LOCAL_NMI 4
181 #define APIC_ADDRESS_OVERRIDE 5
182 #define APIC_IO_SAPIC 6
183 #define APIC_LOCAL_SAPIC 7
184 #define APIC_XRUPT_SOURCE 8
185 #define APIC_RESERVED 9 /* 9 and greater are reserved */
188 * MADT sub-structures (Follow MULTIPLE_APIC_DESCRIPTION_TABLE)
190 #define ACPI_SUB_HEADER_DEF /* Common ACPI sub-structure header */\
194 /* Sub-structures for MADT */
196 struct madt_processor_apic
199 u8 processor_id; /* ACPI processor id */
200 u8 local_apic_id; /* Processor's local APIC id */
207 u8 io_apic_id; /* I/O APIC ID */
208 u8 reserved; /* Reserved - must be zero */
209 u32 address; /* APIC physical address */
210 u32 interrupt; /* Global system interrupt where INTI
214 struct madt_intsrcovr {
222 struct madt_local_nmi {
224 u8 processor_id; /* ACPI processor id */
225 u16 flags; /* MPS INTI flags */
226 u8 lint; /* Local APIC LINT# */
230 * HPET Description Table
232 #define HPET_SIGNATURE 0x54455048 // HPET
233 struct acpi_20_hpet {
234 ACPI_TABLE_HEADER_DEF /* ACPI common table header */
236 struct acpi_20_generic_address addr;
243 * SRAT (NUMA topology description) table
246 #define SRAT_SIGNATURE 0x54415253 // SRAT
247 struct system_resource_affinity_table
249 ACPI_TABLE_HEADER_DEF
254 #define SRAT_PROCESSOR 0
255 #define SRAT_MEMORY 1
257 struct srat_processor_affinity
268 struct srat_memory_affinity
280 /* PCI fw r3.0 MCFG table. */
282 struct acpi_mcfg_allocation {
283 u64 address; /* Base address, processor-relative */
284 u16 pci_segment; /* PCI segment group number */
285 u8 start_bus_number; /* Starting PCI Bus number */
286 u8 end_bus_number; /* Final PCI Bus number */
290 #define MCFG_SIGNATURE 0x4746434d // MCFG
291 struct acpi_table_mcfg {
292 ACPI_TABLE_HEADER_DEF;
294 struct acpi_mcfg_allocation allocation[0];