2 * Copyright (c) 2010 Andrei Faur <da3drus@gmail.com>
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of the
7 * License, or any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
21 FILE_LICENCE ( GPL2_OR_LATER );
31 #include <ipxe/ethernet.h>
32 #include <ipxe/if_ether.h>
34 #include <ipxe/iobuf.h>
35 #include <ipxe/malloc.h>
36 #include <ipxe/netdevice.h>
38 #include <ipxe/timer.h>
42 static u16 pcnet32_wio_read_csr ( unsigned long addr, int index )
44 outw ( index, addr + PCNET32_WIO_RAP );
45 return inw ( addr + PCNET32_WIO_RDP );
48 static void pcnet32_wio_write_csr ( unsigned long addr, int index, u16 val )
50 outw ( index, addr + PCNET32_WIO_RAP );
51 outw ( val, addr + PCNET32_WIO_RDP );
54 static u16 pcnet32_wio_read_bcr ( unsigned long addr, int index )
56 outw ( index, addr + PCNET32_WIO_RAP );
57 return inw ( addr + PCNET32_WIO_BDP );
60 static void pcnet32_wio_write_bcr ( unsigned long addr, int index, u16 val )
62 outw ( index, addr + PCNET32_WIO_RAP );
63 outw ( val, addr + PCNET32_WIO_BDP );
66 static u16 pcnet32_wio_read_rap ( unsigned long addr )
68 return inw ( addr + PCNET32_WIO_RAP );
71 static void pcnet32_wio_write_rap ( unsigned long addr , u16 val )
73 outw ( val, addr + PCNET32_WIO_RAP );
76 static void pcnet32_wio_reset ( unsigned long addr )
78 inw ( addr + PCNET32_WIO_RESET );
81 static int pcnet32_wio_check ( unsigned long addr )
83 outw ( 88, addr + PCNET32_WIO_RAP );
84 return ( inw ( addr + PCNET32_WIO_RAP ) == 88 );
87 static struct pcnet32_access pcnet32_wio = {
88 .read_csr = pcnet32_wio_read_csr,
89 .write_csr = pcnet32_wio_write_csr,
90 .read_bcr = pcnet32_wio_read_bcr,
91 .write_bcr = pcnet32_wio_write_bcr,
92 .read_rap = pcnet32_wio_read_rap,
93 .write_rap = pcnet32_wio_write_rap,
94 .reset = pcnet32_wio_reset,
97 static u16 pcnet32_dwio_read_csr ( unsigned long addr, int index )
99 outl ( index, addr + PCNET32_DWIO_RAP );
100 return ( inl ( addr + PCNET32_DWIO_RDP ) & 0xffff );
103 static void pcnet32_dwio_write_csr ( unsigned long addr, int index, u16 val )
105 outl ( index, addr + PCNET32_DWIO_RAP );
106 outl ( val, addr + PCNET32_DWIO_RDP );
109 static u16 pcnet32_dwio_read_bcr ( unsigned long addr, int index )
111 outl ( index, addr + PCNET32_DWIO_RAP );
112 return ( inl ( addr + PCNET32_DWIO_BDP ) & 0xffff );
115 static void pcnet32_dwio_write_bcr ( unsigned long addr, int index, u16 val )
117 outl ( index, addr + PCNET32_DWIO_RAP );
118 outl ( val, addr + PCNET32_DWIO_BDP );
121 static u16 pcnet32_dwio_read_rap ( unsigned long addr )
123 return ( inl ( addr + PCNET32_DWIO_RAP ) & 0xffff );
126 static void pcnet32_dwio_write_rap ( unsigned long addr , u16 val )
128 outl ( val, addr + PCNET32_DWIO_RAP );
131 static void pcnet32_dwio_reset ( unsigned long addr )
133 inl ( addr + PCNET32_DWIO_RESET );
136 static int pcnet32_dwio_check ( unsigned long addr )
138 outl ( 88, addr + PCNET32_DWIO_RAP );
139 return ( ( inl ( addr + PCNET32_DWIO_RAP ) & 0xffff ) == 88 );
143 static struct pcnet32_access pcnet32_dwio = {
144 .read_csr = pcnet32_dwio_read_csr,
145 .write_csr = pcnet32_dwio_write_csr,
146 .read_bcr = pcnet32_dwio_read_bcr,
147 .write_bcr = pcnet32_dwio_write_bcr,
148 .read_rap = pcnet32_dwio_read_rap,
149 .write_rap = pcnet32_dwio_write_rap,
150 .reset = pcnet32_dwio_reset,
154 pcnet32_mdio_read ( struct net_device *netdev, int phy, int reg )
156 struct pcnet32_private *priv = netdev->priv;
157 unsigned long ioaddr = priv->pci_dev->ioaddr;
163 /* First, select PHY chip and the register we want to read */
164 priv->a->write_bcr ( ioaddr, 33,
165 ( ( phy & 0x1f ) << 5 ) | ( reg & 0x1f ) );
167 /* Read the selected register's value */
168 val_out = priv->a->read_bcr ( ioaddr, 34 );
174 __unused pcnet32_mdio_write ( struct net_device *netdev, int phy, int reg, int val )
176 struct pcnet32_private *priv = netdev->priv;
177 unsigned long ioaddr = priv->pci_dev->ioaddr;
182 /* First, select PHY chip and the register we want to write to */
183 priv->a->write_bcr ( ioaddr, 33,
184 ( ( phy & 0x1f ) << 5 ) | ( reg & 0x1f ) );
186 /* Write val to the selected register */
187 priv->a->write_bcr ( ioaddr, 34, val );
192 * pcnet32_refill_rx_ring - Allocates iobufs for every Rx descriptor
193 * that doesn't have one and isn't in use by the hardware
195 * @v priv Driver private structure
198 pcnet32_refill_rx_ring ( struct pcnet32_private *priv )
200 struct pcnet32_rx_desc *rx_curr_desc;
204 DBGP ( "pcnet32_refill_rx_ring\n" );
206 for ( i = 0; i < RX_RING_SIZE; i++ ) {
207 rx_curr_desc = priv->rx_base + i;
209 status = le16_to_cpu ( rx_curr_desc->status );
211 /* Don't touch descriptors owned by the hardware */
212 if ( status & DescOwn )
215 /* Descriptors with iobufs still need to be processed */
216 if ( priv->rx_iobuf[i] != NULL )
219 /* If alloc_iob fails, try again later (next poll) */
220 if ( ! ( priv->rx_iobuf[i] = alloc_iob ( PKT_BUF_SIZE ) ) ) {
221 DBG ( "Refill rx ring failed\n" );
226 cpu_to_le32 ( virt_to_bus ( priv->rx_iobuf[i]->data ) );
227 rx_curr_desc->buf_length = cpu_to_le16 ( -PKT_BUF_SIZE );
228 rx_curr_desc->msg_length = rx_curr_desc->reserved = 0;
230 /* Owner changes after the other status fields are set */
232 rx_curr_desc->status = cpu_to_le16 ( DescOwn );
238 * pcnet32_setup_rx_resources - allocate Rx resources (Descriptors)
240 * @v priv Driver private structure
242 * @ret rc Returns 0 on success, negative on failure
245 pcnet32_setup_rx_resources ( struct pcnet32_private *priv )
247 DBGP ( "pcnet32_setup_rx_resources\n" );
249 priv->rx_base = malloc_dma ( RX_RING_BYTES, RX_RING_ALIGN );
251 DBG ( "priv->rx_base = %#08lx\n", virt_to_bus ( priv->rx_base ) );
253 if ( ! priv->rx_base ) {
257 memset ( priv->rx_base, 0, RX_RING_BYTES );
259 pcnet32_refill_rx_ring ( priv );
267 pcnet32_free_rx_resources ( struct pcnet32_private *priv )
271 DBGP ( "pcnet32_free_rx_resources\n" );
273 free_dma ( priv->rx_base, RX_RING_BYTES );
275 for ( i = 0; i < RX_RING_SIZE; i++ ) {
276 free_iob ( priv->rx_iobuf[i] );
277 priv->rx_iobuf[i] = NULL;
282 * pcnet32_setup_tx_resources - allocate Tx resources (Descriptors)
284 * @v priv Driver private structure
286 * @ret rc Returns 0 on success, negative on failure
289 pcnet32_setup_tx_resources ( struct pcnet32_private *priv )
291 DBGP ( "pcnet32_setup_tx_resources\n" );
293 priv->tx_base = malloc_dma ( TX_RING_BYTES, TX_RING_ALIGN );
295 if ( ! priv->tx_base ) {
299 memset ( priv->tx_base, 0, TX_RING_BYTES );
301 DBG ( "priv->tx_base = %#08lx\n", virt_to_bus ( priv->tx_base ) );
304 priv->tx_fill_ctr = 0;
311 pcnet32_free_tx_resources ( struct pcnet32_private *priv )
313 DBGP ( "pcnet32_free_tx_resources\n" );
315 free_dma ( priv->tx_base, TX_RING_BYTES );
319 pcnet32_chip_detect ( struct pcnet32_private *priv )
324 unsigned long ioaddr;
325 struct pcnet32_access *a;
329 ioaddr = priv->pci_dev->ioaddr;
332 chip_version = a->read_csr ( ioaddr, 88 )
333 | ( a->read_csr ( ioaddr, 89 ) << 16 );
337 DBG ( "PCnet chip version is 0x%X\n", chip_version );
338 if ( ( chip_version & 0xfff ) != 0x003 )
339 goto err_unsupported;
341 fdx = mii = fset = 0;
342 chip_version = ( chip_version >> 12 ) & 0xffff;
344 switch (chip_version) {
346 chipname = "PCnet/PCI 79C970";
349 /* 970 gives the wrong chip id back */
350 chipname = "PCnet/PCI 79C970";
353 chipname = "PCnet/PCI II 79C970A";
357 chipname = "PCnet/FAST 79C971";
363 chipname = "PCnet/FAST+ 79C972";
369 chipname = "PCnet/FAST III 79C973";
374 chipname = "PCnet/Home 79C978";
377 * This is based on specs published at www.amd.com. This section
378 * assumes that a NIC with a 79C978 wants to go into 1Mb HomePNA
379 * mode. The 79C978 can also go into standard ethernet, and
380 * there probably should be some sort of module option to select
381 * the mode by which the card should operate
383 /* switch to home wiring mode */
384 media = a->read_bcr(ioaddr, 49);
386 DBG ( "media reset to %#x.\n", media );
387 a->write_bcr(ioaddr, 49, media);
390 chipname = "PCnet/FAST III 79C975";
395 chipname = "PCnet/PRO 79C976";
400 chipname = "UNKNOWN";
401 DBG ( "PCnet version %#x, no PCnet32 chip.\n", chip_version );
402 goto err_unsupported;
405 DBG ( "PCnet chipname %s\n", chipname );
408 * On selected chips turn on the BCR18:NOUFLO bit. This stops transmit
409 * starting until the packet is loaded. Strike one for reliability, lose
410 * one for latency - although on PCI this isn't a big loss. Older chips
411 * have FIFO's smaller than a packet, so you can't do this.
412 * Turn on BCR18:BurstRdEn and BCR18:BurstWrEn.
415 a->write_bcr ( ioaddr, 18,
416 ( a->read_bcr ( ioaddr, 18 ) | 0x0860 ) );
417 a->write_csr ( ioaddr, 80,
418 ( a->read_csr ( ioaddr, 80 ) & 0x0C00) | 0x0C00 );
421 priv->full_duplex = fdx;
431 * pcnet32_set_ops - Determines the ops used to access the registers
433 * @v priv Driver private structure
435 * @ret rc Returns 0 on success, negative on failure
438 pcnet32_set_ops ( struct pcnet32_private *priv )
441 unsigned long ioaddr;
443 ioaddr = priv->pci_dev->ioaddr;
445 /* Check if CSR0 has its default value and perform a write / read
446 in the RAP register to see if it works. Based on these results
447 determine what mode the NIC is in (WIO / DWIO)
451 if ( pcnet32_wio_read_csr ( ioaddr, 0 ) == 4 &&
452 pcnet32_wio_check ( ioaddr ) ) {
453 priv->a = &pcnet32_wio;
455 pcnet32_dwio_reset ( ioaddr );
456 if ( pcnet32_dwio_read_csr ( ioaddr, 0 ) == 4 &&
457 pcnet32_dwio_check ( ioaddr ) ) {
458 priv->a = &pcnet32_dwio;
460 goto err_unsupported;
471 * pcnet32_setup_init_block - setup the NICs initialization block
473 * @v priv Driver private structure
475 * @ret rc Returns 0 on success, negative on failure
478 pcnet32_setup_init_block ( struct pcnet32_private *priv )
482 /* Configure the network port based on what we've established so far */
483 priv->init_block.mode =
484 cpu_to_le16 ( ( priv->options & PCNET32_PORT_PORTSEL ) << 7 );
486 /* Setup RLEN and TLEN fields */
487 priv->init_block.tlen_rlen =
488 cpu_to_le16 ( ( PCNET32_LOG_RX_BUFFERS << 4 ) |
489 ( PCNET32_LOG_TX_BUFFERS << 12 ) );
491 /* Fill in physical address */
492 for ( i = 0; i < ETH_ALEN; i++)
493 priv->init_block.phys_addr[i] = priv->netdev->hw_addr[i];
495 /* No multicasting scheme, accept everything */
496 priv->init_block.filter[0] = 0xffffffff;
497 priv->init_block.filter[1] = 0xffffffff;
499 priv->init_block.rx_ring =
500 cpu_to_le32 ( virt_to_bus ( priv->rx_base ) );
501 priv->init_block.tx_ring =
502 cpu_to_le32 ( virt_to_bus ( priv->tx_base ) );
504 /* Make sure all changes are visible */
509 * pcnet32_setup_probe_phy - go through all PHYs and see which one is present
511 * @v priv Driver private structure
514 pcnet32_setup_probe_phy ( struct pcnet32_private *priv )
516 unsigned long ioaddr = priv->pci_dev->ioaddr;
517 unsigned int phycount = 0;
522 phy_id = ( ( priv->a->read_bcr ( ioaddr, 33 ) ) >> 5 ) & 0x1f;
523 for ( i = 0; i < PCNET32_MAX_PHYS; i++ ) {
524 unsigned short id1, id2;
525 id1 = pcnet32_mdio_read ( priv->netdev, i, MII_PHYSID1 );
528 id2 = pcnet32_mdio_read ( priv->netdev, i, MII_PHYSID2 );
531 if ( i == 31 && ( ( priv->chip_version + 1 ) & 0xfffe ) == 0x2624 )
537 priv->a->write_bcr ( ioaddr, 33, phy_id << 5 );
539 priv->options |= PCNET32_PORT_MII;
544 * pcnet32_setup_mac_addr - check for inconsistency between CSR12-14
547 * @v priv Driver private structure
550 pcnet32_setup_mac_addr ( struct pcnet32_private *priv )
553 u8 promaddr[ETH_ALEN];
554 unsigned long ioaddr = priv->pci_dev->ioaddr;
556 /* In most chips, after a chip reset, the ethernet address is read from
557 * the station address PROM at the base address and programmed into the
558 * "Physical Address Registers" CSR12-14.
559 * As a precautionary measure, we read the PROM values and complain if
560 * they disagree with the CSRs. If they miscompare, and the PROM addr
561 * is valid, then the PROM addr is used.
563 for ( i = 0; i < 3; i++ ) {
565 val = priv->a->read_csr ( ioaddr, i + 12 ) & 0x0ffff;
566 /* There may be endianness issues here. */
567 priv->netdev->hw_addr[2 * i] = val & 0x0ff;
568 priv->netdev->hw_addr[2 * i + 1] = ( val >> 8 ) & 0x0ff;
571 for ( i = 0; i < ETH_ALEN; i++ )
572 promaddr[i] = inb ( ioaddr + i );
574 if ( memcmp ( promaddr, priv->netdev->hw_addr, ETH_ALEN ) ||
575 ! is_valid_ether_addr ( priv->netdev->hw_addr ) ) {
576 if ( is_valid_ether_addr ( promaddr ) ) {
577 DBG ( "CSR address is invalid, using PROM addr\n" );
578 memcpy ( priv->netdev->hw_addr, promaddr, ETH_ALEN );
582 /* If ethernet address is not valid, return error */
583 if ( ! is_valid_ether_addr ( priv->netdev->hw_addr ) )
584 return -EADDRNOTAVAIL;
590 * pcnet32_setup_if_duplex - Sets the NICs used interface and duplex mode
592 * @v priv Driver private structure
595 pcnet32_setup_if_duplex ( struct pcnet32_private *priv )
597 unsigned long ioaddr = priv->pci_dev->ioaddr;
600 /* Set/Reset autoselect bit */
601 val = priv->a->read_bcr ( ioaddr, 2 ) & ~2;
602 if ( priv->options & PCNET32_PORT_ASEL )
604 priv->a->write_bcr ( ioaddr, 2, val );
606 /* Handle full duplex setting */
607 if ( priv->full_duplex ) {
608 val = priv->a->read_bcr ( ioaddr, 9 ) & ~3;
609 if ( priv->options & PCNET32_PORT_FD ) {
611 if ( priv->options == ( PCNET32_PORT_FD | PCNET32_PORT_AUI ) )
613 } else if ( priv->options & PCNET32_PORT_ASEL ) {
614 /* Workaround of xSeries 250, on for 79C975 only */
615 if ( priv->chip_version == 0x2627 )
618 priv->a->write_bcr ( ioaddr, 9, val );
621 /* Set/Reset GPSI bit in test register */
622 val = priv->a->read_csr ( ioaddr, 124 ) & ~0x10;
623 if ( ( priv->options & PCNET32_PORT_PORTSEL ) == PCNET32_PORT_GPSI )
625 priv->a->write_bcr ( ioaddr, 124, val );
627 /* Allied Telesyn AT are 100Mbit only and do not negotiate */
628 u16 subsys_vend_id, subsys_dev_id;
629 pci_read_config_word ( priv->pci_dev,
630 PCI_SUBSYSTEM_VENDOR_ID,
632 pci_read_config_word ( priv->pci_dev,
635 if ( subsys_vend_id == PCI_VENDOR_ID_AT &&
636 ( ( subsys_dev_id == PCI_SUBDEVICE_ID_AT_2700FX ) ||
637 ( subsys_dev_id == PCI_SUBDEVICE_ID_AT_2701FX ) ) ) {
638 priv->options = PCNET32_PORT_FD | PCNET32_PORT_100;
641 if ( priv->mii && ! ( priv->options & PCNET32_PORT_ASEL ) ) {
642 /* Disable Auto Negotiation, set 10Mbps, HD */
643 val = priv->a->read_bcr ( ioaddr, 32 ) & ~0x38;
644 if ( priv->options & PCNET32_PORT_FD )
646 if ( priv->options & PCNET32_PORT_100 )
648 priv->a->write_bcr ( ioaddr, 32, val );
649 } else if ( priv->options & PCNET32_PORT_ASEL ) {
650 /* 79C970 chips do not have the BCR32 register */
651 if ( ( priv->chip_version != 0x2420 ) &&
652 ( priv->chip_version != 0x2621 ) ) {
653 /* Enable Auto Negotiation, setup, disable FD */
654 val = priv->a->read_bcr ( ioaddr, 32 ) & ~0x98;
656 priv->a->write_bcr ( ioaddr, 32, val );
662 * pcnet32_hw_start - Starts up the NIC
664 * @v priv Driver private structure
667 pcnet32_hw_start ( struct pcnet32_private *priv )
669 unsigned long ioaddr = priv->pci_dev->ioaddr;
672 /* Begin initialization procedure */
673 priv->a->write_csr ( ioaddr, 0, Init );
675 /* Wait for the initialization to be done */
678 if ( priv->a->read_csr ( ioaddr, 0 ) & InitDone )
682 priv->a->write_csr ( ioaddr, 0, Strt );
686 * open - Called when a network interface is made active
688 * @v netdev Network device
689 * @ret rc Return status code, 0 on success, negative value on failure
692 pcnet32_open ( struct net_device *netdev )
694 struct pcnet32_private *priv = netdev_priv ( netdev );
695 unsigned long ioaddr = priv->pci_dev->ioaddr;
699 /* Setup TX and RX descriptors */
700 if ( ( rc = pcnet32_setup_tx_resources ( priv ) ) != 0 ) {
701 DBG ( "Error setting up TX resources\n" );
705 if ( ( rc = pcnet32_setup_rx_resources ( priv ) ) != 0 ) {
706 DBG ( "Error setting up RX resources\n" );
711 priv->a->reset ( ioaddr );
713 /* Switch pcnet32 to 32bit mode */
714 priv->a->write_bcr ( ioaddr, 20, PCNET32_SWSTYLE_PCNET32 );
716 /* Setup the interface and duplex mode */
717 pcnet32_setup_if_duplex ( priv );
719 /* Disable interrupts */
720 val = priv->a->read_csr ( ioaddr, 3 );
721 val |= BablMask | MissFrameMask | RxIntMask | TxIntMask | InitDoneMask;
722 priv->a->write_csr ( ioaddr, 3, val );
724 /* Setup initialization block */
725 pcnet32_setup_init_block ( priv );
727 /* Fill in the address of the initialization block */
728 priv->a->write_csr ( ioaddr, 1,
729 ( virt_to_bus ( &priv->init_block ) ) & 0xffff );
730 priv->a->write_csr ( ioaddr, 2,
731 ( virt_to_bus ( &priv->init_block ) ) >> 16 );
733 /* Enable Auto-Pad, disable interrupts */
734 priv->a->write_csr ( ioaddr, 4, 0x0915 );
736 pcnet32_hw_start ( priv );
741 pcnet32_free_tx_resources ( priv );
743 priv->a->reset( priv->pci_dev->ioaddr );
748 * transmit - Transmit a packet
750 * @v netdev Network device
751 * @v iobuf I/O buffer
753 * @ret rc Returns 0 on success, negative on failure
756 pcnet32_transmit ( struct net_device *netdev, struct io_buffer *iobuf )
758 struct pcnet32_private *priv = netdev_priv ( netdev );
759 unsigned long ioaddr = priv->pci_dev->ioaddr;
760 uint32_t tx_len = iob_len ( iobuf );
761 struct pcnet32_tx_desc *tx_curr_desc;
763 DBGP ( "pcnet32_transmit\n" );
765 if ( priv->tx_fill_ctr == TX_RING_SIZE ) {
766 DBG ( "Tx overflow\n" );
770 priv->tx_iobuf[priv->tx_curr] = iobuf;
772 tx_curr_desc = priv->tx_base + priv->tx_curr;
774 /* Configure current descriptor to transmit packet */
775 tx_curr_desc->length = cpu_to_le16 ( -tx_len );
776 tx_curr_desc->misc = 0x00000000;
777 tx_curr_desc->base = cpu_to_le32 ( virt_to_bus ( iobuf->data ) );
779 /* Owner changes after the other status fields are set */
781 tx_curr_desc->status =
782 cpu_to_le16 ( DescOwn | StartOfPacket | EndOfPacket );
784 /* Trigger an immediate send poll */
785 priv->a->write_csr ( ioaddr, 0,
786 ( priv->irq_enabled ? IntEnable : 0 ) | TxDemand );
788 /* Point to the next free descriptor */
789 priv->tx_curr = ( priv->tx_curr + 1 ) % TX_RING_SIZE;
791 /* Increment number of tx descriptors in use */
798 * pcnet32_process_tx_packets - Checks for successfully sent packets,
799 * reports them to iPXE with netdev_tx_complete()
801 * @v netdev Network device
804 pcnet32_process_tx_packets ( struct net_device *netdev )
806 struct pcnet32_private *priv = netdev_priv ( netdev );
807 struct pcnet32_tx_desc *tx_curr_desc;
809 DBGP ( "pcnet32_process_tx_packets\n" );
811 while ( priv->tx_tail != priv->tx_curr ) {
812 tx_curr_desc = priv->tx_base + priv->tx_tail;
814 u16 status = le16_to_cpu ( tx_curr_desc->status );
816 DBG ( "Before OWN bit check, status: %#08x\n", status );
818 /* Skip this descriptor if hardware still owns it */
819 if ( status & DescOwn )
822 DBG ( "Transmitted packet.\n" );
823 DBG ( "priv->tx_fill_ctr= %d\n", priv->tx_fill_ctr );
824 DBG ( "priv->tx_tail = %d\n", priv->tx_tail );
825 DBG ( "priv->tx_curr = %d\n", priv->tx_curr );
826 DBG ( "tx_curr_desc = %#08lx\n", virt_to_bus ( tx_curr_desc ) );
828 /* This packet is ready for completion */
829 netdev_tx_complete ( netdev, priv->tx_iobuf[priv->tx_tail]);
831 /* Clear the descriptor */
832 memset ( tx_curr_desc, 0, sizeof(*tx_curr_desc) );
834 /* Reduce the number of tx descriptors in use */
837 /* Go to next available descriptor */
838 priv->tx_tail = ( priv->tx_tail + 1 ) % TX_RING_SIZE;
843 * pcnet32_process_rx_packets - Checks for received packets, reports them
844 * to iPXE with netdev_rx() or netdev_rx_err() if there was an error receiving
847 * @v netdev Network device
850 pcnet32_process_rx_packets ( struct net_device *netdev )
852 struct pcnet32_private *priv = netdev_priv ( netdev );
853 struct pcnet32_rx_desc *rx_curr_desc;
858 DBGP ( "pcnet32_process_rx_packets\n" );
860 for ( i = 0; i < RX_RING_SIZE; i++ ) {
861 rx_curr_desc = priv->rx_base + priv->rx_curr;
863 status = le16_to_cpu ( rx_curr_desc->status );
866 DBG ( "Before OWN bit check, status: %#08x\n", status );
868 /* Skip this descriptor if hardware still owns it */
869 if ( status & DescOwn )
872 /* We own the descriptor, but it has not been refilled yet */
873 if ( priv->rx_iobuf[priv->rx_curr] == NULL )
876 DBG ( "Received packet.\n" );
877 DBG ( "priv->rx_curr = %d\n", priv->rx_curr );
878 DBG ( "rx_len = %d\n",
879 ( le32_to_cpu ( rx_curr_desc->msg_length ) & 0xfff ) - 4 );
880 DBG ( "rx_curr_desc = %#08lx\n",
881 virt_to_bus ( rx_curr_desc ) );
884 if ( status & 0x4000 ) {
885 netdev_rx_err ( netdev, priv->rx_iobuf[priv->rx_curr],
887 DBG ( "Corrupted packet received!\n");
889 /* Adjust size of the iobuf to reflect received data */
890 len = ( le32_to_cpu ( rx_curr_desc->msg_length ) & 0xfff ) - 4;
891 iob_put ( priv->rx_iobuf[priv->rx_curr], len );
893 /* Add this packet to the receive queue */
894 netdev_rx ( netdev, priv->rx_iobuf[priv->rx_curr] );
897 /* Invalidate iobuf and descriptor */
898 priv->rx_iobuf[priv->rx_curr] = NULL;
899 memset ( rx_curr_desc, 0, sizeof(*rx_curr_desc) );
901 /* Point to the next free descriptor */
902 priv->rx_curr = ( priv->rx_curr + 1 ) % RX_RING_SIZE;
905 /* Allocate new iobufs where needed */
906 pcnet32_refill_rx_ring ( priv );
910 * poll - Poll for received packets
912 * @v netdev Network device
915 pcnet32_poll ( struct net_device *netdev )
917 struct pcnet32_private *priv = netdev_priv ( netdev );
918 unsigned long ioaddr = priv->pci_dev->ioaddr;
921 DBGP ( "pcnet32_poll\n" );
923 status = priv->a->read_csr ( ioaddr, 0 );
925 /* Clear interrupts */
926 priv->a->write_csr ( ioaddr, 0, status );
928 DBG ( "pcnet32_poll: mask = %#04x, status = %#04x\n",
929 priv->a->read_csr ( ioaddr, 3 ), status );
931 /* Return when RINT or TINT are not set */
932 if ( ( status & 0x0500 ) == 0x0000 )
935 /* Process transmitted packets */
936 pcnet32_process_tx_packets ( netdev );
938 /* Process received packets */
939 pcnet32_process_rx_packets ( netdev );
943 * close - Disable network interface
945 * @v netdev network interface device structure
948 pcnet32_close ( struct net_device *netdev )
950 struct pcnet32_private *priv = netdev_priv ( netdev );
951 unsigned long ioaddr = priv->pci_dev->ioaddr;
953 DBGP ( "pcnet32_close\n" );
956 pcnet32_wio_reset ( ioaddr );
958 /* Stop the PCNET32 - it occasionally polls memory if we don't */
959 priv->a->write_csr ( ioaddr, 0, Stop );
961 /* Switch back to 16bit mode to avoid problems with dumb
962 * DOS packet driver after a warm reboot */
963 priv->a->write_bcr ( ioaddr, 20, PCNET32_SWSTYLE_LANCE );
965 pcnet32_free_rx_resources ( priv );
966 pcnet32_free_tx_resources ( priv );
969 static void pcnet32_irq_enable ( struct pcnet32_private *priv )
971 unsigned long ioaddr = priv->pci_dev->ioaddr;
974 DBGP ( "pcnet32_irq_enable\n" );
976 /* Enable TINT and RINT masks */
977 val = priv->a->read_csr ( ioaddr, 3 );
978 val &= ~( RxIntMask | TxIntMask );
979 priv->a->write_csr ( ioaddr, 3, val );
981 /* Enable interrupts */
982 priv->a->write_csr ( ioaddr, 0, IntEnable );
984 priv->irq_enabled = 1;
987 static void pcnet32_irq_disable ( struct pcnet32_private *priv )
989 unsigned long ioaddr = priv->pci_dev->ioaddr;
991 DBGP ( "pcnet32_irq_disable\n" );
993 priv->a->write_csr ( ioaddr, 0, 0x0000 );
995 priv->irq_enabled = 0;
999 * irq - enable or disable interrupts
1001 * @v netdev network adapter
1002 * @v action requested interrupt action
1005 pcnet32_irq ( struct net_device *netdev, int action )
1007 struct pcnet32_private *priv = netdev_priv ( netdev );
1009 DBGP ( "pcnet32_irq\n" );
1013 pcnet32_irq_disable ( priv );
1016 pcnet32_irq_enable ( priv );
1021 static struct net_device_operations pcnet32_operations = {
1022 .open = pcnet32_open,
1023 .transmit = pcnet32_transmit,
1024 .poll = pcnet32_poll,
1025 .close = pcnet32_close,
1030 * probe - Initial configuration of NIC
1032 * @v pdev PCI device
1035 * @ret rc Return status code
1038 pcnet32_probe ( struct pci_device *pdev )
1040 struct net_device *netdev;
1041 struct pcnet32_private *priv;
1042 unsigned long ioaddr;
1045 DBGP ( "pcnet32_probe\n" );
1047 DBG ( "Found %s, vendor = %#04x, device = %#04x\n",
1048 pdev->id->name, pdev->id->vendor, pdev->id->device );
1050 /* Allocate our private data */
1051 netdev = alloc_etherdev ( sizeof ( *priv ) );
1054 goto err_alloc_etherdev;
1057 /* Link our operations to the netdev struct */
1058 netdev_init ( netdev, &pcnet32_operations );
1060 /* Link the PCI device to the netdev struct */
1061 pci_set_drvdata ( pdev, netdev );
1062 netdev->dev = &pdev->dev;
1064 /* Get a reference to our private data */
1065 priv = netdev_priv ( netdev );
1067 /* We'll need these set up for the rest of the routines */
1068 priv->pci_dev = pdev;
1069 priv->netdev = netdev;
1071 ioaddr = pdev->ioaddr;
1073 /* Only use irqs under UNDI */
1074 priv->irq_enabled = 0;
1076 /* Reset the chip */
1077 pcnet32_wio_reset ( ioaddr );
1079 if ( ( rc = pcnet32_set_ops ( priv ) ) != 0 ) {
1080 DBG ( "Setting driver operations failed\n");
1084 if ( ( rc = pcnet32_chip_detect ( priv ) ) != 0 ) {
1085 DBG ( "pcnet32_chip_detect failed\n" );
1086 goto err_chip_detect;
1089 /* Enter bus mastering mode */
1090 adjust_pci_device ( pdev );
1092 /* Verify and get MAC address */
1093 if ( ( rc = pcnet32_setup_mac_addr ( priv ) ) != 0 ) {
1094 DBG ( "Setting MAC address failed\n" );
1098 DBG ( "IO Addr 0x%lX, MAC Addr %s\n", ioaddr,
1099 eth_ntoa ( netdev->hw_addr ) );
1101 priv->options = PCNET32_PORT_ASEL;
1103 /* Detect special T1/E1 WAN card by checking for MAC address */
1104 if ( netdev->hw_addr[0] == 0x00 &&
1105 netdev->hw_addr[1] == 0xE0 &&
1106 netdev->hw_addr[2] == 0x75 )
1107 priv->options = PCNET32_PORT_FD | PCNET32_PORT_GPSI;
1109 /* Probe the PHY so we can check link state and speed */
1110 pcnet32_setup_probe_phy ( priv );
1112 if ( ( rc = register_netdev ( netdev ) ) != 0 ) {
1113 DBG ( "Error registering netdev\n" );
1117 netdev_link_up ( netdev );
1122 netdev_put ( netdev );
1131 * remove - Device Removal Routine
1133 * @v pdev PCI device information struct
1136 pcnet32_remove ( struct pci_device *pdev )
1138 struct net_device *netdev = pci_get_drvdata ( pdev );
1139 unsigned long ioaddr = pdev->ioaddr;
1141 DBGP ( "pcnet32_remove\n" );
1143 /* Reset the chip */
1144 pcnet32_wio_reset ( ioaddr );
1146 unregister_netdev ( netdev );
1147 netdev_nullify ( netdev );
1148 netdev_put ( netdev );
1151 static struct pci_device_id pcnet32_nics[] = {
1152 PCI_ROM(0x1022, 0x2000, "pcnet32", "AMD PCnet/PCI", 0),
1153 PCI_ROM(0x1022, 0x2625, "pcnetfastiii", "AMD PCNet FAST III", 0),
1154 PCI_ROM(0x1022, 0x2001, "amdhomepna", "AMD PCnet/HomePNA", 0),
1157 struct pci_driver pcnet32_driver __pci_driver = {
1158 .ids = pcnet32_nics,
1159 .id_count = ARRAY_SIZE ( pcnet32_nics ),
1160 .probe = pcnet32_probe,
1161 .remove = pcnet32_remove,