1 /**************************************************************************
3 * Etherboot driver for Level 5 Etherfabric network cards
5 * Written by Michael Brown <mbrown@fensystems.co.uk>
7 * Copyright Fen Systems Ltd. 2005
8 * Copyright Level 5 Networks Inc. 2005
10 * This software may be used and distributed according to the terms of
11 * the GNU General Public License (GPL), incorporated herein by
12 * reference. Drivers based on or derived from this code fall under
13 * the GPL and must retain the authorship, copyright and license
16 **************************************************************************
19 FILE_LICENCE ( GPL_ANY );
23 #include <ipxe/bitbash.h>
27 #include <ipxe/if_ether.h>
28 /**************************************************************************
30 * Constants and macros
32 **************************************************************************
34 /* Board IDs. Early boards have no board_type, (e.g. EF1002 and 401/403)
35 * But newer boards are getting bigger...
38 EFAB_BOARD_INVALID = 0, /* Early boards do not have board rev. info. */
39 EFAB_BOARD_SFE4001 = 1,
40 EFAB_BOARD_SFE4002 = 2,
41 EFAB_BOARD_SFE4003 = 3,
42 /* Insert new types before here */
48 PHY_TYPE_AUTO = 0, /* on development board detect between CX4 & alaska */
49 PHY_TYPE_CX4_RTMR = 1,
50 PHY_TYPE_1GIG_ALASKA = 2,
51 PHY_TYPE_10XPRESS = 3,
57 /**************************************************************************
59 * Hardware data structures and sizing
61 **************************************************************************
64 #define dma_addr_t unsigned long
65 typedef efab_qword_t falcon_rx_desc_t;
66 typedef efab_qword_t falcon_tx_desc_t;
67 typedef efab_qword_t falcon_event_t;
69 #define EFAB_BUF_ALIGN 4096
70 #define EFAB_RXD_SIZE 512
71 #define EFAB_TXD_SIZE 512
72 #define EFAB_EVQ_SIZE 512
74 #define EFAB_NUM_RX_DESC 16
75 #define EFAB_RX_BUF_SIZE 1600
77 /**************************************************************************
81 **************************************************************************
86 /* A buffer table allocation backing a tx dma, rx dma or eventq */
87 struct efab_special_buffer {
93 struct efab_tx_queue {
94 /* The hardware ring */
95 falcon_tx_desc_t *ring;
97 /* The software ring storing io_buffers. */
98 struct io_buffer *buf[EFAB_TXD_SIZE];
100 /* The buffer table reservation pushed to hardware */
101 struct efab_special_buffer entry;
103 /* Software descriptor write ptr */
104 unsigned int write_ptr;
106 /* Hardware descriptor read ptr */
107 unsigned int read_ptr;
111 struct efab_rx_queue {
112 /* The hardware ring */
113 falcon_rx_desc_t *ring;
115 /* The software ring storing io_buffers */
116 struct io_buffer *buf[EFAB_NUM_RX_DESC];
118 /* The buffer table reservation pushed to hardware */
119 struct efab_special_buffer entry;
121 /* Descriptor write ptr, into both the hardware and software rings */
122 unsigned int write_ptr;
124 /* Hardware completion ptr */
125 unsigned int read_ptr;
129 struct efab_ev_queue {
130 /* The hardware ring to push to hardware.
131 * Must be the first entry in the structure */
132 falcon_event_t *ring;
134 /* The buffer table reservation pushed to hardware */
135 struct efab_special_buffer entry;
137 /* Pointers into the ring */
138 unsigned int read_ptr;
141 struct efab_mac_operations {
142 int ( * init ) ( struct efab_nic *efab );
145 struct efab_phy_operations {
146 int ( * init ) ( struct efab_nic *efab );
150 struct efab_board_operations {
151 int ( * init ) ( struct efab_nic *efab );
152 void ( * fini ) ( struct efab_nic *efab );
156 struct net_device *netdev;
160 /* I2C bit-bashed interface */
161 struct i2c_bit_basher i2c_bb;
163 /** SPI bus and devices, and the user visible NVO area */
164 struct spi_bus spi_bus;
165 struct spi_device spi_flash;
166 struct spi_device spi_eeprom;
167 struct spi_device *spi;
168 struct nvo_block nvo;
170 /** Board, MAC, and PHY operations tables */
171 struct efab_board_operations *board_op;
172 struct efab_mac_operations *mac_op;
173 struct efab_phy_operations *phy_op;
175 /* PHY and board types */
181 /** Memory and IO base */
185 /* Buffer table allocation head */
189 struct efab_rx_queue rx_queue;
190 struct efab_tx_queue tx_queue;
191 struct efab_ev_queue ev_queue;
194 uint8_t mac_addr[ETH_ALEN];
195 /** GMII link options */
196 unsigned int link_options;
201 efab_oword_t int_ker __attribute__ (( aligned ( 16 ) ));
203 #endif /* EFAB_NIC_H */