1 /******************************************************************************
2 * Copyright (c) 2007, 2012, 2013 IBM Corporation
4 * This program and the accompanying materials
5 * are made available under the terms of the BSD License
6 * which accompanies this distribution, and is available at
7 * http://www.opensource.org/licenses/bsd-license.php
10 * IBM Corporation - initial implementation
11 *****************************************************************************/
13 * Definitions for OHCI Controller
15 * USB on the PowerStation:
16 * ohci0 - port 0 -> not connected
17 * ohci0 - port 1 - 2 -> Internal connector (J60_USBINT)
18 * ohci1 - port 0 -> not connected
19 * ohci1 - port 1 - 2 -> External connector (J10_USBEXT)
33 uint32_t intr_disable;
35 uint32_t period_curr_ed;
36 uint32_t cntl_head_ed;
37 uint32_t cntl_curr_ed;
38 uint32_t bulk_head_ed;
39 uint32_t bulk_curr_ed;
42 uint32_t fm_remaining;
44 uint32_t period_start;
45 uint32_t ls_threshold;
50 } __attribute__((packed));
52 #define EDA_FADDR(x) ((x & 0x7F))
53 #define EDA_EP(x) ((x & 0x0F) << 7)
54 #define EDA_DIR_OUT (1 << 11)
55 #define EDA_DIR_IN (1 << 12)
56 #define EDA_LOW_SPEED (1 << 13)
57 #define EDA_SKIP (1 << 14)
58 #define EDA_SKIP_LE (0x400000) /* avoiding conversions */
59 #define EDA_FORMAT_ISO (1 << 15)
60 #define EDA_MPS(x) ((x & 0x7FF) << 16)
62 #define EDA_HEADP_MASK (0xFFFFFFFC)
63 #define EDA_HEADP_MASK_LE (cpu_to_le32(EDA_HEADP_MASK))
64 #define EDA_HEADP_HALTED (0x1)
65 #define EDA_HEADP_CARRY (0x2)
72 } __attribute__((packed));
74 #define TDA_DONE (1 << 17)
75 #define TDA_ROUNDING (1 << 18)
76 #define TDA_DP_SETUP (0 << 19)
77 #define TDA_DP_OUT (1 << 19)
78 #define TDA_DP_IN (1 << 20)
79 #define TDA_DI_NO (0x7 << 21)
80 #define TDA_TOGGLE_DATA0 (0x02000000)
81 #define TDA_TOGGLE_DATA1 (0x03000000)
82 #define TDA_CC (0xF << 28)
84 #define TDA_ERROR(x) ((x) * -1)
86 /* Table 4-7: Completion Codes */
87 const char *tda_cc_error[] = {
88 #define USB_NOERROR TDA_ERROR(0)
93 #define USB_STALL TDA_ERROR(4)
95 "DEVICENOTRESPONDING",
113 } __attribute__((packed));
115 #define HCCA_SIZE 256
116 #define HCCA_ALIGN (HCCA_SIZE - 1)
117 #define HCCA_INTR_NUM 32
119 uint32_t intr_table[HCCA_INTR_NUM];
123 uint32_t reserved[120];
124 } __attribute__((packed));
127 struct ohci_ed ed; /* has to be aligned at 16 byte address*/
128 struct usb_pipe pipe;
137 }__attribute__((packed));
139 #define OHCI_PIPE_POOL_SIZE 4096
140 #define OHCI_MAX_TDS 256 /* supports 16k buffers, i.e. 64 * 256 */
141 #define OHCI_MAX_BULK_SIZE 4096
144 struct ohci_hcca *hcca;
145 struct ohci_regs *regs;
146 struct usb_hcd_dev *hcidev;
147 struct usb_pipe *freelist;
148 struct usb_pipe *end;
149 struct usb_dev rhdev;
155 #define OHCI_CTRL_CBSR (3 << 0)
156 #define OHCI_CTRL_PLE (1 << 2)
157 #define OHCI_CTRL_CLE (1 << 4)
158 #define OHCI_CTRL_BLE (1 << 5)
159 #define OHCI_CTRL_HCFS (3 << 6)
160 #define OHCI_USB_RESET (0 << 6)
161 #define OHCI_USB_OPER (2 << 6)
162 #define OHCI_USB_SUSPEND (3 << 6)
163 #define OHCI_CTRL_RWC (1 << 9)
165 /* OHCI Command Status */
166 #define OHCI_CMD_STATUS_HCR (1 << 0)
167 #define OHCI_CMD_STATUS_CLF (1 << 1)
168 #define OHCI_CMD_STATUS_BLF (1 << 2)
170 /* OHCI Interrupt status */
171 #define OHCI_INTR_STATUS_WD (1 << 1)
173 /* Root Hub Descriptor A bits */
174 #define RHDA_NDP (0xFF)
175 #define RHDA_PSM_INDIVIDUAL (1 << 8)
176 #define RHDA_NPS_ENABLE (1 << 9)
177 #define RHDA_DT (1 << 10)
178 #define RHDA_OCPM_PERPORT (1 << 11)
179 #define RHDA_NOCP_ENABLE (1 << 12)
181 /* Root Hub Descriptor B bits */
182 #define RHDB_PPCM_PORT_POWER (0xFFFE)
183 #define RHDB_PPCM_GLOBAL_POWER (0x0000)
185 #define RH_STATUS_LPSC (1 << 16)
186 #define RH_STATUS_OCIC (1 << 17)
187 #define RH_STATUS_CREW (1 << 31)
189 #define RH_PS_CCS (1 << 0)
190 #define RH_PS_PES (1 << 1)
191 #define RH_PS_PSS (1 << 2)
192 #define RH_PS_POCI (1 << 3)
193 #define RH_PS_PRS (1 << 4)
194 #define RH_PS_PPS (1 << 8)
195 #define RH_PS_LSDA (1 << 9)
197 #define RH_PS_CSC (1 << 16)
198 #define RH_PS_PESC (1 << 17)
199 #define RH_PS_PSSC (1 << 18)
200 #define RH_PS_OCIC (1 << 19)
201 #define RH_PS_PRSC (1 << 20)
203 /*********************************************************************/
204 /* Values for USB Frame Timing */
205 /* One USB frame (1ms) consists of 12000 bit-times as clock is 12MHz */
206 /* controller can be adjusted for performance optimization */
207 /* We use standard values (OHCI spec 6.3.1, 5.1.1.4, 5.4, 7.3.4) */
208 /*********************************************************************/
209 #define FRAME_INTERVAL (((((11999 - 210) * 6) / 7) << 16) | 11999)
210 #define PERIODIC_START ((11999 * 9) / 10)
213 static inline struct ohci_ed *ohci_pipe_get_ed(struct usb_pipe *pipe);
214 static inline long ohci_pipe_get_ed_phys(struct usb_pipe *pipe);
215 static int ohci_alloc_pipe_pool(struct ohci_hcd *ohcd);
217 #endif /* USB_OHCI_H */