4 * Copyright (c) 2012-2014 SUSE LINUX Products GmbH
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see
18 * <http://www.gnu.org/licenses/gpl-2.0.html>
21 #include "qemu-common.h"
23 #include "sysemu/kvm.h"
24 #include "qemu/notify.h"
26 #include "qemu/error-report.h"
27 #include "sysemu/sysemu.h"
29 bool cpu_exists(int64_t id)
34 CPUClass *cc = CPU_GET_CLASS(cpu);
36 if (cc->get_arch_id(cpu) == id) {
43 CPUState *cpu_generic_init(const char *typename, const char *cpu_model)
45 char *str, *name, *featurestr;
51 str = g_strdup(cpu_model);
52 name = strtok(str, ",");
54 oc = cpu_class_by_name(typename, name);
60 cpu = CPU(object_new(object_class_get_name(oc)));
61 cc = CPU_GET_CLASS(cpu);
63 featurestr = strtok(NULL, ",");
64 cc->parse_features(cpu, featurestr, &err);
70 object_property_set_bool(OBJECT(cpu), true, "realized", &err);
74 error_report_err(err);
75 object_unref(OBJECT(cpu));
82 bool cpu_paging_enabled(const CPUState *cpu)
84 CPUClass *cc = CPU_GET_CLASS(cpu);
86 return cc->get_paging_enabled(cpu);
89 static bool cpu_common_get_paging_enabled(const CPUState *cpu)
94 void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
97 CPUClass *cc = CPU_GET_CLASS(cpu);
99 cc->get_memory_mapping(cpu, list, errp);
102 static void cpu_common_get_memory_mapping(CPUState *cpu,
103 MemoryMappingList *list,
106 error_setg(errp, "Obtaining memory mappings is unsupported on this CPU.");
109 void cpu_reset_interrupt(CPUState *cpu, int mask)
111 cpu->interrupt_request &= ~mask;
114 void cpu_exit(CPUState *cpu)
116 cpu->exit_request = 1;
117 cpu->tcg_exit_req = 1;
120 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
123 CPUClass *cc = CPU_GET_CLASS(cpu);
125 return (*cc->write_elf32_qemunote)(f, cpu, opaque);
128 static int cpu_common_write_elf32_qemunote(WriteCoreDumpFunction f,
129 CPUState *cpu, void *opaque)
134 int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
135 int cpuid, void *opaque)
137 CPUClass *cc = CPU_GET_CLASS(cpu);
139 return (*cc->write_elf32_note)(f, cpu, cpuid, opaque);
142 static int cpu_common_write_elf32_note(WriteCoreDumpFunction f,
143 CPUState *cpu, int cpuid,
149 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
152 CPUClass *cc = CPU_GET_CLASS(cpu);
154 return (*cc->write_elf64_qemunote)(f, cpu, opaque);
157 static int cpu_common_write_elf64_qemunote(WriteCoreDumpFunction f,
158 CPUState *cpu, void *opaque)
163 int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
164 int cpuid, void *opaque)
166 CPUClass *cc = CPU_GET_CLASS(cpu);
168 return (*cc->write_elf64_note)(f, cpu, cpuid, opaque);
171 static int cpu_common_write_elf64_note(WriteCoreDumpFunction f,
172 CPUState *cpu, int cpuid,
179 static int cpu_common_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg)
184 static int cpu_common_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg)
189 bool target_words_bigendian(void);
190 static bool cpu_common_virtio_is_big_endian(CPUState *cpu)
192 return target_words_bigendian();
195 static void cpu_common_noop(CPUState *cpu)
199 static bool cpu_common_exec_interrupt(CPUState *cpu, int int_req)
204 void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
207 CPUClass *cc = CPU_GET_CLASS(cpu);
209 if (cc->dump_state) {
210 cpu_synchronize_state(cpu);
211 cc->dump_state(cpu, f, cpu_fprintf, flags);
215 void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
218 CPUClass *cc = CPU_GET_CLASS(cpu);
220 if (cc->dump_statistics) {
221 cc->dump_statistics(cpu, f, cpu_fprintf, flags);
225 void cpu_reset(CPUState *cpu)
227 CPUClass *klass = CPU_GET_CLASS(cpu);
229 if (klass->reset != NULL) {
230 (*klass->reset)(cpu);
234 static void cpu_common_reset(CPUState *cpu)
236 CPUClass *cc = CPU_GET_CLASS(cpu);
238 if (qemu_loglevel_mask(CPU_LOG_RESET)) {
239 qemu_log("CPU Reset (CPU %d)\n", cpu->cpu_index);
240 log_cpu_state(cpu, cc->reset_dump_flags);
243 cpu->interrupt_request = 0;
244 cpu->current_tb = NULL;
247 cpu->mem_io_vaddr = 0;
248 cpu->icount_extra = 0;
249 cpu->icount_decr.u32 = 0;
251 cpu->exception_index = -1;
252 memset(cpu->tb_jmp_cache, 0, TB_JMP_CACHE_SIZE * sizeof(void *));
255 static bool cpu_common_has_work(CPUState *cs)
260 ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model)
262 CPUClass *cc = CPU_CLASS(object_class_by_name(typename));
264 return cc->class_by_name(cpu_model);
267 static ObjectClass *cpu_common_class_by_name(const char *cpu_model)
272 static void cpu_common_parse_features(CPUState *cpu, char *features,
275 char *featurestr; /* Single "key=value" string being parsed */
279 featurestr = features ? strtok(features, ",") : NULL;
282 val = strchr(featurestr, '=');
286 object_property_parse(OBJECT(cpu), val, featurestr, &err);
288 error_propagate(errp, err);
292 error_setg(errp, "Expected key=value format, found %s.",
296 featurestr = strtok(NULL, ",");
300 static void cpu_common_realizefn(DeviceState *dev, Error **errp)
302 CPUState *cpu = CPU(dev);
304 if (dev->hotplugged) {
305 cpu_synchronize_post_init(cpu);
310 static void cpu_common_initfn(Object *obj)
312 CPUState *cpu = CPU(obj);
313 CPUClass *cc = CPU_GET_CLASS(obj);
316 cpu->gdb_num_regs = cpu->gdb_num_g_regs = cc->gdb_num_core_regs;
317 QTAILQ_INIT(&cpu->breakpoints);
318 QTAILQ_INIT(&cpu->watchpoints);
321 static void cpu_common_finalize(Object *obj)
323 cpu_exec_exit(CPU(obj));
326 static int64_t cpu_common_get_arch_id(CPUState *cpu)
328 return cpu->cpu_index;
331 static void cpu_class_init(ObjectClass *klass, void *data)
333 DeviceClass *dc = DEVICE_CLASS(klass);
334 CPUClass *k = CPU_CLASS(klass);
336 k->class_by_name = cpu_common_class_by_name;
337 k->parse_features = cpu_common_parse_features;
338 k->reset = cpu_common_reset;
339 k->get_arch_id = cpu_common_get_arch_id;
340 k->has_work = cpu_common_has_work;
341 k->get_paging_enabled = cpu_common_get_paging_enabled;
342 k->get_memory_mapping = cpu_common_get_memory_mapping;
343 k->write_elf32_qemunote = cpu_common_write_elf32_qemunote;
344 k->write_elf32_note = cpu_common_write_elf32_note;
345 k->write_elf64_qemunote = cpu_common_write_elf64_qemunote;
346 k->write_elf64_note = cpu_common_write_elf64_note;
347 k->gdb_read_register = cpu_common_gdb_read_register;
348 k->gdb_write_register = cpu_common_gdb_write_register;
349 k->virtio_is_big_endian = cpu_common_virtio_is_big_endian;
350 k->debug_excp_handler = cpu_common_noop;
351 k->cpu_exec_enter = cpu_common_noop;
352 k->cpu_exec_exit = cpu_common_noop;
353 k->cpu_exec_interrupt = cpu_common_exec_interrupt;
354 dc->realize = cpu_common_realizefn;
356 * Reason: CPUs still need special care by board code: wiring up
357 * IRQs, adding reset handlers, halting non-first CPUs, ...
359 dc->cannot_instantiate_with_device_add_yet = true;
362 static const TypeInfo cpu_type_info = {
364 .parent = TYPE_DEVICE,
365 .instance_size = sizeof(CPUState),
366 .instance_init = cpu_common_initfn,
367 .instance_finalize = cpu_common_finalize,
369 .class_size = sizeof(CPUClass),
370 .class_init = cpu_class_init,
373 static void cpu_register_types(void)
375 type_register_static(&cpu_type_info);
378 type_init(cpu_register_types)