4 * Generate inline load/store functions for one MMU mode and data
7 * Generate a store function as well as signed and unsigned loads.
9 * Not used directly but included from cpu_ldst.h.
11 * Copyright (c) 2003 Fabrice Bellard
13 * This library is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU Lesser General Public
15 * License as published by the Free Software Foundation; either
16 * version 2 of the License, or (at your option) any later version.
18 * This library is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
21 * Lesser General Public License for more details.
23 * You should have received a copy of the GNU Lesser General Public
24 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
29 #define DATA_TYPE uint64_t
34 #define DATA_TYPE uint32_t
39 #define DATA_TYPE uint16_t
40 #define DATA_STYPE int16_t
45 #define DATA_TYPE uint8_t
46 #define DATA_STYPE int8_t
49 #error unsupported data size
53 #define RES_TYPE uint64_t
55 #define RES_TYPE uint32_t
58 #ifdef SOFTMMU_CODE_ACCESS
59 #define ADDR_READ addr_code
60 #define MMUSUFFIX _cmmu
61 #define URETSUFFIX SUFFIX
62 #define SRETSUFFIX SUFFIX
64 #define ADDR_READ addr_read
65 #define MMUSUFFIX _mmu
66 #define URETSUFFIX USUFFIX
67 #define SRETSUFFIX glue(s, SUFFIX)
70 /* generic load/store macros */
72 static inline RES_TYPE
73 glue(glue(glue(cpu_ld, USUFFIX), MEMSUFFIX), _ra)(CPUArchState *env,
84 page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
85 mmu_idx = CPU_MMU_INDEX;
86 if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ !=
87 (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
88 oi = make_memop_idx(SHIFT, mmu_idx);
89 res = glue(glue(helper_ret_ld, URETSUFFIX), MMUSUFFIX)(env, addr,
92 uintptr_t hostaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
93 res = glue(glue(ld, USUFFIX), _p)((uint8_t *)hostaddr);
98 static inline RES_TYPE
99 glue(glue(cpu_ld, USUFFIX), MEMSUFFIX)(CPUArchState *env, target_ulong ptr)
101 return glue(glue(glue(cpu_ld, USUFFIX), MEMSUFFIX), _ra)(env, ptr, 0);
106 glue(glue(glue(cpu_lds, SUFFIX), MEMSUFFIX), _ra)(CPUArchState *env,
116 page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
117 mmu_idx = CPU_MMU_INDEX;
118 if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ !=
119 (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
120 oi = make_memop_idx(SHIFT, mmu_idx);
121 res = (DATA_STYPE)glue(glue(helper_ret_ld, SRETSUFFIX),
122 MMUSUFFIX)(env, addr, oi, retaddr);
124 uintptr_t hostaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
125 res = glue(glue(lds, SUFFIX), _p)((uint8_t *)hostaddr);
131 glue(glue(cpu_lds, SUFFIX), MEMSUFFIX)(CPUArchState *env, target_ulong ptr)
133 return glue(glue(glue(cpu_lds, SUFFIX), MEMSUFFIX), _ra)(env, ptr, 0);
137 #ifndef SOFTMMU_CODE_ACCESS
139 /* generic store macro */
142 glue(glue(glue(cpu_st, SUFFIX), MEMSUFFIX), _ra)(CPUArchState *env,
144 RES_TYPE v, uintptr_t retaddr)
152 page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
153 mmu_idx = CPU_MMU_INDEX;
154 if (unlikely(env->tlb_table[mmu_idx][page_index].addr_write !=
155 (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
156 oi = make_memop_idx(SHIFT, mmu_idx);
157 glue(glue(helper_ret_st, SUFFIX), MMUSUFFIX)(env, addr, v, oi,
160 uintptr_t hostaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
161 glue(glue(st, SUFFIX), _p)((uint8_t *)hostaddr, v);
166 glue(glue(cpu_st, SUFFIX), MEMSUFFIX)(CPUArchState *env, target_ulong ptr,
169 glue(glue(glue(cpu_st, SUFFIX), MEMSUFFIX), _ra)(env, ptr, v, 0);
172 #endif /* !SOFTMMU_CODE_ACCESS */