2 * QEMU PowerPC 405 evaluation boards emulation
4 * Copyright (c) 2007 Jocelyn Mayer
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24 #include "qemu/osdep.h"
25 #include "qapi/error.h"
26 #include "qemu-common.h"
29 #include "hw/ppc/ppc.h"
31 #include "hw/timer/m48t59.h"
32 #include "hw/block/flash.h"
33 #include "sysemu/sysemu.h"
34 #include "sysemu/qtest.h"
35 #include "sysemu/block-backend.h"
36 #include "hw/boards.h"
38 #include "qemu/error-report.h"
39 #include "hw/loader.h"
40 #include "sysemu/block-backend.h"
41 #include "sysemu/blockdev.h"
42 #include "exec/address-spaces.h"
44 #define BIOS_FILENAME "ppc405_rom.bin"
45 #define BIOS_SIZE (2048 * 1024)
47 #define KERNEL_LOAD_ADDR 0x00000000
48 #define INITRD_LOAD_ADDR 0x01800000
50 #define USE_FLASH_BIOS
52 //#define DEBUG_BOARD_INIT
54 /*****************************************************************************/
55 /* PPC405EP reference board (IBM) */
56 /* Standalone board with:
58 * - SDRAM (0x00000000)
59 * - Flash (0xFFF80000)
61 * - NVRAM (0xF0000000)
64 typedef struct ref405ep_fpga_t ref405ep_fpga_t;
65 struct ref405ep_fpga_t {
70 static uint32_t ref405ep_fpga_readb (void *opaque, hwaddr addr)
72 ref405ep_fpga_t *fpga;
91 static void ref405ep_fpga_writeb (void *opaque,
92 hwaddr addr, uint32_t value)
94 ref405ep_fpga_t *fpga;
109 static uint32_t ref405ep_fpga_readw (void *opaque, hwaddr addr)
113 ret = ref405ep_fpga_readb(opaque, addr) << 8;
114 ret |= ref405ep_fpga_readb(opaque, addr + 1);
119 static void ref405ep_fpga_writew (void *opaque,
120 hwaddr addr, uint32_t value)
122 ref405ep_fpga_writeb(opaque, addr, (value >> 8) & 0xFF);
123 ref405ep_fpga_writeb(opaque, addr + 1, value & 0xFF);
126 static uint32_t ref405ep_fpga_readl (void *opaque, hwaddr addr)
130 ret = ref405ep_fpga_readb(opaque, addr) << 24;
131 ret |= ref405ep_fpga_readb(opaque, addr + 1) << 16;
132 ret |= ref405ep_fpga_readb(opaque, addr + 2) << 8;
133 ret |= ref405ep_fpga_readb(opaque, addr + 3);
138 static void ref405ep_fpga_writel (void *opaque,
139 hwaddr addr, uint32_t value)
141 ref405ep_fpga_writeb(opaque, addr, (value >> 24) & 0xFF);
142 ref405ep_fpga_writeb(opaque, addr + 1, (value >> 16) & 0xFF);
143 ref405ep_fpga_writeb(opaque, addr + 2, (value >> 8) & 0xFF);
144 ref405ep_fpga_writeb(opaque, addr + 3, value & 0xFF);
147 static const MemoryRegionOps ref405ep_fpga_ops = {
150 ref405ep_fpga_readb, ref405ep_fpga_readw, ref405ep_fpga_readl,
153 ref405ep_fpga_writeb, ref405ep_fpga_writew, ref405ep_fpga_writel,
156 .endianness = DEVICE_NATIVE_ENDIAN,
159 static void ref405ep_fpga_reset (void *opaque)
161 ref405ep_fpga_t *fpga;
168 static void ref405ep_fpga_init(MemoryRegion *sysmem, uint32_t base)
170 ref405ep_fpga_t *fpga;
171 MemoryRegion *fpga_memory = g_new(MemoryRegion, 1);
173 fpga = g_malloc0(sizeof(ref405ep_fpga_t));
174 memory_region_init_io(fpga_memory, NULL, &ref405ep_fpga_ops, fpga,
176 memory_region_add_subregion(sysmem, base, fpga_memory);
177 qemu_register_reset(&ref405ep_fpga_reset, fpga);
180 static void ref405ep_init(MachineState *machine)
182 ram_addr_t ram_size = machine->ram_size;
183 const char *kernel_filename = machine->kernel_filename;
184 const char *kernel_cmdline = machine->kernel_cmdline;
185 const char *initrd_filename = machine->initrd_filename;
191 MemoryRegion *sram = g_new(MemoryRegion, 1);
193 MemoryRegion *ram_memories = g_malloc(2 * sizeof(*ram_memories));
194 hwaddr ram_bases[2], ram_sizes[2];
195 target_ulong sram_size;
198 //static int phy_addr = 1;
199 target_ulong kernel_base, initrd_base;
200 long kernel_size, initrd_size;
202 int fl_idx, fl_sectors, len;
204 MemoryRegion *sysmem = get_system_memory();
207 memory_region_allocate_system_memory(&ram_memories[0], NULL, "ef405ep.ram",
210 ram_sizes[0] = 0x08000000;
211 memory_region_init(&ram_memories[1], NULL, "ef405ep.ram1", 0);
212 ram_bases[1] = 0x00000000;
213 ram_sizes[1] = 0x00000000;
214 ram_size = 128 * 1024 * 1024;
215 #ifdef DEBUG_BOARD_INIT
216 printf("%s: register cpu\n", __func__);
218 env = ppc405ep_init(sysmem, ram_memories, ram_bases, ram_sizes,
219 33333333, &pic, kernel_filename == NULL ? 0 : 1);
221 sram_size = 512 * 1024;
222 memory_region_init_ram(sram, NULL, "ef405ep.sram", sram_size,
224 vmstate_register_ram_global(sram);
225 memory_region_add_subregion(sysmem, 0xFFF00000, sram);
226 /* allocate and load BIOS */
227 #ifdef DEBUG_BOARD_INIT
228 printf("%s: register BIOS\n", __func__);
231 #ifdef USE_FLASH_BIOS
232 dinfo = drive_get(IF_PFLASH, 0, fl_idx);
234 BlockBackend *blk = blk_by_legacy_dinfo(dinfo);
236 bios_size = blk_getlength(blk);
237 fl_sectors = (bios_size + 65535) >> 16;
238 #ifdef DEBUG_BOARD_INIT
239 printf("Register parallel flash %d size %lx"
240 " at addr %lx '%s' %d\n",
241 fl_idx, bios_size, -bios_size,
242 blk_name(blk), fl_sectors);
244 pflash_cfi02_register((uint32_t)(-bios_size),
245 NULL, "ef405ep.bios", bios_size,
246 blk, 65536, fl_sectors, 1,
247 2, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
253 #ifdef DEBUG_BOARD_INIT
254 printf("Load BIOS from file\n");
256 bios = g_new(MemoryRegion, 1);
257 memory_region_init_ram(bios, NULL, "ef405ep.bios", BIOS_SIZE,
259 vmstate_register_ram_global(bios);
261 if (bios_name == NULL)
262 bios_name = BIOS_FILENAME;
263 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
265 bios_size = load_image(filename, memory_region_get_ram_ptr(bios));
267 if (bios_size < 0 || bios_size > BIOS_SIZE) {
268 error_report("Could not load PowerPC BIOS '%s'", bios_name);
271 bios_size = (bios_size + 0xfff) & ~0xfff;
272 memory_region_add_subregion(sysmem, (uint32_t)(-bios_size), bios);
273 } else if (!qtest_enabled() || kernel_filename != NULL) {
274 error_report("Could not load PowerPC BIOS '%s'", bios_name);
277 /* Avoid an uninitialized variable warning */
280 memory_region_set_readonly(bios, true);
283 #ifdef DEBUG_BOARD_INIT
284 printf("%s: register FPGA\n", __func__);
286 ref405ep_fpga_init(sysmem, 0xF0300000);
288 #ifdef DEBUG_BOARD_INIT
289 printf("%s: register NVRAM\n", __func__);
291 m48t59_init(NULL, 0xF0000000, 0, 8192, 1968, 8);
293 linux_boot = (kernel_filename != NULL);
295 #ifdef DEBUG_BOARD_INIT
296 printf("%s: load kernel\n", __func__);
298 memset(&bd, 0, sizeof(bd));
299 bd.bi_memstart = 0x00000000;
300 bd.bi_memsize = ram_size;
301 bd.bi_flashstart = -bios_size;
302 bd.bi_flashsize = -bios_size;
303 bd.bi_flashoffset = 0;
304 bd.bi_sramstart = 0xFFF00000;
305 bd.bi_sramsize = sram_size;
307 bd.bi_intfreq = 133333333;
308 bd.bi_busfreq = 33333333;
309 bd.bi_baudrate = 115200;
310 bd.bi_s_version[0] = 'Q';
311 bd.bi_s_version[1] = 'M';
312 bd.bi_s_version[2] = 'U';
313 bd.bi_s_version[3] = '\0';
314 bd.bi_r_version[0] = 'Q';
315 bd.bi_r_version[1] = 'E';
316 bd.bi_r_version[2] = 'M';
317 bd.bi_r_version[3] = 'U';
318 bd.bi_r_version[4] = '\0';
319 bd.bi_procfreq = 133333333;
320 bd.bi_plb_busfreq = 33333333;
321 bd.bi_pci_busfreq = 33333333;
322 bd.bi_opbfreq = 33333333;
323 bdloc = ppc405_set_bootinfo(env, &bd, 0x00000001);
325 kernel_base = KERNEL_LOAD_ADDR;
326 /* now we can load the kernel */
327 kernel_size = load_image_targphys(kernel_filename, kernel_base,
328 ram_size - kernel_base);
329 if (kernel_size < 0) {
330 fprintf(stderr, "qemu: could not load kernel '%s'\n",
334 printf("Load kernel size %ld at " TARGET_FMT_lx,
335 kernel_size, kernel_base);
337 if (initrd_filename) {
338 initrd_base = INITRD_LOAD_ADDR;
339 initrd_size = load_image_targphys(initrd_filename, initrd_base,
340 ram_size - initrd_base);
341 if (initrd_size < 0) {
342 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
350 env->gpr[4] = initrd_base;
351 env->gpr[5] = initrd_size;
352 if (kernel_cmdline != NULL) {
353 len = strlen(kernel_cmdline);
354 bdloc -= ((len + 255) & ~255);
355 cpu_physical_memory_write(bdloc, kernel_cmdline, len + 1);
357 env->gpr[7] = bdloc + len;
362 env->nip = KERNEL_LOAD_ADDR;
370 #ifdef DEBUG_BOARD_INIT
371 printf("bdloc " RAM_ADDR_FMT "\n", bdloc);
372 printf("%s: Done\n", __func__);
376 static void ref405ep_class_init(ObjectClass *oc, void *data)
378 MachineClass *mc = MACHINE_CLASS(oc);
380 mc->desc = "ref405ep";
381 mc->init = ref405ep_init;
384 static const TypeInfo ref405ep_type = {
385 .name = MACHINE_TYPE_NAME("ref405ep"),
386 .parent = TYPE_MACHINE,
387 .class_init = ref405ep_class_init,
390 /*****************************************************************************/
391 /* AMCC Taihu evaluation board */
392 /* - PowerPC 405EP processor
393 * - SDRAM 128 MB at 0x00000000
394 * - Boot flash 2 MB at 0xFFE00000
395 * - Application flash 32 MB at 0xFC000000
398 * - 1 USB 1.1 device 0x50000000
399 * - 1 LCD display 0x50100000
400 * - 1 CPLD 0x50100000
402 * - 1 I2C thermal sensor
404 * - bit-bang SPI port using GPIOs
405 * - 1 EBC interface connector 0 0x50200000
406 * - 1 cardbus controller + expansion slot.
407 * - 1 PCI expansion slot.
409 typedef struct taihu_cpld_t taihu_cpld_t;
410 struct taihu_cpld_t {
415 static uint64_t taihu_cpld_read(void *opaque, hwaddr addr, unsigned size)
436 static void taihu_cpld_write(void *opaque, hwaddr addr,
437 uint64_t value, unsigned size)
454 static const MemoryRegionOps taihu_cpld_ops = {
455 .read = taihu_cpld_read,
456 .write = taihu_cpld_write,
458 .min_access_size = 1,
459 .max_access_size = 1,
461 .endianness = DEVICE_NATIVE_ENDIAN,
464 static void taihu_cpld_reset (void *opaque)
473 static void taihu_cpld_init(MemoryRegion *sysmem, uint32_t base)
476 MemoryRegion *cpld_memory = g_new(MemoryRegion, 1);
478 cpld = g_malloc0(sizeof(taihu_cpld_t));
479 memory_region_init_io(cpld_memory, NULL, &taihu_cpld_ops, cpld, "cpld", 0x100);
480 memory_region_add_subregion(sysmem, base, cpld_memory);
481 qemu_register_reset(&taihu_cpld_reset, cpld);
484 static void taihu_405ep_init(MachineState *machine)
486 ram_addr_t ram_size = machine->ram_size;
487 const char *kernel_filename = machine->kernel_filename;
488 const char *initrd_filename = machine->initrd_filename;
491 MemoryRegion *sysmem = get_system_memory();
493 MemoryRegion *ram_memories = g_malloc(2 * sizeof(*ram_memories));
494 MemoryRegion *ram = g_malloc0(sizeof(*ram));
495 hwaddr ram_bases[2], ram_sizes[2];
497 target_ulong kernel_base, initrd_base;
498 long kernel_size, initrd_size;
500 int fl_idx, fl_sectors;
503 /* RAM is soldered to the board so the size cannot be changed */
504 ram_size = 0x08000000;
505 memory_region_allocate_system_memory(ram, NULL, "taihu_405ep.ram",
509 ram_sizes[0] = 0x04000000;
510 memory_region_init_alias(&ram_memories[0], NULL,
511 "taihu_405ep.ram-0", ram, ram_bases[0],
513 ram_bases[1] = 0x04000000;
514 ram_sizes[1] = 0x04000000;
515 memory_region_init_alias(&ram_memories[1], NULL,
516 "taihu_405ep.ram-1", ram, ram_bases[1],
518 #ifdef DEBUG_BOARD_INIT
519 printf("%s: register cpu\n", __func__);
521 ppc405ep_init(sysmem, ram_memories, ram_bases, ram_sizes,
522 33333333, &pic, kernel_filename == NULL ? 0 : 1);
523 /* allocate and load BIOS */
524 #ifdef DEBUG_BOARD_INIT
525 printf("%s: register BIOS\n", __func__);
528 #if defined(USE_FLASH_BIOS)
529 dinfo = drive_get(IF_PFLASH, 0, fl_idx);
531 BlockBackend *blk = blk_by_legacy_dinfo(dinfo);
533 bios_size = blk_getlength(blk);
534 /* XXX: should check that size is 2MB */
535 // bios_size = 2 * 1024 * 1024;
536 fl_sectors = (bios_size + 65535) >> 16;
537 #ifdef DEBUG_BOARD_INIT
538 printf("Register parallel flash %d size %lx"
539 " at addr %lx '%s' %d\n",
540 fl_idx, bios_size, -bios_size,
541 blk_name(blk), fl_sectors);
543 pflash_cfi02_register((uint32_t)(-bios_size),
544 NULL, "taihu_405ep.bios", bios_size,
545 blk, 65536, fl_sectors, 1,
546 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
552 #ifdef DEBUG_BOARD_INIT
553 printf("Load BIOS from file\n");
555 if (bios_name == NULL)
556 bios_name = BIOS_FILENAME;
557 bios = g_new(MemoryRegion, 1);
558 memory_region_init_ram(bios, NULL, "taihu_405ep.bios", BIOS_SIZE,
560 vmstate_register_ram_global(bios);
561 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
563 bios_size = load_image(filename, memory_region_get_ram_ptr(bios));
565 if (bios_size < 0 || bios_size > BIOS_SIZE) {
566 error_report("Could not load PowerPC BIOS '%s'", bios_name);
569 bios_size = (bios_size + 0xfff) & ~0xfff;
570 memory_region_add_subregion(sysmem, (uint32_t)(-bios_size), bios);
571 } else if (!qtest_enabled()) {
572 error_report("Could not load PowerPC BIOS '%s'", bios_name);
575 memory_region_set_readonly(bios, true);
577 /* Register Linux flash */
578 dinfo = drive_get(IF_PFLASH, 0, fl_idx);
580 BlockBackend *blk = blk_by_legacy_dinfo(dinfo);
582 bios_size = blk_getlength(blk);
583 /* XXX: should check that size is 32MB */
584 bios_size = 32 * 1024 * 1024;
585 fl_sectors = (bios_size + 65535) >> 16;
586 #ifdef DEBUG_BOARD_INIT
587 printf("Register parallel flash %d size %lx"
588 " at addr " TARGET_FMT_lx " '%s'\n",
589 fl_idx, bios_size, (target_ulong)0xfc000000,
592 pflash_cfi02_register(0xfc000000, NULL, "taihu_405ep.flash", bios_size,
593 blk, 65536, fl_sectors, 1,
594 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
598 /* Register CLPD & LCD display */
599 #ifdef DEBUG_BOARD_INIT
600 printf("%s: register CPLD\n", __func__);
602 taihu_cpld_init(sysmem, 0x50100000);
604 linux_boot = (kernel_filename != NULL);
606 #ifdef DEBUG_BOARD_INIT
607 printf("%s: load kernel\n", __func__);
609 kernel_base = KERNEL_LOAD_ADDR;
610 /* now we can load the kernel */
611 kernel_size = load_image_targphys(kernel_filename, kernel_base,
612 ram_size - kernel_base);
613 if (kernel_size < 0) {
614 fprintf(stderr, "qemu: could not load kernel '%s'\n",
619 if (initrd_filename) {
620 initrd_base = INITRD_LOAD_ADDR;
621 initrd_size = load_image_targphys(initrd_filename, initrd_base,
622 ram_size - initrd_base);
623 if (initrd_size < 0) {
625 "qemu: could not load initial ram disk '%s'\n",
639 #ifdef DEBUG_BOARD_INIT
640 printf("%s: Done\n", __func__);
644 static void taihu_class_init(ObjectClass *oc, void *data)
646 MachineClass *mc = MACHINE_CLASS(oc);
649 mc->init = taihu_405ep_init;
652 static const TypeInfo taihu_type = {
653 .name = MACHINE_TYPE_NAME("taihu"),
654 .parent = TYPE_MACHINE,
655 .class_init = taihu_class_init,
658 static void ppc405_machine_init(void)
660 type_register_static(&ref405ep_type);
661 type_register_static(&taihu_type);
664 type_init(ppc405_machine_init)