2 * Arm PrimeCell PL061 General Purpose IO with additional
3 * Luminary Micro Stellaris bits.
5 * Copyright (c) 2007 CodeSourcery.
6 * Written by Paul Brook
8 * This code is licensed under the GPL.
11 #include "qemu/osdep.h"
12 #include "hw/sysbus.h"
14 //#define DEBUG_PL061 1
17 #define DPRINTF(fmt, ...) \
18 do { printf("pl061: " fmt , ## __VA_ARGS__); } while (0)
19 #define BADF(fmt, ...) \
20 do { fprintf(stderr, "pl061: error: " fmt , ## __VA_ARGS__); exit(1);} while (0)
22 #define DPRINTF(fmt, ...) do {} while(0)
23 #define BADF(fmt, ...) \
24 do { fprintf(stderr, "pl061: error: " fmt , ## __VA_ARGS__);} while (0)
27 static const uint8_t pl061_id[12] =
28 { 0x00, 0x00, 0x00, 0x00, 0x61, 0x10, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
29 static const uint8_t pl061_id_luminary[12] =
30 { 0x00, 0x00, 0x00, 0x00, 0x61, 0x00, 0x18, 0x01, 0x0d, 0xf0, 0x05, 0xb1 };
32 #define TYPE_PL061 "pl061"
33 #define PL061(obj) OBJECT_CHECK(PL061State, (obj), TYPE_PL061)
35 typedef struct PL061State {
36 SysBusDevice parent_obj;
41 uint32_t old_out_data;
62 const unsigned char *id;
63 uint32_t rsvd_start; /* reserved area: [rsvd_start, 0xfcc] */
66 static const VMStateDescription vmstate_pl061 = {
69 .minimum_version_id = 4,
70 .fields = (VMStateField[]) {
71 VMSTATE_UINT32(locked, PL061State),
72 VMSTATE_UINT32(data, PL061State),
73 VMSTATE_UINT32(old_out_data, PL061State),
74 VMSTATE_UINT32(old_in_data, PL061State),
75 VMSTATE_UINT32(dir, PL061State),
76 VMSTATE_UINT32(isense, PL061State),
77 VMSTATE_UINT32(ibe, PL061State),
78 VMSTATE_UINT32(iev, PL061State),
79 VMSTATE_UINT32(im, PL061State),
80 VMSTATE_UINT32(istate, PL061State),
81 VMSTATE_UINT32(afsel, PL061State),
82 VMSTATE_UINT32(dr2r, PL061State),
83 VMSTATE_UINT32(dr4r, PL061State),
84 VMSTATE_UINT32(dr8r, PL061State),
85 VMSTATE_UINT32(odr, PL061State),
86 VMSTATE_UINT32(pur, PL061State),
87 VMSTATE_UINT32(pdr, PL061State),
88 VMSTATE_UINT32(slr, PL061State),
89 VMSTATE_UINT32(den, PL061State),
90 VMSTATE_UINT32(cr, PL061State),
91 VMSTATE_UINT32_V(amsel, PL061State, 2),
96 static void pl061_update(PL061State *s)
103 DPRINTF("dir = %d, data = %d\n", s->dir, s->data);
105 /* Outputs float high. */
106 /* FIXME: This is board dependent. */
107 out = (s->data & s->dir) | ~s->dir;
108 changed = s->old_out_data ^ out;
110 s->old_out_data = out;
111 for (i = 0; i < 8; i++) {
113 if (changed & mask) {
114 DPRINTF("Set output %d = %d\n", i, (out & mask) != 0);
115 qemu_set_irq(s->out[i], (out & mask) != 0);
121 changed = (s->old_in_data ^ s->data) & ~s->dir;
123 s->old_in_data = s->data;
124 for (i = 0; i < 8; i++) {
126 if (changed & mask) {
127 DPRINTF("Changed input %d = %d\n", i, (s->data & mask) != 0);
129 if (!(s->isense & mask)) {
132 /* Any edge triggers the interrupt */
135 /* Edge is selected by IEV */
136 s->istate |= ~(s->data ^ s->iev) & mask;
143 /* Level interrupt */
144 s->istate |= ~(s->data ^ s->iev) & s->isense;
146 DPRINTF("istate = %02X\n", s->istate);
148 qemu_set_irq(s->irq, (s->istate & s->im) != 0);
151 static uint64_t pl061_read(void *opaque, hwaddr offset,
154 PL061State *s = (PL061State *)opaque;
156 if (offset < 0x400) {
157 return s->data & (offset >> 2);
159 if (offset >= s->rsvd_start && offset <= 0xfcc) {
162 if (offset >= 0xfd0 && offset < 0x1000) {
163 return s->id[(offset - 0xfd0) >> 2];
166 case 0x400: /* Direction */
168 case 0x404: /* Interrupt sense */
170 case 0x408: /* Interrupt both edges */
172 case 0x40c: /* Interrupt event */
174 case 0x410: /* Interrupt mask */
176 case 0x414: /* Raw interrupt status */
178 case 0x418: /* Masked interrupt status */
179 return s->istate & s->im;
180 case 0x420: /* Alternate function select */
182 case 0x500: /* 2mA drive */
184 case 0x504: /* 4mA drive */
186 case 0x508: /* 8mA drive */
188 case 0x50c: /* Open drain */
190 case 0x510: /* Pull-up */
192 case 0x514: /* Pull-down */
194 case 0x518: /* Slew rate control */
196 case 0x51c: /* Digital enable */
198 case 0x520: /* Lock */
200 case 0x524: /* Commit */
202 case 0x528: /* Analog mode select */
208 qemu_log_mask(LOG_GUEST_ERROR,
209 "pl061_read: Bad offset %x\n", (int)offset);
213 static void pl061_write(void *opaque, hwaddr offset,
214 uint64_t value, unsigned size)
216 PL061State *s = (PL061State *)opaque;
219 if (offset < 0x400) {
220 mask = (offset >> 2) & s->dir;
221 s->data = (s->data & ~mask) | (value & mask);
225 if (offset >= s->rsvd_start) {
229 case 0x400: /* Direction */
230 s->dir = value & 0xff;
232 case 0x404: /* Interrupt sense */
233 s->isense = value & 0xff;
235 case 0x408: /* Interrupt both edges */
236 s->ibe = value & 0xff;
238 case 0x40c: /* Interrupt event */
239 s->iev = value & 0xff;
241 case 0x410: /* Interrupt mask */
242 s->im = value & 0xff;
244 case 0x41c: /* Interrupt clear */
247 case 0x420: /* Alternate function select */
249 s->afsel = (s->afsel & ~mask) | (value & mask);
251 case 0x500: /* 2mA drive */
252 s->dr2r = value & 0xff;
254 case 0x504: /* 4mA drive */
255 s->dr4r = value & 0xff;
257 case 0x508: /* 8mA drive */
258 s->dr8r = value & 0xff;
260 case 0x50c: /* Open drain */
261 s->odr = value & 0xff;
263 case 0x510: /* Pull-up */
264 s->pur = value & 0xff;
266 case 0x514: /* Pull-down */
267 s->pdr = value & 0xff;
269 case 0x518: /* Slew rate control */
270 s->slr = value & 0xff;
272 case 0x51c: /* Digital enable */
273 s->den = value & 0xff;
275 case 0x520: /* Lock */
276 s->locked = (value != 0xacce551);
278 case 0x524: /* Commit */
280 s->cr = value & 0xff;
283 s->amsel = value & 0xff;
291 qemu_log_mask(LOG_GUEST_ERROR,
292 "pl061_write: Bad offset %x\n", (int)offset);
295 static void pl061_reset(DeviceState *dev)
297 PL061State *s = PL061(dev);
299 /* reset values from PL061 TRM, Stellaris LM3S5P31 & LM3S8962 Data Sheet */
323 static void pl061_set_irq(void * opaque, int irq, int level)
325 PL061State *s = (PL061State *)opaque;
329 if ((s->dir & mask) == 0) {
337 static const MemoryRegionOps pl061_ops = {
339 .write = pl061_write,
340 .endianness = DEVICE_NATIVE_ENDIAN,
343 static int pl061_initfn(SysBusDevice *sbd)
345 DeviceState *dev = DEVICE(sbd);
346 PL061State *s = PL061(dev);
348 memory_region_init_io(&s->iomem, OBJECT(s), &pl061_ops, s, "pl061", 0x1000);
349 sysbus_init_mmio(sbd, &s->iomem);
350 sysbus_init_irq(sbd, &s->irq);
351 qdev_init_gpio_in(dev, pl061_set_irq, 8);
352 qdev_init_gpio_out(dev, s->out, 8);
357 static void pl061_luminary_init(Object *obj)
359 PL061State *s = PL061(obj);
361 s->id = pl061_id_luminary;
362 s->rsvd_start = 0x52c;
365 static void pl061_init(Object *obj)
367 PL061State *s = PL061(obj);
370 s->rsvd_start = 0x424;
373 static void pl061_class_init(ObjectClass *klass, void *data)
375 DeviceClass *dc = DEVICE_CLASS(klass);
376 SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
378 k->init = pl061_initfn;
379 dc->vmsd = &vmstate_pl061;
380 dc->reset = &pl061_reset;
383 static const TypeInfo pl061_info = {
385 .parent = TYPE_SYS_BUS_DEVICE,
386 .instance_size = sizeof(PL061State),
387 .instance_init = pl061_init,
388 .class_init = pl061_class_init,
391 static const TypeInfo pl061_luminary_info = {
392 .name = "pl061_luminary",
393 .parent = TYPE_PL061,
394 .instance_init = pl061_luminary_init,
397 static void pl061_register_types(void)
399 type_register_static(&pl061_info);
400 type_register_static(&pl061_luminary_info);
403 type_init(pl061_register_types)