4 * Copyright (C) 2006-2007 Andrzej Zaborowski <balrog@zabor.org>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, see <http://www.gnu.org/licenses/>.
20 #include "ui/console.h"
21 #include "hw/arm/omap.h"
22 #include "framebuffer.h"
23 #include "ui/pixel_ops.h"
25 struct omap_lcd_panel_s {
28 MemoryRegionSection fbsection;
43 struct omap_dma_lcd_channel_s *dma;
44 uint16_t palette[256];
51 static void omap_lcd_interrupts(struct omap_lcd_panel_s *s)
53 if (s->frame_done && (s->interrupts & 1)) {
54 qemu_irq_raise(s->irq);
58 if (s->palette_done && (s->interrupts & 2)) {
59 qemu_irq_raise(s->irq);
64 qemu_irq_raise(s->irq);
68 qemu_irq_lower(s->irq);
71 #define draw_line_func drawfn
74 #include "omap_lcd_template.h"
76 #include "omap_lcd_template.h"
78 #include "omap_lcd_template.h"
80 #include "omap_lcd_template.h"
82 static draw_line_func draw_line_table2[33] = {
88 }, draw_line_table4[33] = {
94 }, draw_line_table8[33] = {
100 }, draw_line_table12[33] = {
103 [15] = draw_line12_15,
104 [16] = draw_line12_16,
105 [32] = draw_line12_32,
106 }, draw_line_table16[33] = {
109 [15] = draw_line16_15,
110 [16] = draw_line16_16,
111 [32] = draw_line16_32,
114 static void omap_update_display(void *opaque)
116 struct omap_lcd_panel_s *omap_lcd = (struct omap_lcd_panel_s *) opaque;
117 DisplaySurface *surface = qemu_console_surface(omap_lcd->con);
118 draw_line_func draw_line;
119 int size, height, first, last;
120 int width, linesize, step, bpp, frame_offset;
123 if (!omap_lcd || omap_lcd->plm == 1 || !omap_lcd->enable ||
124 !surface_bits_per_pixel(surface)) {
129 if (omap_lcd->plm != 2) {
130 cpu_physical_memory_read(omap_lcd->dma->phys_framebuffer[
131 omap_lcd->dma->current_frame],
132 (void *)omap_lcd->palette, 0x200);
133 switch (omap_lcd->palette[0] >> 12 & 7) {
135 frame_offset += 0x200;
138 frame_offset += 0x20;
143 switch ((omap_lcd->palette[0] >> 12) & 7) {
145 draw_line = draw_line_table2[surface_bits_per_pixel(surface)];
150 draw_line = draw_line_table4[surface_bits_per_pixel(surface)];
155 draw_line = draw_line_table8[surface_bits_per_pixel(surface)];
161 draw_line = draw_line_table12[surface_bits_per_pixel(surface)];
163 draw_line = draw_line_table16[surface_bits_per_pixel(surface)];
168 /* Unsupported at the moment. */
173 width = omap_lcd->width;
174 if (width != surface_width(surface) ||
175 omap_lcd->height != surface_height(surface)) {
176 qemu_console_resize(omap_lcd->con,
177 omap_lcd->width, omap_lcd->height);
178 surface = qemu_console_surface(omap_lcd->con);
179 omap_lcd->invalidate = 1;
182 if (omap_lcd->dma->current_frame == 0)
183 size = omap_lcd->dma->src_f1_bottom - omap_lcd->dma->src_f1_top;
185 size = omap_lcd->dma->src_f2_bottom - omap_lcd->dma->src_f2_top;
187 if (frame_offset + ((width * omap_lcd->height * bpp) >> 3) > size + 2) {
188 omap_lcd->sync_error = 1;
189 omap_lcd_interrupts(omap_lcd);
190 omap_lcd->enable = 0;
195 frame_base = omap_lcd->dma->phys_framebuffer[
196 omap_lcd->dma->current_frame] + frame_offset;
197 omap_lcd->dma->condition |= 1 << omap_lcd->dma->current_frame;
198 if (omap_lcd->dma->interrupts & 1)
199 qemu_irq_raise(omap_lcd->dma->irq);
200 if (omap_lcd->dma->dual)
201 omap_lcd->dma->current_frame ^= 1;
203 if (!surface_bits_per_pixel(surface)) {
208 height = omap_lcd->height;
209 if (omap_lcd->subpanel & (1 << 31)) {
210 if (omap_lcd->subpanel & (1 << 29))
211 first = (omap_lcd->subpanel >> 16) & 0x3ff;
213 height = (omap_lcd->subpanel >> 16) & 0x3ff;
214 /* TODO: fill the rest of the panel with DPD */
217 step = width * bpp >> 3;
218 linesize = surface_stride(surface);
219 if (omap_lcd->invalidate) {
220 framebuffer_update_memory_section(&omap_lcd->fbsection,
221 omap_lcd->sysmem, frame_base,
225 framebuffer_update_display(surface, &omap_lcd->fbsection,
228 omap_lcd->invalidate,
229 draw_line, omap_lcd->palette,
233 dpy_gfx_update(omap_lcd->con, 0, first, width, last - first + 1);
235 omap_lcd->invalidate = 0;
238 static void omap_invalidate_display(void *opaque) {
239 struct omap_lcd_panel_s *omap_lcd = opaque;
240 omap_lcd->invalidate = 1;
243 static void omap_lcd_update(struct omap_lcd_panel_s *s) {
245 s->dma->current_frame = -1;
249 omap_lcd_interrupts(s);
253 if (s->dma->current_frame == -1) {
256 s->dma->current_frame = 0;
259 if (!s->dma->mpu->port[s->dma->src].addr_valid(s->dma->mpu,
260 s->dma->src_f1_top) ||
262 s->dma->src].addr_valid(s->dma->mpu,
263 s->dma->src_f1_bottom) ||
266 s->dma->src].addr_valid(s->dma->mpu,
267 s->dma->src_f2_top) ||
269 s->dma->src].addr_valid(s->dma->mpu,
270 s->dma->src_f2_bottom)))) {
271 s->dma->condition |= 1 << 2;
272 if (s->dma->interrupts & (1 << 1))
273 qemu_irq_raise(s->dma->irq);
278 s->dma->phys_framebuffer[0] = s->dma->src_f1_top;
279 s->dma->phys_framebuffer[1] = s->dma->src_f2_top;
281 if (s->plm != 2 && !s->palette_done) {
282 cpu_physical_memory_read(
283 s->dma->phys_framebuffer[s->dma->current_frame],
284 (void *)s->palette, 0x200);
286 omap_lcd_interrupts(s);
290 static uint64_t omap_lcdc_read(void *opaque, hwaddr addr,
293 struct omap_lcd_panel_s *s = (struct omap_lcd_panel_s *) opaque;
296 case 0x00: /* LCD_CONTROL */
297 return (s->tft << 23) | (s->plm << 20) |
298 (s->tft << 7) | (s->interrupts << 3) |
299 (s->mono << 1) | s->enable | s->ctrl | 0xfe000c34;
301 case 0x04: /* LCD_TIMING0 */
302 return (s->timing[0] << 10) | (s->width - 1) | 0x0000000f;
304 case 0x08: /* LCD_TIMING1 */
305 return (s->timing[1] << 10) | (s->height - 1);
307 case 0x0c: /* LCD_TIMING2 */
308 return s->timing[2] | 0xfc000000;
310 case 0x10: /* LCD_STATUS */
311 return (s->palette_done << 6) | (s->sync_error << 2) | s->frame_done;
313 case 0x14: /* LCD_SUBPANEL */
323 static void omap_lcdc_write(void *opaque, hwaddr addr,
324 uint64_t value, unsigned size)
326 struct omap_lcd_panel_s *s = (struct omap_lcd_panel_s *) opaque;
329 case 0x00: /* LCD_CONTROL */
330 s->plm = (value >> 20) & 3;
331 s->tft = (value >> 7) & 1;
332 s->interrupts = (value >> 3) & 3;
333 s->mono = (value >> 1) & 1;
334 s->ctrl = value & 0x01cff300;
335 if (s->enable != (value & 1)) {
336 s->enable = value & 1;
341 case 0x04: /* LCD_TIMING0 */
342 s->timing[0] = value >> 10;
343 s->width = (value & 0x3ff) + 1;
346 case 0x08: /* LCD_TIMING1 */
347 s->timing[1] = value >> 10;
348 s->height = (value & 0x3ff) + 1;
351 case 0x0c: /* LCD_TIMING2 */
352 s->timing[2] = value;
355 case 0x10: /* LCD_STATUS */
358 case 0x14: /* LCD_SUBPANEL */
359 s->subpanel = value & 0xa1ffffff;
367 static const MemoryRegionOps omap_lcdc_ops = {
368 .read = omap_lcdc_read,
369 .write = omap_lcdc_write,
370 .endianness = DEVICE_NATIVE_ENDIAN,
373 void omap_lcdc_reset(struct omap_lcd_panel_s *s)
375 s->dma->current_frame = -1;
395 static const GraphicHwOps omap_ops = {
396 .invalidate = omap_invalidate_display,
397 .gfx_update = omap_update_display,
400 struct omap_lcd_panel_s *omap_lcdc_init(MemoryRegion *sysmem,
403 struct omap_dma_lcd_channel_s *dma,
406 struct omap_lcd_panel_s *s = (struct omap_lcd_panel_s *)
407 g_malloc0(sizeof(struct omap_lcd_panel_s));
414 memory_region_init_io(&s->iomem, NULL, &omap_lcdc_ops, s, "omap.lcdc", 0x100);
415 memory_region_add_subregion(sysmem, base, &s->iomem);
417 s->con = graphic_console_init(NULL, 0, &omap_ops, s);