patches/dpdk_custom_patch/i40e-fix-link-status-change-interrupt.patch

   1 diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
   2 index d0aeb70..9c1f542 100644
   3 --- a/drivers/net/i40e/i40e_ethdev.c
   4 +++ b/drivers/net/i40e/i40e_ethdev.c
   5 @@ -108,7 +108,6 @@
   6                 I40E_PFINT_ICR0_ENA_GRST_MASK | \
   7                 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK | \
   8                 I40E_PFINT_ICR0_ENA_STORM_DETECT_MASK | \
   9 -               I40E_PFINT_ICR0_ENA_LINK_STAT_CHANGE_MASK | \
  10                 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK | \
  11                 I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK | \
  12                 I40E_PFINT_ICR0_ENA_VFLR_MASK | \
  13 @@ -1768,6 +1767,16 @@ i40e_dev_start(struct rte_eth_dev *dev)
  14                 if (dev->data->dev_conf.intr_conf.lsc != 0)
  15                         PMD_INIT_LOG(INFO, "lsc won't enable because of"
  16                                      " no intr multiplex\n");
  17 +       } else if (dev->data->dev_conf.intr_conf.lsc != 0) {
  18 +               ret = i40e_aq_set_phy_int_mask(hw,
  19 +                                              ~(I40E_AQ_EVENT_LINK_UPDOWN |
  20 +                                              I40E_AQ_EVENT_MODULE_QUAL_FAIL |
  21 +                                              I40E_AQ_EVENT_MEDIA_NA), NULL);
  22 +               if (ret != I40E_SUCCESS)
  23 +                       PMD_DRV_LOG(WARNING, "Fail to set phy mask");
  24 +
  25 +               /* Call get_link_info aq commond to enable LSE */
  26 +               i40e_dev_link_update(dev, 0);
  27         }
  28
  29         /* enable uio intr after callback register */
  30 @@ -1984,6 +1993,7 @@ i40e_dev_link_update(struct rte_eth_dev *dev,
  31         struct rte_eth_link link, old;
  32         int status;
  33         unsigned rep_cnt = MAX_REPEAT_TIME;
  34 +       bool enable_lse = dev->data->dev_conf.intr_conf.lsc ? true : false;
  35
  36         memset(&link, 0, sizeof(link));
  37         memset(&old, 0, sizeof(old));
  38 @@ -1992,7 +2002,8 @@ i40e_dev_link_update(struct rte_eth_dev *dev,
  39
  40         do {
  41                 /* Get link status information from hardware */
  42 -               status = i40e_aq_get_link_info(hw, false, &link_status, NULL);
  43 +               status = i40e_aq_get_link_info(hw, enable_lse,
  44 +                                               &link_status, NULL);
  45                 if (status != I40E_SUCCESS) {
  46                         link.link_speed = ETH_SPEED_NUM_100M;
  47                         link.link_duplex = ETH_LINK_FULL_DUPLEX;
  48 @@ -5442,6 +5453,12 @@ i40e_dev_handle_aq_msg(struct rte_eth_dev *dev)
  49                                         info.msg_buf,
  50                                         info.msg_len);
  51                         break;
  52 +               case i40e_aqc_opc_get_link_status:
  53 +                       ret = i40e_dev_link_update(dev, 0);
  54 +                       if (!ret)
  55 +                               _rte_eth_dev_callback_process(dev,
  56 +                                       RTE_ETH_EVENT_INTR_LSC);
  57 +                       break;
  58                 default:
  59                         PMD_DRV_LOG(ERR, "Request %u is not supported yet",
  60                                     opcode);
  61 @@ -5451,57 +5468,6 @@ i40e_dev_handle_aq_msg(struct rte_eth_dev *dev)
  62         rte_free(info.msg_buf);
  63  }
  64
  65 -/*
  66 - * Interrupt handler is registered as the alarm callback for handling LSC
  67 - * interrupt in a definite of time, in order to wait the NIC into a stable
  68 - * state. Currently it waits 1 sec in i40e for the link up interrupt, and
  69 - * no need for link down interrupt.
  70 - */
  71 -static void
  72 -i40e_dev_interrupt_delayed_handler(void *param)
  73 -{
  74 -       struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
  75 -       struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
  76 -       uint32_t icr0;
  77 -
  78 -       /* read interrupt causes again */
  79 -       icr0 = I40E_READ_REG(hw, I40E_PFINT_ICR0);
  80 -
  81 -#ifdef RTE_LIBRTE_I40E_DEBUG_DRIVER
  82 -       if (icr0 & I40E_PFINT_ICR0_ECC_ERR_MASK)
  83 -               PMD_DRV_LOG(ERR, "ICR0: unrecoverable ECC error\n");
  84 -       if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK)
  85 -               PMD_DRV_LOG(ERR, "ICR0: malicious programming detected\n");
  86 -       if (icr0 & I40E_PFINT_ICR0_GRST_MASK)
  87 -               PMD_DRV_LOG(INFO, "ICR0: global reset requested\n");
  88 -       if (icr0 & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK)
  89 -               PMD_DRV_LOG(INFO, "ICR0: PCI exception\n activated\n");
  90 -       if (icr0 & I40E_PFINT_ICR0_STORM_DETECT_MASK)
  91 -               PMD_DRV_LOG(INFO, "ICR0: a change in the storm control "
  92 -                                                               "state\n");
  93 -       if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK)
  94 -               PMD_DRV_LOG(ERR, "ICR0: HMC error\n");
  95 -       if (icr0 & I40E_PFINT_ICR0_PE_CRITERR_MASK)
  96 -               PMD_DRV_LOG(ERR, "ICR0: protocol engine critical error\n");
  97 -#endif /* RTE_LIBRTE_I40E_DEBUG_DRIVER */
  98 -
  99 -       if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
 100 -               PMD_DRV_LOG(INFO, "INT:VF reset detected\n");
 101 -               i40e_dev_handle_vfr_event(dev);
 102 -       }
 103 -       if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
 104 -               PMD_DRV_LOG(INFO, "INT:ADMINQ event\n");
 105 -               i40e_dev_handle_aq_msg(dev);
 106 -       }
 107 -
 108 -       /* handle the link up interrupt in an alarm callback */
 109 -       i40e_dev_link_update(dev, 0);
 110 -       _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC);
 111 -
 112 -       i40e_pf_enable_irq0(hw);
 113 -       rte_intr_enable(&(dev->pci_dev->intr_handle));
 114 -}
 115 -
 116  /**
 117   * Interrupt handler triggered by NIC  for handling
 118   * specific interrupt.
 119 @@ -5558,31 +5524,6 @@ i40e_dev_interrupt_handler(__rte_unused struct rte_intr_handle *handle,
 120                 PMD_DRV_LOG(INFO, "ICR0: adminq event");
 121                 i40e_dev_handle_aq_msg(dev);
 122         }
 123 -
 124 -       /* Link Status Change interrupt */
 125 -       if (icr0 & I40E_PFINT_ICR0_LINK_STAT_CHANGE_MASK) {
 126 -#define I40E_US_PER_SECOND 1000000
 127 -               struct rte_eth_link link;
 128 -
 129 -               PMD_DRV_LOG(INFO, "ICR0: link status changed\n");
 130 -               memset(&link, 0, sizeof(link));
 131 -               rte_i40e_dev_atomic_read_link_status(dev, &link);
 132 -               i40e_dev_link_update(dev, 0);
 133 -
 134 -               /*
 135 -                * For link up interrupt, it needs to wait 1 second to let the
 136 -                * hardware be a stable state. Otherwise several consecutive
 137 -                * interrupts can be observed.
 138 -                * For link down interrupt, no need to wait.
 139 -                */
 140 -               if (!link.link_status && rte_eal_alarm_set(I40E_US_PER_SECOND,
 141 -                       i40e_dev_interrupt_delayed_handler, (void *)dev) >= 0)
 142 -                       return;
 143 -               else
 144 -                       _rte_eth_dev_callback_process(dev,
 145 -                               RTE_ETH_EVENT_INTR_LSC);
 146 -       }
 147 -
 148  done:
 149         /* Enable interrupt */
 150         i40e_pf_enable_irq0(hw);