Added support for IMIX through config and command line
[samplevnf.git] / patches / dpdk_custom_patch / i40e-fix-link-management.patch
1 From ca7e599d4506f3d6b89dd846c901d09d46ea593c Mon Sep 17 00:00:00 2001
2 From: Jingjing Wu <jingjing.wu@intel.com>
3 Date: Thu, 12 May 2016 15:21:04 +0800
4 Subject: [PATCH] net/i40e: fix link management
5 MIME-Version: 1.0
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
8
9 Previously, there was a known issue "On Intel® 40G Ethernet
10 Controller stopping the port does not really down the port link."
11
12 There were two reasons why the port was always kept up.
13 1. Old firmware versions had issues when "Set PHY config command"
14    was used on 40G NICs.
15 2. The kernel i40e driver didn't call "Set PHY config command" when
16    ifconfig up/down was used, it assumes the link is always up. But
17    in DPDK, ports are forced down when an applications quits. So if
18    the port is then switched to being controlled by kernel the driver,
19    the port can not be brought up through "ifconfig <ethx> up".
20
21 This patch fixes this issue by adding in "Set PHY config command"
22 into our driver. This is now possible because with newer firmware
23 there is no longer a problem using this command.
24
25 With this fix, after DPDK quit, if the port is switched to being used
26 by the kernel driver, "ethtool -s <ethx> autoneg on" can be used to
27 turn on the auto negotiation, and then port can be brought up through
28 "ifconfig <ethx> up".
29 NOTE: requires kernel i40e driver version >= 1.4.X
30
31 Fixes: 2f1e22817420 ("i40e: skip link control as firmware workaround")
32 Fixes: 16c979f9adf2 ("i40e: disable setting of PHY configuration")
33
34 Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
35 ---
36  doc/guides/rel_notes/known_issues.rst | 19 ---------
37  drivers/net/i40e/i40e_ethdev.c        | 72 +++++++++++++++++++++++++++++------
38  2 files changed, 60 insertions(+), 31 deletions(-)
39
40 diff --git a/doc/guides/rel_notes/known_issues.rst b/doc/guides/rel_notes/known_issues.rst
41 index e464eca..5ec1987 100644
42 --- a/doc/guides/rel_notes/known_issues.rst
43 +++ b/doc/guides/rel_notes/known_issues.rst
44 @@ -532,25 +532,6 @@ Cannot set link speed on Intel® 40G Ethernet controller
45     Poll Mode Driver (PMD).
46  
47  
48 -Stopping the port does not down the link on Intel® 40G Ethernet controller
49 ---------------------------------------------------------------------------
50 -
51 -**Description**:
52 -   On Intel® 40G Ethernet Controller stopping the port does not really down the port link.
53 -
54 -**Implication**:
55 -   The port link will be still up after stopping the port.
56 -
57 -**Resolution/Workaround**:
58 -   None
59 -
60 -**Affected Environment/Platform**:
61 -   All.
62 -
63 -**Driver/Module**:
64 -   Poll Mode Driver (PMD).
65 -
66 -
67  Devices bound to igb_uio with VT-d enabled do not work on Linux kernel 3.15-3.17
68  --------------------------------------------------------------------------------
69  
70 diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
71 index f94ad87..7a94663 100644
72 --- a/drivers/net/i40e/i40e_ethdev.c
73 +++ b/drivers/net/i40e/i40e_ethdev.c
74 @@ -1407,15 +1407,58 @@ i40e_parse_link_speeds(uint16_t link_speeds)
75  }
76  
77  static int
78 -i40e_phy_conf_link(__rte_unused struct i40e_hw *hw,
79 -                  __rte_unused uint8_t abilities,
80 -                  __rte_unused uint8_t force_speed)
81 -{
82 -       /* Skip any phy config on both 10G and 40G interfaces, as a workaround
83 -        * for the link control limitation of that all link control should be
84 -        * handled by firmware. It should follow up if link control will be
85 -        * opened to software driver in future firmware versions.
86 -        */
87 +i40e_phy_conf_link(struct i40e_hw *hw,
88 +                  uint8_t abilities,
89 +                  uint8_t force_speed)
90 +{
91 +       enum i40e_status_code status;
92 +       struct i40e_aq_get_phy_abilities_resp phy_ab;
93 +       struct i40e_aq_set_phy_config phy_conf;
94 +       const uint8_t mask = I40E_AQ_PHY_FLAG_PAUSE_TX |
95 +                       I40E_AQ_PHY_FLAG_PAUSE_RX |
96 +                       I40E_AQ_PHY_FLAG_PAUSE_RX |
97 +                       I40E_AQ_PHY_FLAG_LOW_POWER;
98 +       const uint8_t advt = I40E_LINK_SPEED_40GB |
99 +                       I40E_LINK_SPEED_10GB |
100 +                       I40E_LINK_SPEED_1GB |
101 +                       I40E_LINK_SPEED_100MB;
102 +       int ret = -ENOTSUP;
103 +
104 +
105 +       status = i40e_aq_get_phy_capabilities(hw, false, false, &phy_ab,
106 +                                             NULL);
107 +       if (status)
108 +               return ret;
109 +
110 +       memset(&phy_conf, 0, sizeof(phy_conf));
111 +
112 +       /* bits 0-2 use the values from get_phy_abilities_resp */
113 +       abilities &= ~mask;
114 +       abilities |= phy_ab.abilities & mask;
115 +
116 +       /* update ablities and speed */
117 +       if (abilities & I40E_AQ_PHY_AN_ENABLED)
118 +               phy_conf.link_speed = advt;
119 +       else
120 +               phy_conf.link_speed = force_speed;
121 +
122 +       phy_conf.abilities = abilities;
123 +
124 +       /* use get_phy_abilities_resp value for the rest */
125 +       phy_conf.phy_type = phy_ab.phy_type;
126 +       phy_conf.eee_capability = phy_ab.eee_capability;
127 +       phy_conf.eeer = phy_ab.eeer_val;
128 +       phy_conf.low_power_ctrl = phy_ab.d3_lpan;
129 +
130 +       PMD_DRV_LOG(DEBUG, "\tCurrent: abilities %x, link_speed %x",
131 +                   phy_ab.abilities, phy_ab.link_speed);
132 +       PMD_DRV_LOG(DEBUG, "\tConfig:  abilities %x, link_speed %x",
133 +                   phy_conf.abilities, phy_conf.link_speed);
134 +
135 +       status = i40e_aq_set_phy_config(hw, &phy_conf, NULL);
136 +       if (status)
137 +               return ret;
138 +
139         return I40E_SUCCESS;
140  }
141  
142 @@ -1431,8 +1474,13 @@ i40e_apply_link_speed(struct rte_eth_dev *dev)
143         abilities |= I40E_AQ_PHY_ENABLE_ATOMIC_LINK;
144         if (!(conf->link_speeds & ETH_LINK_SPEED_FIXED))
145                 abilities |= I40E_AQ_PHY_AN_ENABLED;
146 -       else
147 -               abilities |= I40E_AQ_PHY_LINK_ENABLED;
148 +       abilities |= I40E_AQ_PHY_LINK_ENABLED;
149 +
150 +       /* Skip changing speed on 40G interfaces, FW does not support */
151 +       if (i40e_is_40G_device(hw->device_id)) {
152 +               speed =  I40E_LINK_SPEED_UNKNOWN;
153 +               abilities |= I40E_AQ_PHY_AN_ENABLED;
154 +       }
155  
156         return i40e_phy_conf_link(hw, abilities, speed);
157  }
158 @@ -1742,7 +1790,7 @@ i40e_dev_set_link_up(struct rte_eth_dev *dev)
159   * Set device link down.
160   */
161  static int
162 -i40e_dev_set_link_down(__rte_unused struct rte_eth_dev *dev)
163 +i40e_dev_set_link_down(struct rte_eth_dev *dev)
164  {
165         uint8_t speed = I40E_LINK_SPEED_UNKNOWN;
166         uint8_t abilities = I40E_AQ_PHY_ENABLE_ATOMIC_LINK;
167 -- 
168 2.7.4
169