3 * Comedi driver for National Instruments PCI-6527
5 * COMEDI - Linux Control and Measurement Device Interface
6 * Copyright (C) 1999,2002,2003 David A. Schleef <ds@schleef.org>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
21 * Description: National Instruments 6527
22 * Devices: [National Instruments] PCI-6527 (pci-6527), PXI-6527 (pxi-6527)
23 * Author: David A. Schleef <ds@schleef.org>
24 * Updated: Sat, 25 Jan 2003 13:24:40 -0800
27 * Configuration Options: not applicable, uses PCI auto config
30 #include <linux/module.h>
31 #include <linux/interrupt.h>
33 #include "../comedi_pci.h"
36 * PCI BAR1 - Register memory map
38 * Manuals (available from ftp://ftp.natinst.com/support/manuals)
39 * 370106b.pdf 6527 Register Level Programmer Manual
41 #define NI6527_DI_REG(x) (0x00 + (x))
42 #define NI6527_DO_REG(x) (0x03 + (x))
43 #define NI6527_ID_REG 0x06
44 #define NI6527_CLR_REG 0x07
45 #define NI6527_CLR_EDGE (1 << 3)
46 #define NI6527_CLR_OVERFLOW (1 << 2)
47 #define NI6527_CLR_FILT (1 << 1)
48 #define NI6527_CLR_INTERVAL (1 << 0)
49 #define NI6527_CLR_IRQS (NI6527_CLR_EDGE | NI6527_CLR_OVERFLOW)
50 #define NI6527_CLR_RESET_FILT (NI6527_CLR_FILT | NI6527_CLR_INTERVAL)
51 #define NI6527_FILT_INTERVAL_REG(x) (0x08 + (x))
52 #define NI6527_FILT_ENA_REG(x) (0x0c + (x))
53 #define NI6527_STATUS_REG 0x14
54 #define NI6527_STATUS_IRQ (1 << 2)
55 #define NI6527_STATUS_OVERFLOW (1 << 1)
56 #define NI6527_STATUS_EDGE (1 << 0)
57 #define NI6527_CTRL_REG 0x15
58 #define NI6527_CTRL_FALLING (1 << 4)
59 #define NI6527_CTRL_RISING (1 << 3)
60 #define NI6527_CTRL_IRQ (1 << 2)
61 #define NI6527_CTRL_OVERFLOW (1 << 1)
62 #define NI6527_CTRL_EDGE (1 << 0)
63 #define NI6527_CTRL_DISABLE_IRQS 0
64 #define NI6527_CTRL_ENABLE_IRQS (NI6527_CTRL_FALLING | \
65 NI6527_CTRL_RISING | \
66 NI6527_CTRL_IRQ | NI6527_CTRL_EDGE)
67 #define NI6527_RISING_EDGE_REG(x) (0x18 + (x))
68 #define NI6527_FALLING_EDGE_REG(x) (0x20 + (x))
79 static const struct ni6527_board ni6527_boards[] = {
88 struct ni6527_private {
89 unsigned int filter_interval;
90 unsigned int filter_enable;
93 static void ni6527_set_filter_interval(struct comedi_device *dev,
96 struct ni6527_private *devpriv = dev->private;
98 if (val != devpriv->filter_interval) {
99 writeb(val & 0xff, dev->mmio + NI6527_FILT_INTERVAL_REG(0));
100 writeb((val >> 8) & 0xff,
101 dev->mmio + NI6527_FILT_INTERVAL_REG(1));
102 writeb((val >> 16) & 0x0f,
103 dev->mmio + NI6527_FILT_INTERVAL_REG(2));
105 writeb(NI6527_CLR_INTERVAL, dev->mmio + NI6527_CLR_REG);
107 devpriv->filter_interval = val;
111 static void ni6527_set_filter_enable(struct comedi_device *dev,
114 writeb(val & 0xff, dev->mmio + NI6527_FILT_ENA_REG(0));
115 writeb((val >> 8) & 0xff, dev->mmio + NI6527_FILT_ENA_REG(1));
116 writeb((val >> 16) & 0xff, dev->mmio + NI6527_FILT_ENA_REG(2));
119 static int ni6527_di_insn_config(struct comedi_device *dev,
120 struct comedi_subdevice *s,
121 struct comedi_insn *insn,
124 struct ni6527_private *devpriv = dev->private;
125 unsigned int chan = CR_CHAN(insn->chanspec);
126 unsigned int interval;
129 case INSN_CONFIG_FILTER:
131 * The deglitch filter interval is specified in nanoseconds.
132 * The hardware supports intervals in 200ns increments. Round
133 * the user values up and return the actual interval.
135 interval = (data[1] + 100) / 200;
136 data[1] = interval * 200;
139 ni6527_set_filter_interval(dev, interval);
140 devpriv->filter_enable |= 1 << chan;
142 devpriv->filter_enable &= ~(1 << chan);
144 ni6527_set_filter_enable(dev, devpriv->filter_enable);
153 static int ni6527_di_insn_bits(struct comedi_device *dev,
154 struct comedi_subdevice *s,
155 struct comedi_insn *insn,
160 val = readb(dev->mmio + NI6527_DI_REG(0));
161 val |= (readb(dev->mmio + NI6527_DI_REG(1)) << 8);
162 val |= (readb(dev->mmio + NI6527_DI_REG(2)) << 16);
169 static int ni6527_do_insn_bits(struct comedi_device *dev,
170 struct comedi_subdevice *s,
171 struct comedi_insn *insn,
176 mask = comedi_dio_update_state(s, data);
178 /* Outputs are inverted */
179 unsigned int val = s->state ^ 0xffffff;
182 writeb(val & 0xff, dev->mmio + NI6527_DO_REG(0));
184 writeb((val >> 8) & 0xff,
185 dev->mmio + NI6527_DO_REG(1));
187 writeb((val >> 16) & 0xff,
188 dev->mmio + NI6527_DO_REG(2));
196 static irqreturn_t ni6527_interrupt(int irq, void *d)
198 struct comedi_device *dev = d;
199 struct comedi_subdevice *s = dev->read_subdev;
202 status = readb(dev->mmio + NI6527_STATUS_REG);
203 if (!(status & NI6527_STATUS_IRQ))
206 if (status & NI6527_STATUS_EDGE) {
207 comedi_buf_write_samples(s, &s->state, 1);
208 comedi_handle_events(dev, s);
211 writeb(NI6527_CLR_IRQS, dev->mmio + NI6527_CLR_REG);
216 static int ni6527_intr_cmdtest(struct comedi_device *dev,
217 struct comedi_subdevice *s,
218 struct comedi_cmd *cmd)
222 /* Step 1 : check if triggers are trivially valid */
224 err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW);
225 err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_OTHER);
226 err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_FOLLOW);
227 err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
228 err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT);
233 /* Step 2a : make sure trigger sources are unique */
234 /* Step 2b : and mutually compatible */
236 /* Step 3: check if arguments are trivially valid */
238 err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
239 err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
240 err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0);
241 err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
243 err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
248 /* Step 4: fix up any arguments */
250 /* Step 5: check channel list if it exists */
255 static int ni6527_intr_cmd(struct comedi_device *dev,
256 struct comedi_subdevice *s)
258 writeb(NI6527_CLR_IRQS, dev->mmio + NI6527_CLR_REG);
259 writeb(NI6527_CTRL_ENABLE_IRQS, dev->mmio + NI6527_CTRL_REG);
264 static int ni6527_intr_cancel(struct comedi_device *dev,
265 struct comedi_subdevice *s)
267 writeb(NI6527_CTRL_DISABLE_IRQS, dev->mmio + NI6527_CTRL_REG);
272 static int ni6527_intr_insn_bits(struct comedi_device *dev,
273 struct comedi_subdevice *s,
274 struct comedi_insn *insn, unsigned int *data)
280 static void ni6527_set_edge_detection(struct comedi_device *dev,
283 unsigned int falling)
289 for (i = 0; i < 2; i++) {
292 /* preserve rising-edge detection channels */
293 rising |= readb(dev->mmio +
294 NI6527_RISING_EDGE_REG(i)) &
296 /* preserve falling-edge detection channels */
297 falling |= readb(dev->mmio +
298 NI6527_FALLING_EDGE_REG(i)) &
301 /* update rising-edge detection channels */
302 writeb(rising & 0xff,
303 dev->mmio + NI6527_RISING_EDGE_REG(i));
304 /* update falling-edge detection channels */
305 writeb(falling & 0xff,
306 dev->mmio + NI6527_FALLING_EDGE_REG(i));
314 static int ni6527_intr_insn_config(struct comedi_device *dev,
315 struct comedi_subdevice *s,
316 struct comedi_insn *insn,
319 unsigned int mask = 0xffffffff;
320 unsigned int rising, falling, shift;
323 case INSN_CONFIG_CHANGE_NOTIFY:
324 /* check_insn_config_length() does not check this instruction */
329 ni6527_set_edge_detection(dev, mask, rising, falling);
331 case INSN_CONFIG_DIGITAL_TRIG:
332 /* check trigger number */
335 /* check digital trigger operation */
337 case COMEDI_DIGITAL_TRIG_DISABLE:
341 case COMEDI_DIGITAL_TRIG_ENABLE_EDGES:
342 /* check shift amount */
344 if (shift >= s->n_chan) {
350 rising = data[4] << shift;
351 falling = data[5] << shift;
357 ni6527_set_edge_detection(dev, mask, rising, falling);
366 static void ni6527_reset(struct comedi_device *dev)
368 /* disable deglitch filters on all channels */
369 ni6527_set_filter_enable(dev, 0);
371 /* disable edge detection */
372 ni6527_set_edge_detection(dev, 0xffffffff, 0, 0);
374 writeb(NI6527_CLR_IRQS | NI6527_CLR_RESET_FILT,
375 dev->mmio + NI6527_CLR_REG);
376 writeb(NI6527_CTRL_DISABLE_IRQS, dev->mmio + NI6527_CTRL_REG);
379 static int ni6527_auto_attach(struct comedi_device *dev,
380 unsigned long context)
382 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
383 const struct ni6527_board *board = NULL;
384 struct ni6527_private *devpriv;
385 struct comedi_subdevice *s;
388 if (context < ARRAY_SIZE(ni6527_boards))
389 board = &ni6527_boards[context];
392 dev->board_ptr = board;
393 dev->board_name = board->name;
395 devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
399 ret = comedi_pci_enable(dev);
403 dev->mmio = pci_ioremap_bar(pcidev, 1);
407 /* make sure this is actually a 6527 device */
408 if (readb(dev->mmio + NI6527_ID_REG) != 0x27)
413 ret = request_irq(pcidev->irq, ni6527_interrupt, IRQF_SHARED,
414 dev->board_name, dev);
416 dev->irq = pcidev->irq;
418 ret = comedi_alloc_subdevices(dev, 3);
422 /* Digital Input subdevice */
423 s = &dev->subdevices[0];
424 s->type = COMEDI_SUBD_DI;
425 s->subdev_flags = SDF_READABLE;
428 s->range_table = &range_digital;
429 s->insn_config = ni6527_di_insn_config;
430 s->insn_bits = ni6527_di_insn_bits;
432 /* Digital Output subdevice */
433 s = &dev->subdevices[1];
434 s->type = COMEDI_SUBD_DO;
435 s->subdev_flags = SDF_WRITABLE;
438 s->range_table = &range_digital;
439 s->insn_bits = ni6527_do_insn_bits;
441 /* Edge detection interrupt subdevice */
442 s = &dev->subdevices[2];
444 dev->read_subdev = s;
445 s->type = COMEDI_SUBD_DI;
446 s->subdev_flags = SDF_READABLE | SDF_CMD_READ;
449 s->range_table = &range_digital;
450 s->insn_config = ni6527_intr_insn_config;
451 s->insn_bits = ni6527_intr_insn_bits;
453 s->do_cmdtest = ni6527_intr_cmdtest;
454 s->do_cmd = ni6527_intr_cmd;
455 s->cancel = ni6527_intr_cancel;
457 s->type = COMEDI_SUBD_UNUSED;
463 static void ni6527_detach(struct comedi_device *dev)
467 comedi_pci_detach(dev);
470 static struct comedi_driver ni6527_driver = {
471 .driver_name = "ni_6527",
472 .module = THIS_MODULE,
473 .auto_attach = ni6527_auto_attach,
474 .detach = ni6527_detach,
477 static int ni6527_pci_probe(struct pci_dev *dev,
478 const struct pci_device_id *id)
480 return comedi_pci_auto_config(dev, &ni6527_driver, id->driver_data);
483 static const struct pci_device_id ni6527_pci_table[] = {
484 { PCI_VDEVICE(NI, 0x2b10), BOARD_PXI6527 },
485 { PCI_VDEVICE(NI, 0x2b20), BOARD_PCI6527 },
488 MODULE_DEVICE_TABLE(pci, ni6527_pci_table);
490 static struct pci_driver ni6527_pci_driver = {
492 .id_table = ni6527_pci_table,
493 .probe = ni6527_pci_probe,
494 .remove = comedi_pci_auto_unconfig,
496 module_comedi_pci_driver(ni6527_driver, ni6527_pci_driver);
498 MODULE_AUTHOR("Comedi http://www.comedi.org");
499 MODULE_DESCRIPTION("Comedi driver for National Instruments PCI-6527");
500 MODULE_LICENSE("GPL");