1 /* Driver for Realtek PCI-Express card reader
3 * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2, or (at your option) any
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, see <http://www.gnu.org/licenses/>.
19 * Wei WANG (wei_wang@realsil.com.cn)
20 * Micky Ching (micky_ching@realsil.com.cn)
23 #include <linux/blkdev.h>
24 #include <linux/kthread.h>
25 #include <linux/sched.h>
26 #include <linux/vmalloc.h>
31 static inline void ms_set_err_code(struct rtsx_chip *chip, u8 err_code)
33 struct ms_info *ms_card = &(chip->ms_card);
35 ms_card->err_code = err_code;
38 static inline int ms_check_err_code(struct rtsx_chip *chip, u8 err_code)
40 struct ms_info *ms_card = &(chip->ms_card);
42 return (ms_card->err_code == err_code);
45 static int ms_parse_err_code(struct rtsx_chip *chip)
51 static int ms_transfer_tpc(struct rtsx_chip *chip, u8 trans_mode,
52 u8 tpc, u8 cnt, u8 cfg)
54 struct ms_info *ms_card = &(chip->ms_card);
58 dev_dbg(rtsx_dev(chip), "%s: tpc = 0x%x\n", __func__, tpc);
62 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
63 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
64 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
65 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
66 0x01, PINGPONG_BUFFER);
68 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER,
69 0xFF, MS_TRANSFER_START | trans_mode);
70 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
71 MS_TRANSFER_END, MS_TRANSFER_END);
73 rtsx_add_cmd(chip, READ_REG_CMD, MS_TRANS_CFG, 0, 0);
75 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
77 rtsx_clear_ms_error(chip);
78 ms_set_err_code(chip, MS_TO_ERROR);
80 return ms_parse_err_code(chip);
83 ptr = rtsx_get_cmd_data(chip) + 1;
85 if (!(tpc & 0x08)) { /* Read Packet */
86 if (*ptr & MS_CRC16_ERR) {
87 ms_set_err_code(chip, MS_CRC16_ERROR);
89 return ms_parse_err_code(chip);
91 } else { /* Write Packet */
92 if (CHK_MSPRO(ms_card) && !(*ptr & 0x80)) {
93 if (*ptr & (MS_INT_ERR | MS_INT_CMDNK)) {
94 ms_set_err_code(chip, MS_CMD_NK);
96 return ms_parse_err_code(chip);
101 if (*ptr & MS_RDY_TIMEOUT) {
102 rtsx_clear_ms_error(chip);
103 ms_set_err_code(chip, MS_TO_ERROR);
105 return ms_parse_err_code(chip);
108 return STATUS_SUCCESS;
111 static int ms_transfer_data(struct rtsx_chip *chip, u8 trans_mode,
112 u8 tpc, u16 sec_cnt, u8 cfg, bool mode_2k,
113 int use_sg, void *buf, int buf_len)
116 u8 val, err_code = 0;
117 enum dma_data_direction dir;
119 if (!buf || !buf_len) {
124 if (trans_mode == MS_TM_AUTO_READ) {
125 dir = DMA_FROM_DEVICE;
126 err_code = MS_FLASH_READ_ERROR;
127 } else if (trans_mode == MS_TM_AUTO_WRITE) {
129 err_code = MS_FLASH_WRITE_ERROR;
137 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
138 rtsx_add_cmd(chip, WRITE_REG_CMD,
139 MS_SECTOR_CNT_H, 0xFF, (u8)(sec_cnt >> 8));
140 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_SECTOR_CNT_L, 0xFF, (u8)sec_cnt);
141 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
144 rtsx_add_cmd(chip, WRITE_REG_CMD,
145 MS_CFG, MS_2K_SECTOR_MODE, MS_2K_SECTOR_MODE);
147 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_CFG, MS_2K_SECTOR_MODE, 0);
150 trans_dma_enable(dir, chip, sec_cnt * 512, DMA_512);
152 rtsx_add_cmd(chip, WRITE_REG_CMD,
153 MS_TRANSFER, 0xFF, MS_TRANSFER_START | trans_mode);
154 rtsx_add_cmd(chip, CHECK_REG_CMD,
155 MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
157 rtsx_send_cmd_no_wait(chip);
159 retval = rtsx_transfer_data(chip, MS_CARD, buf, buf_len,
160 use_sg, dir, chip->mspro_timeout);
162 ms_set_err_code(chip, err_code);
163 if (retval == -ETIMEDOUT)
164 retval = STATUS_TIMEDOUT;
166 retval = STATUS_FAIL;
172 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
177 if (val & (MS_INT_CMDNK | MS_INT_ERR | MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
182 return STATUS_SUCCESS;
185 static int ms_write_bytes(struct rtsx_chip *chip,
186 u8 tpc, u8 cnt, u8 cfg, u8 *data, int data_len)
188 struct ms_info *ms_card = &(chip->ms_card);
191 if (!data || (data_len < cnt)) {
198 for (i = 0; i < cnt; i++) {
199 rtsx_add_cmd(chip, WRITE_REG_CMD,
200 PPBUF_BASE2 + i, 0xFF, data[i]);
203 rtsx_add_cmd(chip, WRITE_REG_CMD, PPBUF_BASE2 + i, 0xFF, 0xFF);
205 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
206 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
207 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
208 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
209 0x01, PINGPONG_BUFFER);
211 rtsx_add_cmd(chip, WRITE_REG_CMD,
212 MS_TRANSFER, 0xFF, MS_TRANSFER_START | MS_TM_WRITE_BYTES);
213 rtsx_add_cmd(chip, CHECK_REG_CMD,
214 MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
216 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
220 rtsx_read_register(chip, MS_TRANS_CFG, &val);
221 dev_dbg(rtsx_dev(chip), "MS_TRANS_CFG: 0x%02x\n", val);
223 rtsx_clear_ms_error(chip);
226 if (val & MS_CRC16_ERR) {
227 ms_set_err_code(chip, MS_CRC16_ERROR);
229 return ms_parse_err_code(chip);
232 if (CHK_MSPRO(ms_card) && !(val & 0x80)) {
233 if (val & (MS_INT_ERR | MS_INT_CMDNK)) {
234 ms_set_err_code(chip, MS_CMD_NK);
236 return ms_parse_err_code(chip);
241 if (val & MS_RDY_TIMEOUT) {
242 ms_set_err_code(chip, MS_TO_ERROR);
244 return ms_parse_err_code(chip);
247 ms_set_err_code(chip, MS_TO_ERROR);
249 return ms_parse_err_code(chip);
252 return STATUS_SUCCESS;
255 static int ms_read_bytes(struct rtsx_chip *chip,
256 u8 tpc, u8 cnt, u8 cfg, u8 *data, int data_len)
258 struct ms_info *ms_card = &(chip->ms_card);
269 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
270 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
271 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
272 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
273 0x01, PINGPONG_BUFFER);
275 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
276 MS_TRANSFER_START | MS_TM_READ_BYTES);
277 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
278 MS_TRANSFER_END, MS_TRANSFER_END);
280 for (i = 0; i < data_len - 1; i++)
281 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + i, 0, 0);
284 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + data_len, 0, 0);
286 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + data_len - 1,
289 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
293 rtsx_read_register(chip, MS_TRANS_CFG, &val);
294 rtsx_clear_ms_error(chip);
297 if (val & MS_CRC16_ERR) {
298 ms_set_err_code(chip, MS_CRC16_ERROR);
300 return ms_parse_err_code(chip);
303 if (CHK_MSPRO(ms_card) && !(val & 0x80)) {
304 if (val & (MS_INT_ERR | MS_INT_CMDNK)) {
305 ms_set_err_code(chip, MS_CMD_NK);
307 return ms_parse_err_code(chip);
312 if (val & MS_RDY_TIMEOUT) {
313 ms_set_err_code(chip, MS_TO_ERROR);
315 return ms_parse_err_code(chip);
318 ms_set_err_code(chip, MS_TO_ERROR);
320 return ms_parse_err_code(chip);
323 ptr = rtsx_get_cmd_data(chip) + 1;
325 for (i = 0; i < data_len; i++)
328 if ((tpc == PRO_READ_SHORT_DATA) && (data_len == 8)) {
329 dev_dbg(rtsx_dev(chip), "Read format progress:\n");
330 print_hex_dump_bytes(KBUILD_MODNAME ": ", DUMP_PREFIX_NONE, ptr,
334 return STATUS_SUCCESS;
337 static int ms_set_rw_reg_addr(struct rtsx_chip *chip,
338 u8 read_start, u8 read_cnt, u8 write_start, u8 write_cnt)
343 data[0] = read_start;
345 data[2] = write_start;
348 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
349 retval = ms_write_bytes(chip, SET_RW_REG_ADRS, 4,
350 NO_WAIT_INT, data, 4);
351 if (retval == STATUS_SUCCESS)
352 return STATUS_SUCCESS;
353 rtsx_clear_ms_error(chip);
360 static int ms_send_cmd(struct rtsx_chip *chip, u8 cmd, u8 cfg)
367 return ms_write_bytes(chip, PRO_SET_CMD, 1, cfg, data, 1);
370 static int ms_set_init_para(struct rtsx_chip *chip)
372 struct ms_info *ms_card = &(chip->ms_card);
375 if (CHK_HG8BIT(ms_card)) {
377 ms_card->ms_clock = chip->asic_ms_hg_clk;
379 ms_card->ms_clock = chip->fpga_ms_hg_clk;
381 } else if (CHK_MSPRO(ms_card) || CHK_MS4BIT(ms_card)) {
383 ms_card->ms_clock = chip->asic_ms_4bit_clk;
385 ms_card->ms_clock = chip->fpga_ms_4bit_clk;
389 ms_card->ms_clock = chip->asic_ms_1bit_clk;
391 ms_card->ms_clock = chip->fpga_ms_1bit_clk;
394 retval = switch_clock(chip, ms_card->ms_clock);
395 if (retval != STATUS_SUCCESS) {
400 retval = select_card(chip, MS_CARD);
401 if (retval != STATUS_SUCCESS) {
406 return STATUS_SUCCESS;
409 static int ms_switch_clock(struct rtsx_chip *chip)
411 struct ms_info *ms_card = &(chip->ms_card);
414 retval = select_card(chip, MS_CARD);
415 if (retval != STATUS_SUCCESS) {
420 retval = switch_clock(chip, ms_card->ms_clock);
421 if (retval != STATUS_SUCCESS) {
426 return STATUS_SUCCESS;
429 static int ms_pull_ctl_disable(struct rtsx_chip *chip)
433 if (CHECK_PID(chip, 0x5208)) {
434 retval = rtsx_write_register(chip, CARD_PULL_CTL1, 0xFF,
435 MS_D1_PD | MS_D2_PD | MS_CLK_PD | MS_D6_PD);
440 retval = rtsx_write_register(chip, CARD_PULL_CTL2, 0xFF,
441 MS_D3_PD | MS_D0_PD | MS_BS_PD | XD_D4_PD);
446 retval = rtsx_write_register(chip, CARD_PULL_CTL3, 0xFF,
447 MS_D7_PD | XD_CE_PD | XD_CLE_PD | XD_CD_PU);
452 retval = rtsx_write_register(chip, CARD_PULL_CTL4, 0xFF,
453 XD_RDY_PD | SD_D3_PD | SD_D2_PD | XD_ALE_PD);
458 retval = rtsx_write_register(chip, CARD_PULL_CTL5, 0xFF,
459 MS_INS_PU | SD_WP_PD | SD_CD_PU | SD_CMD_PD);
464 retval = rtsx_write_register(chip, CARD_PULL_CTL6, 0xFF,
465 MS_D5_PD | MS_D4_PD);
470 } else if (CHECK_PID(chip, 0x5288)) {
471 if (CHECK_BARO_PKG(chip, QFN)) {
472 retval = rtsx_write_register(chip, CARD_PULL_CTL1,
478 retval = rtsx_write_register(chip, CARD_PULL_CTL2,
484 retval = rtsx_write_register(chip, CARD_PULL_CTL3,
490 retval = rtsx_write_register(chip, CARD_PULL_CTL4,
499 return STATUS_SUCCESS;
502 static int ms_pull_ctl_enable(struct rtsx_chip *chip)
508 if (CHECK_PID(chip, 0x5208)) {
509 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF,
510 MS_D1_PD | MS_D2_PD | MS_CLK_NP | MS_D6_PD);
511 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF,
512 MS_D3_PD | MS_D0_PD | MS_BS_NP | XD_D4_PD);
513 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF,
514 MS_D7_PD | XD_CE_PD | XD_CLE_PD | XD_CD_PU);
515 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF,
516 XD_RDY_PD | SD_D3_PD | SD_D2_PD | XD_ALE_PD);
517 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF,
518 MS_INS_PU | SD_WP_PD | SD_CD_PU | SD_CMD_PD);
519 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF,
520 MS_D5_PD | MS_D4_PD);
521 } else if (CHECK_PID(chip, 0x5288)) {
522 if (CHECK_BARO_PKG(chip, QFN)) {
523 rtsx_add_cmd(chip, WRITE_REG_CMD,
524 CARD_PULL_CTL1, 0xFF, 0x55);
525 rtsx_add_cmd(chip, WRITE_REG_CMD,
526 CARD_PULL_CTL2, 0xFF, 0x45);
527 rtsx_add_cmd(chip, WRITE_REG_CMD,
528 CARD_PULL_CTL3, 0xFF, 0x4B);
529 rtsx_add_cmd(chip, WRITE_REG_CMD,
530 CARD_PULL_CTL4, 0xFF, 0x29);
534 retval = rtsx_send_cmd(chip, MS_CARD, 100);
540 return STATUS_SUCCESS;
543 static int ms_prepare_reset(struct rtsx_chip *chip)
545 struct ms_info *ms_card = &(chip->ms_card);
549 ms_card->ms_type = 0;
550 ms_card->check_ms_flow = 0;
551 ms_card->switch_8bit_fail = 0;
552 ms_card->delay_write.delay_write_flag = 0;
554 ms_card->pro_under_formatting = 0;
556 retval = ms_power_off_card3v3(chip);
557 if (retval != STATUS_SUCCESS) {
562 if (!chip->ft2_fast_mode)
565 retval = enable_card_clock(chip, MS_CARD);
566 if (retval != STATUS_SUCCESS) {
571 if (chip->asic_code) {
572 retval = ms_pull_ctl_enable(chip);
573 if (retval != STATUS_SUCCESS) {
578 retval = rtsx_write_register(chip, FPGA_PULL_CTL,
579 FPGA_MS_PULL_CTL_BIT | 0x20, 0);
586 if (!chip->ft2_fast_mode) {
587 retval = card_power_on(chip, MS_CARD);
588 if (retval != STATUS_SUCCESS) {
596 if (CHECK_LUN_MODE(chip, SD_MS_2LUN))
597 oc_mask = MS_OC_NOW | MS_OC_EVER;
599 oc_mask = SD_OC_NOW | SD_OC_EVER;
601 if (chip->ocp_stat & oc_mask) {
602 dev_dbg(rtsx_dev(chip), "Over current, OCPSTAT is 0x%x\n",
610 retval = rtsx_write_register(chip, CARD_OE, MS_OUTPUT_EN,
617 if (chip->asic_code) {
618 retval = rtsx_write_register(chip, MS_CFG, 0xFF,
619 SAMPLE_TIME_RISING | PUSH_TIME_DEFAULT | NO_EXTEND_TOGGLE | MS_BUS_WIDTH_1);
625 retval = rtsx_write_register(chip, MS_CFG, 0xFF,
626 SAMPLE_TIME_FALLING | PUSH_TIME_DEFAULT | NO_EXTEND_TOGGLE | MS_BUS_WIDTH_1);
632 retval = rtsx_write_register(chip, MS_TRANS_CFG, 0xFF,
633 NO_WAIT_INT | NO_AUTO_READ_INT_REG);
638 retval = rtsx_write_register(chip, CARD_STOP, MS_STOP | MS_CLR_ERR,
639 MS_STOP | MS_CLR_ERR);
645 retval = ms_set_init_para(chip);
646 if (retval != STATUS_SUCCESS) {
651 return STATUS_SUCCESS;
654 static int ms_identify_media_type(struct rtsx_chip *chip, int switch_8bit_bus)
656 struct ms_info *ms_card = &(chip->ms_card);
660 retval = ms_set_rw_reg_addr(chip, Pro_StatusReg, 6, SystemParm, 1);
661 if (retval != STATUS_SUCCESS) {
666 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
667 retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, READ_REG,
669 if (retval == STATUS_SUCCESS)
672 if (i == MS_MAX_RETRY_COUNT) {
677 retval = rtsx_read_register(chip, PPBUF_BASE2 + 2, &val);
682 dev_dbg(rtsx_dev(chip), "Type register: 0x%x\n", val);
685 ms_card->check_ms_flow = 1;
691 retval = rtsx_read_register(chip, PPBUF_BASE2 + 4, &val);
696 dev_dbg(rtsx_dev(chip), "Category register: 0x%x\n", val);
698 ms_card->check_ms_flow = 1;
703 retval = rtsx_read_register(chip, PPBUF_BASE2 + 5, &val);
708 dev_dbg(rtsx_dev(chip), "Class register: 0x%x\n", val);
710 retval = rtsx_read_register(chip, PPBUF_BASE2, &val);
716 chip->card_wp |= MS_CARD;
718 chip->card_wp &= ~MS_CARD;
720 } else if ((val == 0x01) || (val == 0x02) || (val == 0x03)) {
721 chip->card_wp |= MS_CARD;
723 ms_card->check_ms_flow = 1;
728 ms_card->ms_type |= TYPE_MSPRO;
730 retval = rtsx_read_register(chip, PPBUF_BASE2 + 3, &val);
735 dev_dbg(rtsx_dev(chip), "IF Mode register: 0x%x\n", val);
737 ms_card->ms_type &= 0x0F;
738 } else if (val == 7) {
740 ms_card->ms_type |= MS_HG;
742 ms_card->ms_type &= 0x0F;
749 return STATUS_SUCCESS;
752 static int ms_confirm_cpu_startup(struct rtsx_chip *chip)
757 /* Confirm CPU StartUp */
760 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
761 ms_set_err_code(chip, MS_NO_CARD);
766 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
767 retval = ms_read_bytes(chip, GET_INT, 1,
768 NO_WAIT_INT, &val, 1);
769 if (retval == STATUS_SUCCESS)
772 if (i == MS_MAX_RETRY_COUNT) {
784 } while (!(val & INT_REG_CED));
786 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
787 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
788 if (retval == STATUS_SUCCESS)
791 if (i == MS_MAX_RETRY_COUNT) {
796 if (val & INT_REG_ERR) {
797 if (val & INT_REG_CMDNK)
798 chip->card_wp |= (MS_CARD);
804 /* -- end confirm CPU startup */
806 return STATUS_SUCCESS;
809 static int ms_switch_parallel_bus(struct rtsx_chip *chip)
814 data[0] = PARALLEL_4BIT_IF;
816 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
817 retval = ms_write_bytes(chip, WRITE_REG, 1, NO_WAIT_INT,
819 if (retval == STATUS_SUCCESS)
822 if (retval != STATUS_SUCCESS) {
827 return STATUS_SUCCESS;
830 static int ms_switch_8bit_bus(struct rtsx_chip *chip)
832 struct ms_info *ms_card = &(chip->ms_card);
836 data[0] = PARALLEL_8BIT_IF;
838 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
839 retval = ms_write_bytes(chip, WRITE_REG, 1,
840 NO_WAIT_INT, data, 2);
841 if (retval == STATUS_SUCCESS)
844 if (retval != STATUS_SUCCESS) {
849 retval = rtsx_write_register(chip, MS_CFG, 0x98,
850 MS_BUS_WIDTH_8 | SAMPLE_TIME_FALLING);
855 ms_card->ms_type |= MS_8BIT;
856 retval = ms_set_init_para(chip);
857 if (retval != STATUS_SUCCESS) {
862 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
863 retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, GET_INT,
865 if (retval != STATUS_SUCCESS) {
871 return STATUS_SUCCESS;
874 static int ms_pro_reset_flow(struct rtsx_chip *chip, int switch_8bit_bus)
876 struct ms_info *ms_card = &(chip->ms_card);
879 for (i = 0; i < 3; i++) {
880 retval = ms_prepare_reset(chip);
881 if (retval != STATUS_SUCCESS) {
886 retval = ms_identify_media_type(chip, switch_8bit_bus);
887 if (retval != STATUS_SUCCESS) {
892 retval = ms_confirm_cpu_startup(chip);
893 if (retval != STATUS_SUCCESS) {
898 retval = ms_switch_parallel_bus(chip);
899 if (retval != STATUS_SUCCESS) {
900 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
901 ms_set_err_code(chip, MS_NO_CARD);
911 if (retval != STATUS_SUCCESS) {
916 /* Switch MS-PRO into Parallel mode */
917 retval = rtsx_write_register(chip, MS_CFG, 0x18, MS_BUS_WIDTH_4);
922 retval = rtsx_write_register(chip, MS_CFG, PUSH_TIME_ODD,
929 retval = ms_set_init_para(chip);
930 if (retval != STATUS_SUCCESS) {
935 /* If MSPro HG Card, We shall try to switch to 8-bit bus */
936 if (CHK_MSHG(ms_card) && chip->support_ms_8bit && switch_8bit_bus) {
937 retval = ms_switch_8bit_bus(chip);
938 if (retval != STATUS_SUCCESS) {
939 ms_card->switch_8bit_fail = 1;
945 return STATUS_SUCCESS;
949 static int msxc_change_power(struct rtsx_chip *chip, u8 mode)
954 ms_cleanup_work(chip);
956 retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_DataCount1, 6);
957 if (retval != STATUS_SUCCESS) {
969 retval = ms_write_bytes(chip, PRO_WRITE_REG, 6, NO_WAIT_INT, buf, 6);
970 if (retval != STATUS_SUCCESS) {
975 retval = ms_send_cmd(chip, XC_CHG_POWER, WAIT_INT);
976 if (retval != STATUS_SUCCESS) {
981 retval = rtsx_read_register(chip, MS_TRANS_CFG, buf);
986 if (buf[0] & (MS_INT_CMDNK | MS_INT_ERR)) {
991 return STATUS_SUCCESS;
995 static int ms_read_attribute_info(struct rtsx_chip *chip)
997 struct ms_info *ms_card = &(chip->ms_card);
999 u8 val, *buf, class_code, device_type, sub_class, data[16];
1000 u16 total_blk = 0, blk_size = 0;
1002 u32 xc_total_blk = 0, xc_blk_size = 0;
1004 u32 sys_info_addr = 0, sys_info_size;
1005 #ifdef SUPPORT_PCGL_1P18
1006 u32 model_name_addr = 0, model_name_size;
1007 int found_sys_info = 0, found_model_name = 0;
1010 retval = ms_set_rw_reg_addr(chip, Pro_IntReg, 2, Pro_SystemParm, 7);
1011 if (retval != STATUS_SUCCESS) {
1016 if (CHK_MS8BIT(ms_card))
1017 data[0] = PARALLEL_8BIT_IF;
1019 data[0] = PARALLEL_4BIT_IF;
1030 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
1031 retval = ms_write_bytes(chip, PRO_WRITE_REG, 7, NO_WAIT_INT,
1033 if (retval == STATUS_SUCCESS)
1036 if (retval != STATUS_SUCCESS) {
1041 buf = kmalloc(64 * 512, GFP_KERNEL);
1044 return STATUS_ERROR;
1047 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
1048 retval = ms_send_cmd(chip, PRO_READ_ATRB, WAIT_INT);
1049 if (retval != STATUS_SUCCESS)
1052 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
1053 if (retval != STATUS_SUCCESS) {
1058 if (!(val & MS_INT_BREQ)) {
1063 retval = ms_transfer_data(chip, MS_TM_AUTO_READ,
1064 PRO_READ_LONG_DATA, 0x40, WAIT_INT,
1065 0, 0, buf, 64 * 512);
1066 if (retval == STATUS_SUCCESS)
1069 rtsx_clear_ms_error(chip);
1071 if (retval != STATUS_SUCCESS) {
1079 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
1080 if (retval != STATUS_SUCCESS) {
1086 if ((val & MS_INT_CED) || !(val & MS_INT_BREQ))
1089 retval = ms_transfer_tpc(chip, MS_TM_NORMAL_READ,
1090 PRO_READ_LONG_DATA, 0, WAIT_INT);
1091 if (retval != STATUS_SUCCESS) {
1100 if (retval != STATUS_SUCCESS) {
1106 if ((buf[0] != 0xa5) && (buf[1] != 0xc3)) {
1107 /* Signature code is wrong */
1113 if ((buf[4] < 1) || (buf[4] > 12)) {
1119 for (i = 0; i < buf[4]; i++) {
1120 int cur_addr_off = 16 + i * 12;
1123 if ((buf[cur_addr_off + 8] == 0x10) ||
1124 (buf[cur_addr_off + 8] == 0x13)) {
1126 if (buf[cur_addr_off + 8] == 0x10) {
1128 sys_info_addr = ((u32)buf[cur_addr_off + 0] << 24) |
1129 ((u32)buf[cur_addr_off + 1] << 16) |
1130 ((u32)buf[cur_addr_off + 2] << 8) |
1131 buf[cur_addr_off + 3];
1132 sys_info_size = ((u32)buf[cur_addr_off + 4] << 24) |
1133 ((u32)buf[cur_addr_off + 5] << 16) |
1134 ((u32)buf[cur_addr_off + 6] << 8) |
1135 buf[cur_addr_off + 7];
1136 dev_dbg(rtsx_dev(chip), "sys_info_addr = 0x%x, sys_info_size = 0x%x\n",
1137 sys_info_addr, sys_info_size);
1138 if (sys_info_size != 96) {
1143 if (sys_info_addr < 0x1A0) {
1148 if ((sys_info_size + sys_info_addr) > 0x8000) {
1155 if (buf[cur_addr_off + 8] == 0x13)
1156 ms_card->ms_type |= MS_XC;
1158 #ifdef SUPPORT_PCGL_1P18
1164 #ifdef SUPPORT_PCGL_1P18
1165 if (buf[cur_addr_off + 8] == 0x15) {
1166 model_name_addr = ((u32)buf[cur_addr_off + 0] << 24) |
1167 ((u32)buf[cur_addr_off + 1] << 16) |
1168 ((u32)buf[cur_addr_off + 2] << 8) |
1169 buf[cur_addr_off + 3];
1170 model_name_size = ((u32)buf[cur_addr_off + 4] << 24) |
1171 ((u32)buf[cur_addr_off + 5] << 16) |
1172 ((u32)buf[cur_addr_off + 6] << 8) |
1173 buf[cur_addr_off + 7];
1174 dev_dbg(rtsx_dev(chip), "model_name_addr = 0x%x, model_name_size = 0x%x\n",
1175 model_name_addr, model_name_size);
1176 if (model_name_size != 48) {
1181 if (model_name_addr < 0x1A0) {
1186 if ((model_name_size + model_name_addr) > 0x8000) {
1192 found_model_name = 1;
1195 if (found_sys_info && found_model_name)
1206 class_code = buf[sys_info_addr + 0];
1207 device_type = buf[sys_info_addr + 56];
1208 sub_class = buf[sys_info_addr + 46];
1210 if (CHK_MSXC(ms_card)) {
1211 xc_total_blk = ((u32)buf[sys_info_addr + 6] << 24) |
1212 ((u32)buf[sys_info_addr + 7] << 16) |
1213 ((u32)buf[sys_info_addr + 8] << 8) |
1214 buf[sys_info_addr + 9];
1215 xc_blk_size = ((u32)buf[sys_info_addr + 32] << 24) |
1216 ((u32)buf[sys_info_addr + 33] << 16) |
1217 ((u32)buf[sys_info_addr + 34] << 8) |
1218 buf[sys_info_addr + 35];
1219 dev_dbg(rtsx_dev(chip), "xc_total_blk = 0x%x, xc_blk_size = 0x%x\n",
1220 xc_total_blk, xc_blk_size);
1222 total_blk = ((u16)buf[sys_info_addr + 6] << 8) |
1223 buf[sys_info_addr + 7];
1224 blk_size = ((u16)buf[sys_info_addr + 2] << 8) |
1225 buf[sys_info_addr + 3];
1226 dev_dbg(rtsx_dev(chip), "total_blk = 0x%x, blk_size = 0x%x\n",
1227 total_blk, blk_size);
1230 total_blk = ((u16)buf[sys_info_addr + 6] << 8) | buf[sys_info_addr + 7];
1231 blk_size = ((u16)buf[sys_info_addr + 2] << 8) | buf[sys_info_addr + 3];
1232 dev_dbg(rtsx_dev(chip), "total_blk = 0x%x, blk_size = 0x%x\n",
1233 total_blk, blk_size);
1236 dev_dbg(rtsx_dev(chip), "class_code = 0x%x, device_type = 0x%x, sub_class = 0x%x\n",
1237 class_code, device_type, sub_class);
1239 memcpy(ms_card->raw_sys_info, buf + sys_info_addr, 96);
1240 #ifdef SUPPORT_PCGL_1P18
1241 memcpy(ms_card->raw_model_name, buf + model_name_addr, 48);
1247 if (CHK_MSXC(ms_card)) {
1248 if (class_code != 0x03) {
1253 if (class_code != 0x02) {
1259 if (class_code != 0x02) {
1265 if (device_type != 0x00) {
1266 if ((device_type == 0x01) || (device_type == 0x02) ||
1267 (device_type == 0x03)) {
1268 chip->card_wp |= MS_CARD;
1275 if (sub_class & 0xC0) {
1280 dev_dbg(rtsx_dev(chip), "class_code: 0x%x, device_type: 0x%x, sub_class: 0x%x\n",
1281 class_code, device_type, sub_class);
1284 if (CHK_MSXC(ms_card)) {
1285 chip->capacity[chip->card2lun[MS_CARD]] =
1286 ms_card->capacity = xc_total_blk * xc_blk_size;
1288 chip->capacity[chip->card2lun[MS_CARD]] =
1289 ms_card->capacity = total_blk * blk_size;
1292 ms_card->capacity = total_blk * blk_size;
1293 chip->capacity[chip->card2lun[MS_CARD]] = ms_card->capacity;
1296 return STATUS_SUCCESS;
1299 #ifdef SUPPORT_MAGIC_GATE
1300 static int mg_set_tpc_para_sub(struct rtsx_chip *chip,
1301 int type, u8 mg_entry_num);
1304 static int reset_ms_pro(struct rtsx_chip *chip)
1306 struct ms_info *ms_card = &(chip->ms_card);
1308 #ifdef XC_POWERCLASS
1309 u8 change_power_class;
1311 if (chip->ms_power_class_en & 0x02)
1312 change_power_class = 2;
1313 else if (chip->ms_power_class_en & 0x01)
1314 change_power_class = 1;
1316 change_power_class = 0;
1319 #ifdef XC_POWERCLASS
1322 retval = ms_pro_reset_flow(chip, 1);
1323 if (retval != STATUS_SUCCESS) {
1324 if (ms_card->switch_8bit_fail) {
1325 retval = ms_pro_reset_flow(chip, 0);
1326 if (retval != STATUS_SUCCESS) {
1336 retval = ms_read_attribute_info(chip);
1337 if (retval != STATUS_SUCCESS) {
1342 #ifdef XC_POWERCLASS
1343 if (CHK_HG8BIT(ms_card))
1344 change_power_class = 0;
1346 if (change_power_class && CHK_MSXC(ms_card)) {
1347 u8 power_class_en = chip->ms_power_class_en;
1349 dev_dbg(rtsx_dev(chip), "power_class_en = 0x%x\n",
1351 dev_dbg(rtsx_dev(chip), "change_power_class = %d\n",
1352 change_power_class);
1354 if (change_power_class)
1355 power_class_en &= (1 << (change_power_class - 1));
1359 if (power_class_en) {
1360 u8 power_class_mode =
1361 (ms_card->raw_sys_info[46] & 0x18) >> 3;
1362 dev_dbg(rtsx_dev(chip), "power_class_mode = 0x%x",
1364 if (change_power_class > power_class_mode)
1365 change_power_class = power_class_mode;
1366 if (change_power_class) {
1367 retval = msxc_change_power(chip,
1368 change_power_class);
1369 if (retval != STATUS_SUCCESS) {
1370 change_power_class--;
1378 #ifdef SUPPORT_MAGIC_GATE
1379 retval = mg_set_tpc_para_sub(chip, 0, 0);
1380 if (retval != STATUS_SUCCESS) {
1386 if (CHK_HG8BIT(ms_card))
1387 chip->card_bus_width[chip->card2lun[MS_CARD]] = 8;
1389 chip->card_bus_width[chip->card2lun[MS_CARD]] = 4;
1391 return STATUS_SUCCESS;
1394 static int ms_read_status_reg(struct rtsx_chip *chip)
1399 retval = ms_set_rw_reg_addr(chip, StatusReg0, 2, 0, 0);
1400 if (retval != STATUS_SUCCESS) {
1405 retval = ms_read_bytes(chip, READ_REG, 2, NO_WAIT_INT, val, 2);
1406 if (retval != STATUS_SUCCESS) {
1411 if (val[1] & (STS_UCDT | STS_UCEX | STS_UCFG)) {
1412 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
1417 return STATUS_SUCCESS;
1421 static int ms_read_extra_data(struct rtsx_chip *chip,
1422 u16 block_addr, u8 page_num, u8 *buf, int buf_len)
1424 struct ms_info *ms_card = &(chip->ms_card);
1428 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
1430 if (retval != STATUS_SUCCESS) {
1435 if (CHK_MS4BIT(ms_card)) {
1436 /* Parallel interface */
1439 /* Serial interface */
1443 data[2] = (u8)(block_addr >> 8);
1444 data[3] = (u8)block_addr;
1448 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
1449 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT,
1451 if (retval == STATUS_SUCCESS)
1454 if (i == MS_MAX_RETRY_COUNT) {
1459 ms_set_err_code(chip, MS_NO_ERROR);
1461 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
1462 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
1463 if (retval == STATUS_SUCCESS)
1466 if (i == MS_MAX_RETRY_COUNT) {
1471 ms_set_err_code(chip, MS_NO_ERROR);
1472 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1473 if (retval != STATUS_SUCCESS) {
1478 if (val & INT_REG_CMDNK) {
1479 ms_set_err_code(chip, MS_CMD_NK);
1483 if (val & INT_REG_CED) {
1484 if (val & INT_REG_ERR) {
1485 retval = ms_read_status_reg(chip);
1486 if (retval != STATUS_SUCCESS) {
1491 retval = ms_set_rw_reg_addr(chip, OverwriteFlag,
1492 MS_EXTRA_SIZE, SystemParm, 6);
1493 if (retval != STATUS_SUCCESS) {
1500 retval = ms_read_bytes(chip, READ_REG, MS_EXTRA_SIZE, NO_WAIT_INT,
1501 data, MS_EXTRA_SIZE);
1502 if (retval != STATUS_SUCCESS) {
1507 if (buf && buf_len) {
1508 if (buf_len > MS_EXTRA_SIZE)
1509 buf_len = MS_EXTRA_SIZE;
1510 memcpy(buf, data, buf_len);
1513 return STATUS_SUCCESS;
1516 static int ms_write_extra_data(struct rtsx_chip *chip,
1517 u16 block_addr, u8 page_num, u8 *buf, int buf_len)
1519 struct ms_info *ms_card = &(chip->ms_card);
1523 if (!buf || (buf_len < MS_EXTRA_SIZE)) {
1528 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
1529 SystemParm, 6 + MS_EXTRA_SIZE);
1530 if (retval != STATUS_SUCCESS) {
1535 if (CHK_MS4BIT(ms_card))
1541 data[2] = (u8)(block_addr >> 8);
1542 data[3] = (u8)block_addr;
1546 for (i = 6; i < MS_EXTRA_SIZE + 6; i++)
1547 data[i] = buf[i - 6];
1549 retval = ms_write_bytes(chip, WRITE_REG, (6 + MS_EXTRA_SIZE),
1550 NO_WAIT_INT, data, 16);
1551 if (retval != STATUS_SUCCESS) {
1556 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1557 if (retval != STATUS_SUCCESS) {
1562 ms_set_err_code(chip, MS_NO_ERROR);
1563 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1564 if (retval != STATUS_SUCCESS) {
1569 if (val & INT_REG_CMDNK) {
1570 ms_set_err_code(chip, MS_CMD_NK);
1574 if (val & INT_REG_CED) {
1575 if (val & INT_REG_ERR) {
1576 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1582 return STATUS_SUCCESS;
1586 static int ms_read_page(struct rtsx_chip *chip, u16 block_addr, u8 page_num)
1588 struct ms_info *ms_card = &(chip->ms_card);
1592 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
1594 if (retval != STATUS_SUCCESS) {
1599 if (CHK_MS4BIT(ms_card))
1605 data[2] = (u8)(block_addr >> 8);
1606 data[3] = (u8)block_addr;
1610 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, data, 6);
1611 if (retval != STATUS_SUCCESS) {
1616 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
1617 if (retval != STATUS_SUCCESS) {
1622 ms_set_err_code(chip, MS_NO_ERROR);
1623 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1624 if (retval != STATUS_SUCCESS) {
1629 if (val & INT_REG_CMDNK) {
1630 ms_set_err_code(chip, MS_CMD_NK);
1635 if (val & INT_REG_CED) {
1636 if (val & INT_REG_ERR) {
1637 if (!(val & INT_REG_BREQ)) {
1638 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
1642 retval = ms_read_status_reg(chip);
1643 if (retval != STATUS_SUCCESS)
1644 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1647 if (!(val & INT_REG_BREQ)) {
1648 ms_set_err_code(chip, MS_BREQ_ERROR);
1655 retval = ms_transfer_tpc(chip, MS_TM_NORMAL_READ, READ_PAGE_DATA,
1657 if (retval != STATUS_SUCCESS) {
1662 if (ms_check_err_code(chip, MS_FLASH_WRITE_ERROR)) {
1667 return STATUS_SUCCESS;
1671 static int ms_set_bad_block(struct rtsx_chip *chip, u16 phy_blk)
1673 struct ms_info *ms_card = &(chip->ms_card);
1675 u8 val, data[8], extra[MS_EXTRA_SIZE];
1677 retval = ms_read_extra_data(chip, phy_blk, 0, extra, MS_EXTRA_SIZE);
1678 if (retval != STATUS_SUCCESS) {
1683 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
1685 if (retval != STATUS_SUCCESS) {
1690 ms_set_err_code(chip, MS_NO_ERROR);
1692 if (CHK_MS4BIT(ms_card))
1698 data[2] = (u8)(phy_blk >> 8);
1699 data[3] = (u8)phy_blk;
1702 data[6] = extra[0] & 0x7F;
1705 retval = ms_write_bytes(chip, WRITE_REG, 7, NO_WAIT_INT, data, 7);
1706 if (retval != STATUS_SUCCESS) {
1711 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1712 if (retval != STATUS_SUCCESS) {
1717 ms_set_err_code(chip, MS_NO_ERROR);
1718 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1719 if (retval != STATUS_SUCCESS) {
1724 if (val & INT_REG_CMDNK) {
1725 ms_set_err_code(chip, MS_CMD_NK);
1730 if (val & INT_REG_CED) {
1731 if (val & INT_REG_ERR) {
1732 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1738 return STATUS_SUCCESS;
1742 static int ms_erase_block(struct rtsx_chip *chip, u16 phy_blk)
1744 struct ms_info *ms_card = &(chip->ms_card);
1748 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
1750 if (retval != STATUS_SUCCESS) {
1755 ms_set_err_code(chip, MS_NO_ERROR);
1757 if (CHK_MS4BIT(ms_card))
1763 data[2] = (u8)(phy_blk >> 8);
1764 data[3] = (u8)phy_blk;
1768 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, data, 6);
1769 if (retval != STATUS_SUCCESS) {
1775 retval = ms_send_cmd(chip, BLOCK_ERASE, WAIT_INT);
1776 if (retval != STATUS_SUCCESS) {
1781 ms_set_err_code(chip, MS_NO_ERROR);
1782 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1783 if (retval != STATUS_SUCCESS) {
1788 if (val & INT_REG_CMDNK) {
1794 ms_set_err_code(chip, MS_CMD_NK);
1795 ms_set_bad_block(chip, phy_blk);
1800 if (val & INT_REG_CED) {
1801 if (val & INT_REG_ERR) {
1802 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1808 return STATUS_SUCCESS;
1812 static void ms_set_page_status(u16 log_blk, u8 type, u8 *extra, int extra_len)
1814 if (!extra || (extra_len < MS_EXTRA_SIZE))
1817 memset(extra, 0xFF, MS_EXTRA_SIZE);
1819 if (type == setPS_NG) {
1820 /* set page status as 1:NG,and block status keep 1:OK */
1823 /* set page status as 0:Data Error,and block status keep 1:OK */
1827 extra[2] = (u8)(log_blk >> 8);
1828 extra[3] = (u8)log_blk;
1831 static int ms_init_page(struct rtsx_chip *chip, u16 phy_blk, u16 log_blk,
1832 u8 start_page, u8 end_page)
1835 u8 extra[MS_EXTRA_SIZE], i;
1837 memset(extra, 0xff, MS_EXTRA_SIZE);
1839 extra[0] = 0xf8; /* Block, page OK, data erased */
1841 extra[2] = (u8)(log_blk >> 8);
1842 extra[3] = (u8)log_blk;
1844 for (i = start_page; i < end_page; i++) {
1845 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
1846 ms_set_err_code(chip, MS_NO_CARD);
1851 retval = ms_write_extra_data(chip, phy_blk, i,
1852 extra, MS_EXTRA_SIZE);
1853 if (retval != STATUS_SUCCESS) {
1859 return STATUS_SUCCESS;
1862 static int ms_copy_page(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
1863 u16 log_blk, u8 start_page, u8 end_page)
1865 struct ms_info *ms_card = &(chip->ms_card);
1866 bool uncorrect_flag = false;
1867 int retval, rty_cnt;
1868 u8 extra[MS_EXTRA_SIZE], val, i, j, data[16];
1870 dev_dbg(rtsx_dev(chip), "Copy page from 0x%x to 0x%x, logical block is 0x%x\n",
1871 old_blk, new_blk, log_blk);
1872 dev_dbg(rtsx_dev(chip), "start_page = %d, end_page = %d\n",
1873 start_page, end_page);
1875 retval = ms_read_extra_data(chip, new_blk, 0, extra, MS_EXTRA_SIZE);
1876 if (retval != STATUS_SUCCESS) {
1881 retval = ms_read_status_reg(chip);
1882 if (retval != STATUS_SUCCESS) {
1887 retval = rtsx_read_register(chip, PPBUF_BASE2, &val);
1893 if (val & BUF_FULL) {
1894 retval = ms_send_cmd(chip, CLEAR_BUF, WAIT_INT);
1895 if (retval != STATUS_SUCCESS) {
1900 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1901 if (retval != STATUS_SUCCESS) {
1906 if (!(val & INT_REG_CED)) {
1907 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1913 for (i = start_page; i < end_page; i++) {
1914 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
1915 ms_set_err_code(chip, MS_NO_CARD);
1920 ms_read_extra_data(chip, old_blk, i, extra, MS_EXTRA_SIZE);
1922 retval = ms_set_rw_reg_addr(chip, OverwriteFlag,
1923 MS_EXTRA_SIZE, SystemParm, 6);
1924 if (retval != STATUS_SUCCESS) {
1929 ms_set_err_code(chip, MS_NO_ERROR);
1931 if (CHK_MS4BIT(ms_card))
1937 data[2] = (u8)(old_blk >> 8);
1938 data[3] = (u8)old_blk;
1942 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT,
1944 if (retval != STATUS_SUCCESS) {
1949 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
1950 if (retval != STATUS_SUCCESS) {
1955 ms_set_err_code(chip, MS_NO_ERROR);
1956 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1957 if (retval != STATUS_SUCCESS) {
1962 if (val & INT_REG_CMDNK) {
1963 ms_set_err_code(chip, MS_CMD_NK);
1968 if (val & INT_REG_CED) {
1969 if (val & INT_REG_ERR) {
1970 retval = ms_read_status_reg(chip);
1971 if (retval != STATUS_SUCCESS) {
1972 uncorrect_flag = true;
1973 dev_dbg(rtsx_dev(chip), "Uncorrectable error\n");
1975 uncorrect_flag = false;
1978 retval = ms_transfer_tpc(chip,
1982 if (retval != STATUS_SUCCESS) {
1987 if (uncorrect_flag) {
1988 ms_set_page_status(log_blk, setPS_NG,
1989 extra, MS_EXTRA_SIZE);
1993 ms_write_extra_data(chip, old_blk, i,
1994 extra, MS_EXTRA_SIZE);
1995 dev_dbg(rtsx_dev(chip), "page %d : extra[0] = 0x%x\n",
1997 MS_SET_BAD_BLOCK_FLG(ms_card);
1999 ms_set_page_status(log_blk, setPS_Error,
2000 extra, MS_EXTRA_SIZE);
2001 ms_write_extra_data(chip, new_blk, i,
2002 extra, MS_EXTRA_SIZE);
2006 for (rty_cnt = 0; rty_cnt < MS_MAX_RETRY_COUNT;
2008 retval = ms_transfer_tpc(
2013 if (retval == STATUS_SUCCESS)
2016 if (rty_cnt == MS_MAX_RETRY_COUNT) {
2022 if (!(val & INT_REG_BREQ)) {
2023 ms_set_err_code(chip, MS_BREQ_ERROR);
2029 retval = ms_set_rw_reg_addr(chip, OverwriteFlag,
2030 MS_EXTRA_SIZE, SystemParm, (6 + MS_EXTRA_SIZE));
2032 ms_set_err_code(chip, MS_NO_ERROR);
2034 if (CHK_MS4BIT(ms_card))
2040 data[2] = (u8)(new_blk >> 8);
2041 data[3] = (u8)new_blk;
2045 if ((extra[0] & 0x60) != 0x60)
2051 data[6 + 2] = (u8)(log_blk >> 8);
2052 data[6 + 3] = (u8)log_blk;
2054 for (j = 4; j <= MS_EXTRA_SIZE; j++)
2057 retval = ms_write_bytes(chip, WRITE_REG, (6 + MS_EXTRA_SIZE),
2058 NO_WAIT_INT, data, 16);
2059 if (retval != STATUS_SUCCESS) {
2064 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
2065 if (retval != STATUS_SUCCESS) {
2070 ms_set_err_code(chip, MS_NO_ERROR);
2071 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
2072 if (retval != STATUS_SUCCESS) {
2077 if (val & INT_REG_CMDNK) {
2078 ms_set_err_code(chip, MS_CMD_NK);
2083 if (val & INT_REG_CED) {
2084 if (val & INT_REG_ERR) {
2085 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
2092 retval = ms_set_rw_reg_addr(chip, OverwriteFlag,
2093 MS_EXTRA_SIZE, SystemParm, 7);
2094 if (retval != STATUS_SUCCESS) {
2099 ms_set_err_code(chip, MS_NO_ERROR);
2101 if (CHK_MS4BIT(ms_card))
2107 data[2] = (u8)(old_blk >> 8);
2108 data[3] = (u8)old_blk;
2114 retval = ms_write_bytes(chip, WRITE_REG, 7,
2115 NO_WAIT_INT, data, 8);
2116 if (retval != STATUS_SUCCESS) {
2121 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
2122 if (retval != STATUS_SUCCESS) {
2127 ms_set_err_code(chip, MS_NO_ERROR);
2128 retval = ms_read_bytes(chip, GET_INT, 1,
2129 NO_WAIT_INT, &val, 1);
2130 if (retval != STATUS_SUCCESS) {
2135 if (val & INT_REG_CMDNK) {
2136 ms_set_err_code(chip, MS_CMD_NK);
2141 if (val & INT_REG_CED) {
2142 if (val & INT_REG_ERR) {
2143 ms_set_err_code(chip,
2144 MS_FLASH_WRITE_ERROR);
2152 return STATUS_SUCCESS;
2156 static int reset_ms(struct rtsx_chip *chip)
2158 struct ms_info *ms_card = &(chip->ms_card);
2160 u16 i, reg_addr, block_size;
2161 u8 val, extra[MS_EXTRA_SIZE], j, *ptr;
2162 #ifndef SUPPORT_MAGIC_GATE
2166 retval = ms_prepare_reset(chip);
2167 if (retval != STATUS_SUCCESS) {
2172 ms_card->ms_type |= TYPE_MS;
2174 retval = ms_send_cmd(chip, MS_RESET, NO_WAIT_INT);
2175 if (retval != STATUS_SUCCESS) {
2180 retval = ms_read_status_reg(chip);
2181 if (retval != STATUS_SUCCESS) {
2186 retval = rtsx_read_register(chip, PPBUF_BASE2, &val);
2191 if (val & WRT_PRTCT)
2192 chip->card_wp |= MS_CARD;
2194 chip->card_wp &= ~MS_CARD;
2199 /* Search Boot Block */
2200 while (i < (MAX_DEFECTIVE_BLOCK + 2)) {
2201 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
2202 ms_set_err_code(chip, MS_NO_CARD);
2207 retval = ms_read_extra_data(chip, i, 0, extra, MS_EXTRA_SIZE);
2208 if (retval != STATUS_SUCCESS) {
2213 if (extra[0] & BLOCK_OK) {
2214 if (!(extra[1] & NOT_BOOT_BLOCK)) {
2215 ms_card->boot_block = i;
2222 if (i == (MAX_DEFECTIVE_BLOCK + 2)) {
2223 dev_dbg(rtsx_dev(chip), "No boot block found!");
2228 for (j = 0; j < 3; j++) {
2229 retval = ms_read_page(chip, ms_card->boot_block, j);
2230 if (retval != STATUS_SUCCESS) {
2231 if (ms_check_err_code(chip, MS_FLASH_WRITE_ERROR)) {
2232 i = ms_card->boot_block + 1;
2233 ms_set_err_code(chip, MS_NO_ERROR);
2239 retval = ms_read_page(chip, ms_card->boot_block, 0);
2240 if (retval != STATUS_SUCCESS) {
2245 /* Read MS system information as sys_info */
2246 rtsx_init_cmd(chip);
2248 for (i = 0; i < 96; i++)
2249 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 0x1A0 + i, 0, 0);
2251 retval = rtsx_send_cmd(chip, MS_CARD, 100);
2257 ptr = rtsx_get_cmd_data(chip);
2258 memcpy(ms_card->raw_sys_info, ptr, 96);
2260 /* Read useful block contents */
2261 rtsx_init_cmd(chip);
2263 rtsx_add_cmd(chip, READ_REG_CMD, HEADER_ID0, 0, 0);
2264 rtsx_add_cmd(chip, READ_REG_CMD, HEADER_ID1, 0, 0);
2266 for (reg_addr = DISABLED_BLOCK0; reg_addr <= DISABLED_BLOCK3;
2268 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
2270 for (reg_addr = BLOCK_SIZE_0; reg_addr <= PAGE_SIZE_1; reg_addr++)
2271 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
2273 rtsx_add_cmd(chip, READ_REG_CMD, MS_Device_Type, 0, 0);
2274 rtsx_add_cmd(chip, READ_REG_CMD, MS_4bit_Support, 0, 0);
2276 retval = rtsx_send_cmd(chip, MS_CARD, 100);
2282 ptr = rtsx_get_cmd_data(chip);
2284 dev_dbg(rtsx_dev(chip), "Boot block data:\n");
2285 dev_dbg(rtsx_dev(chip), "%*ph\n", 16, ptr);
2288 * HEADER_ID0, HEADER_ID1
2290 if (ptr[0] != 0x00 || ptr[1] != 0x01) {
2291 i = ms_card->boot_block + 1;
2296 * PAGE_SIZE_0, PAGE_SIZE_1
2298 if (ptr[12] != 0x02 || ptr[13] != 0x00) {
2299 i = ms_card->boot_block + 1;
2303 if ((ptr[14] == 1) || (ptr[14] == 3))
2304 chip->card_wp |= MS_CARD;
2306 /* BLOCK_SIZE_0, BLOCK_SIZE_1 */
2307 block_size = ((u16)ptr[6] << 8) | ptr[7];
2308 if (block_size == 0x0010) {
2309 /* Block size 16KB */
2310 ms_card->block_shift = 5;
2311 ms_card->page_off = 0x1F;
2312 } else if (block_size == 0x0008) {
2313 /* Block size 8KB */
2314 ms_card->block_shift = 4;
2315 ms_card->page_off = 0x0F;
2318 /* BLOCK_COUNT_0, BLOCK_COUNT_1 */
2319 ms_card->total_block = ((u16)ptr[8] << 8) | ptr[9];
2321 #ifdef SUPPORT_MAGIC_GATE
2324 if (ms_card->block_shift == 4) { /* 4MB or 8MB */
2325 if (j < 2) { /* Effective block for 4MB: 0x1F0 */
2326 ms_card->capacity = 0x1EE0;
2327 } else { /* Effective block for 8MB: 0x3E0 */
2328 ms_card->capacity = 0x3DE0;
2330 } else { /* 16MB, 32MB, 64MB or 128MB */
2331 if (j < 5) { /* Effective block for 16MB: 0x3E0 */
2332 ms_card->capacity = 0x7BC0;
2333 } else if (j < 0xA) { /* Effective block for 32MB: 0x7C0 */
2334 ms_card->capacity = 0xF7C0;
2335 } else if (j < 0x11) { /* Effective block for 64MB: 0xF80 */
2336 ms_card->capacity = 0x1EF80;
2337 } else { /* Effective block for 128MB: 0x1F00 */
2338 ms_card->capacity = 0x3DF00;
2342 /* EBLOCK_COUNT_0, EBLOCK_COUNT_1 */
2343 eblock_cnt = ((u16)ptr[10] << 8) | ptr[11];
2345 ms_card->capacity = ((u32)eblock_cnt - 2) << ms_card->block_shift;
2348 chip->capacity[chip->card2lun[MS_CARD]] = ms_card->capacity;
2350 /* Switch I/F Mode */
2352 retval = ms_set_rw_reg_addr(chip, 0, 0, SystemParm, 1);
2353 if (retval != STATUS_SUCCESS) {
2358 retval = rtsx_write_register(chip, PPBUF_BASE2, 0xFF, 0x88);
2363 retval = rtsx_write_register(chip, PPBUF_BASE2 + 1, 0xFF, 0);
2369 retval = ms_transfer_tpc(chip, MS_TM_WRITE_BYTES, WRITE_REG, 1,
2371 if (retval != STATUS_SUCCESS) {
2376 retval = rtsx_write_register(chip, MS_CFG,
2377 0x58 | MS_NO_CHECK_INT,
2378 MS_BUS_WIDTH_4 | PUSH_TIME_ODD | MS_NO_CHECK_INT);
2384 ms_card->ms_type |= MS_4BIT;
2387 if (CHK_MS4BIT(ms_card))
2388 chip->card_bus_width[chip->card2lun[MS_CARD]] = 4;
2390 chip->card_bus_width[chip->card2lun[MS_CARD]] = 1;
2392 return STATUS_SUCCESS;
2395 static int ms_init_l2p_tbl(struct rtsx_chip *chip)
2397 struct ms_info *ms_card = &(chip->ms_card);
2398 int size, i, seg_no, retval;
2399 u16 defect_block, reg_addr;
2402 ms_card->segment_cnt = ms_card->total_block >> 9;
2403 dev_dbg(rtsx_dev(chip), "ms_card->segment_cnt = %d\n",
2404 ms_card->segment_cnt);
2406 size = ms_card->segment_cnt * sizeof(struct zone_entry);
2407 ms_card->segment = vzalloc(size);
2408 if (ms_card->segment == NULL) {
2413 retval = ms_read_page(chip, ms_card->boot_block, 1);
2414 if (retval != STATUS_SUCCESS) {
2419 reg_addr = PPBUF_BASE2;
2420 for (i = 0; i < (((ms_card->total_block >> 9) * 10) + 1); i++) {
2423 retval = rtsx_read_register(chip, reg_addr++, &val1);
2424 if (retval != STATUS_SUCCESS) {
2429 retval = rtsx_read_register(chip, reg_addr++, &val2);
2430 if (retval != STATUS_SUCCESS) {
2435 defect_block = ((u16)val1 << 8) | val2;
2436 if (defect_block == 0xFFFF)
2439 seg_no = defect_block / 512;
2441 block_no = ms_card->segment[seg_no].disable_count++;
2442 ms_card->segment[seg_no].defect_list[block_no] = defect_block;
2445 for (i = 0; i < ms_card->segment_cnt; i++) {
2446 ms_card->segment[i].build_flag = 0;
2447 ms_card->segment[i].l2p_table = NULL;
2448 ms_card->segment[i].free_table = NULL;
2449 ms_card->segment[i].get_index = 0;
2450 ms_card->segment[i].set_index = 0;
2451 ms_card->segment[i].unused_blk_cnt = 0;
2453 dev_dbg(rtsx_dev(chip), "defective block count of segment %d is %d\n",
2454 i, ms_card->segment[i].disable_count);
2457 return STATUS_SUCCESS;
2460 if (ms_card->segment) {
2461 vfree(ms_card->segment);
2462 ms_card->segment = NULL;
2468 static u16 ms_get_l2p_tbl(struct rtsx_chip *chip, int seg_no, u16 log_off)
2470 struct ms_info *ms_card = &(chip->ms_card);
2471 struct zone_entry *segment;
2473 if (ms_card->segment == NULL)
2476 segment = &(ms_card->segment[seg_no]);
2478 if (segment->l2p_table)
2479 return segment->l2p_table[log_off];
2484 static void ms_set_l2p_tbl(struct rtsx_chip *chip,
2485 int seg_no, u16 log_off, u16 phy_blk)
2487 struct ms_info *ms_card = &(chip->ms_card);
2488 struct zone_entry *segment;
2490 if (ms_card->segment == NULL)
2493 segment = &(ms_card->segment[seg_no]);
2494 if (segment->l2p_table)
2495 segment->l2p_table[log_off] = phy_blk;
2498 static void ms_set_unused_block(struct rtsx_chip *chip, u16 phy_blk)
2500 struct ms_info *ms_card = &(chip->ms_card);
2501 struct zone_entry *segment;
2504 seg_no = (int)phy_blk >> 9;
2505 segment = &(ms_card->segment[seg_no]);
2507 segment->free_table[segment->set_index++] = phy_blk;
2508 if (segment->set_index >= MS_FREE_TABLE_CNT)
2509 segment->set_index = 0;
2511 segment->unused_blk_cnt++;
2514 static u16 ms_get_unused_block(struct rtsx_chip *chip, int seg_no)
2516 struct ms_info *ms_card = &(chip->ms_card);
2517 struct zone_entry *segment;
2520 segment = &(ms_card->segment[seg_no]);
2522 if (segment->unused_blk_cnt <= 0)
2525 phy_blk = segment->free_table[segment->get_index];
2526 segment->free_table[segment->get_index++] = 0xFFFF;
2527 if (segment->get_index >= MS_FREE_TABLE_CNT)
2528 segment->get_index = 0;
2530 segment->unused_blk_cnt--;
2535 static const unsigned short ms_start_idx[] = {0, 494, 990, 1486, 1982, 2478,
2536 2974, 3470, 3966, 4462, 4958,
2537 5454, 5950, 6446, 6942, 7438,
2540 static int ms_arbitrate_l2p(struct rtsx_chip *chip, u16 phy_blk,
2541 u16 log_off, u8 us1, u8 us2)
2543 struct ms_info *ms_card = &(chip->ms_card);
2544 struct zone_entry *segment;
2548 seg_no = (int)phy_blk >> 9;
2549 segment = &(ms_card->segment[seg_no]);
2550 tmp_blk = segment->l2p_table[log_off];
2554 if (!(chip->card_wp & MS_CARD))
2555 ms_erase_block(chip, tmp_blk);
2557 ms_set_unused_block(chip, tmp_blk);
2558 segment->l2p_table[log_off] = phy_blk;
2560 if (!(chip->card_wp & MS_CARD))
2561 ms_erase_block(chip, phy_blk);
2563 ms_set_unused_block(chip, phy_blk);
2566 if (phy_blk < tmp_blk) {
2567 if (!(chip->card_wp & MS_CARD))
2568 ms_erase_block(chip, phy_blk);
2570 ms_set_unused_block(chip, phy_blk);
2572 if (!(chip->card_wp & MS_CARD))
2573 ms_erase_block(chip, tmp_blk);
2575 ms_set_unused_block(chip, tmp_blk);
2576 segment->l2p_table[log_off] = phy_blk;
2580 return STATUS_SUCCESS;
2583 static int ms_build_l2p_tbl(struct rtsx_chip *chip, int seg_no)
2585 struct ms_info *ms_card = &(chip->ms_card);
2586 struct zone_entry *segment;
2588 int retval, table_size, disable_cnt, i;
2589 u16 start, end, phy_blk, log_blk, tmp_blk, idx;
2590 u8 extra[MS_EXTRA_SIZE], us1, us2;
2592 dev_dbg(rtsx_dev(chip), "ms_build_l2p_tbl: %d\n", seg_no);
2594 if (ms_card->segment == NULL) {
2595 retval = ms_init_l2p_tbl(chip);
2596 if (retval != STATUS_SUCCESS) {
2602 if (ms_card->segment[seg_no].build_flag) {
2603 dev_dbg(rtsx_dev(chip), "l2p table of segment %d has been built\n",
2605 return STATUS_SUCCESS;
2613 segment = &(ms_card->segment[seg_no]);
2615 if (segment->l2p_table == NULL) {
2616 segment->l2p_table = vmalloc(table_size * 2);
2617 if (segment->l2p_table == NULL) {
2622 memset((u8 *)(segment->l2p_table), 0xff, table_size * 2);
2624 if (segment->free_table == NULL) {
2625 segment->free_table = vmalloc(MS_FREE_TABLE_CNT * 2);
2626 if (segment->free_table == NULL) {
2631 memset((u8 *)(segment->free_table), 0xff, MS_FREE_TABLE_CNT * 2);
2633 start = (u16)seg_no << 9;
2634 end = (u16)(seg_no + 1) << 9;
2636 disable_cnt = segment->disable_count;
2638 segment->get_index = segment->set_index = 0;
2639 segment->unused_blk_cnt = 0;
2641 for (phy_blk = start; phy_blk < end; phy_blk++) {
2643 defect_flag = false;
2644 for (i = 0; i < segment->disable_count; i++) {
2645 if (phy_blk == segment->defect_list[i]) {
2656 retval = ms_read_extra_data(chip, phy_blk, 0,
2657 extra, MS_EXTRA_SIZE);
2658 if (retval != STATUS_SUCCESS) {
2659 dev_dbg(rtsx_dev(chip), "read extra data fail\n");
2660 ms_set_bad_block(chip, phy_blk);
2664 if (seg_no == ms_card->segment_cnt - 1) {
2665 if (!(extra[1] & NOT_TRANSLATION_TABLE)) {
2666 if (!(chip->card_wp & MS_CARD)) {
2667 retval = ms_erase_block(chip, phy_blk);
2668 if (retval != STATUS_SUCCESS)
2676 if (!(extra[0] & BLOCK_OK))
2678 if (!(extra[1] & NOT_BOOT_BLOCK))
2680 if ((extra[0] & PAGE_OK) != PAGE_OK)
2683 log_blk = ((u16)extra[2] << 8) | extra[3];
2685 if (log_blk == 0xFFFF) {
2686 if (!(chip->card_wp & MS_CARD)) {
2687 retval = ms_erase_block(chip, phy_blk);
2688 if (retval != STATUS_SUCCESS)
2691 ms_set_unused_block(chip, phy_blk);
2695 if ((log_blk < ms_start_idx[seg_no]) ||
2696 (log_blk >= ms_start_idx[seg_no+1])) {
2697 if (!(chip->card_wp & MS_CARD)) {
2698 retval = ms_erase_block(chip, phy_blk);
2699 if (retval != STATUS_SUCCESS)
2702 ms_set_unused_block(chip, phy_blk);
2706 idx = log_blk - ms_start_idx[seg_no];
2708 if (segment->l2p_table[idx] == 0xFFFF) {
2709 segment->l2p_table[idx] = phy_blk;
2713 us1 = extra[0] & 0x10;
2714 tmp_blk = segment->l2p_table[idx];
2715 retval = ms_read_extra_data(chip, tmp_blk, 0,
2716 extra, MS_EXTRA_SIZE);
2717 if (retval != STATUS_SUCCESS)
2719 us2 = extra[0] & 0x10;
2721 (void)ms_arbitrate_l2p(chip, phy_blk,
2722 log_blk-ms_start_idx[seg_no], us1, us2);
2726 segment->build_flag = 1;
2728 dev_dbg(rtsx_dev(chip), "unused block count: %d\n",
2729 segment->unused_blk_cnt);
2731 /* Logical Address Confirmation Process */
2732 if (seg_no == ms_card->segment_cnt - 1) {
2733 if (segment->unused_blk_cnt < 2)
2734 chip->card_wp |= MS_CARD;
2736 if (segment->unused_blk_cnt < 1)
2737 chip->card_wp |= MS_CARD;
2740 if (chip->card_wp & MS_CARD)
2741 return STATUS_SUCCESS;
2743 for (log_blk = ms_start_idx[seg_no];
2744 log_blk < ms_start_idx[seg_no + 1]; log_blk++) {
2745 idx = log_blk - ms_start_idx[seg_no];
2746 if (segment->l2p_table[idx] == 0xFFFF) {
2747 phy_blk = ms_get_unused_block(chip, seg_no);
2748 if (phy_blk == 0xFFFF) {
2749 chip->card_wp |= MS_CARD;
2750 return STATUS_SUCCESS;
2752 retval = ms_init_page(chip, phy_blk, log_blk, 0, 1);
2753 if (retval != STATUS_SUCCESS) {
2758 segment->l2p_table[idx] = phy_blk;
2759 if (seg_no == ms_card->segment_cnt - 1) {
2760 if (segment->unused_blk_cnt < 2) {
2761 chip->card_wp |= MS_CARD;
2762 return STATUS_SUCCESS;
2765 if (segment->unused_blk_cnt < 1) {
2766 chip->card_wp |= MS_CARD;
2767 return STATUS_SUCCESS;
2773 /* Make boot block be the first normal block */
2775 for (log_blk = 0; log_blk < 494; log_blk++) {
2776 tmp_blk = segment->l2p_table[log_blk];
2777 if (tmp_blk < ms_card->boot_block) {
2778 dev_dbg(rtsx_dev(chip), "Boot block is not the first normal block.\n");
2780 if (chip->card_wp & MS_CARD)
2783 phy_blk = ms_get_unused_block(chip, 0);
2784 retval = ms_copy_page(chip, tmp_blk, phy_blk,
2785 log_blk, 0, ms_card->page_off + 1);
2786 if (retval != STATUS_SUCCESS) {
2791 segment->l2p_table[log_blk] = phy_blk;
2793 retval = ms_set_bad_block(chip, tmp_blk);
2794 if (retval != STATUS_SUCCESS) {
2802 return STATUS_SUCCESS;
2805 segment->build_flag = 0;
2806 if (segment->l2p_table) {
2807 vfree(segment->l2p_table);
2808 segment->l2p_table = NULL;
2810 if (segment->free_table) {
2811 vfree(segment->free_table);
2812 segment->free_table = NULL;
2819 int reset_ms_card(struct rtsx_chip *chip)
2821 struct ms_info *ms_card = &(chip->ms_card);
2824 memset(ms_card, 0, sizeof(struct ms_info));
2826 retval = enable_card_clock(chip, MS_CARD);
2827 if (retval != STATUS_SUCCESS) {
2832 retval = select_card(chip, MS_CARD);
2833 if (retval != STATUS_SUCCESS) {
2838 ms_card->ms_type = 0;
2840 retval = reset_ms_pro(chip);
2841 if (retval != STATUS_SUCCESS) {
2842 if (ms_card->check_ms_flow) {
2843 retval = reset_ms(chip);
2844 if (retval != STATUS_SUCCESS) {
2854 retval = ms_set_init_para(chip);
2855 if (retval != STATUS_SUCCESS) {
2860 if (!CHK_MSPRO(ms_card)) {
2861 /* Build table for the last segment,
2862 * to check if L2P table block exists, erasing it
2864 retval = ms_build_l2p_tbl(chip, ms_card->total_block / 512 - 1);
2865 if (retval != STATUS_SUCCESS) {
2871 dev_dbg(rtsx_dev(chip), "ms_card->ms_type = 0x%x\n", ms_card->ms_type);
2873 return STATUS_SUCCESS;
2876 static int mspro_set_rw_cmd(struct rtsx_chip *chip,
2877 u32 start_sec, u16 sec_cnt, u8 cmd)
2883 data[1] = (u8)(sec_cnt >> 8);
2884 data[2] = (u8)sec_cnt;
2885 data[3] = (u8)(start_sec >> 24);
2886 data[4] = (u8)(start_sec >> 16);
2887 data[5] = (u8)(start_sec >> 8);
2888 data[6] = (u8)start_sec;
2891 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
2892 retval = ms_write_bytes(chip, PRO_EX_SET_CMD, 7,
2894 if (retval == STATUS_SUCCESS)
2897 if (i == MS_MAX_RETRY_COUNT) {
2902 return STATUS_SUCCESS;
2906 void mspro_stop_seq_mode(struct rtsx_chip *chip)
2908 struct ms_info *ms_card = &(chip->ms_card);
2911 if (ms_card->seq_mode) {
2912 retval = ms_switch_clock(chip);
2913 if (retval != STATUS_SUCCESS)
2916 ms_card->seq_mode = 0;
2917 ms_card->total_sec_cnt = 0;
2918 ms_send_cmd(chip, PRO_STOP, WAIT_INT);
2920 rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
2924 static inline int ms_auto_tune_clock(struct rtsx_chip *chip)
2926 struct ms_info *ms_card = &(chip->ms_card);
2929 if (chip->asic_code) {
2930 if (ms_card->ms_clock > 30)
2931 ms_card->ms_clock -= 20;
2933 if (ms_card->ms_clock == CLK_80)
2934 ms_card->ms_clock = CLK_60;
2935 else if (ms_card->ms_clock == CLK_60)
2936 ms_card->ms_clock = CLK_40;
2939 retval = ms_switch_clock(chip);
2940 if (retval != STATUS_SUCCESS) {
2945 return STATUS_SUCCESS;
2948 static int mspro_rw_multi_sector(struct scsi_cmnd *srb,
2949 struct rtsx_chip *chip, u32 start_sector,
2952 struct ms_info *ms_card = &(chip->ms_card);
2953 bool mode_2k = false;
2956 u8 val, trans_mode, rw_tpc, rw_cmd;
2958 ms_set_err_code(chip, MS_NO_ERROR);
2960 ms_card->cleanup_counter = 0;
2962 if (CHK_MSHG(ms_card)) {
2963 if ((start_sector % 4) || (sector_cnt % 4)) {
2964 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2965 rw_tpc = PRO_READ_LONG_DATA;
2966 rw_cmd = PRO_READ_DATA;
2968 rw_tpc = PRO_WRITE_LONG_DATA;
2969 rw_cmd = PRO_WRITE_DATA;
2972 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2973 rw_tpc = PRO_READ_QUAD_DATA;
2974 rw_cmd = PRO_READ_2K_DATA;
2976 rw_tpc = PRO_WRITE_QUAD_DATA;
2977 rw_cmd = PRO_WRITE_2K_DATA;
2982 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2983 rw_tpc = PRO_READ_LONG_DATA;
2984 rw_cmd = PRO_READ_DATA;
2986 rw_tpc = PRO_WRITE_LONG_DATA;
2987 rw_cmd = PRO_WRITE_DATA;
2991 retval = ms_switch_clock(chip);
2992 if (retval != STATUS_SUCCESS) {
2997 if (srb->sc_data_direction == DMA_FROM_DEVICE)
2998 trans_mode = MS_TM_AUTO_READ;
3000 trans_mode = MS_TM_AUTO_WRITE;
3002 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
3008 if (ms_card->seq_mode) {
3009 if ((ms_card->pre_dir != srb->sc_data_direction)
3010 || ((ms_card->pre_sec_addr + ms_card->pre_sec_cnt) != start_sector)
3011 || (mode_2k && (ms_card->seq_mode & MODE_512_SEQ))
3012 || (!mode_2k && (ms_card->seq_mode & MODE_2K_SEQ))
3013 || !(val & MS_INT_BREQ)
3014 || ((ms_card->total_sec_cnt + sector_cnt) > 0xFE00)) {
3015 ms_card->seq_mode = 0;
3016 ms_card->total_sec_cnt = 0;
3017 if (val & MS_INT_BREQ) {
3018 retval = ms_send_cmd(chip, PRO_STOP, WAIT_INT);
3019 if (retval != STATUS_SUCCESS) {
3024 rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
3029 if (!ms_card->seq_mode) {
3030 ms_card->total_sec_cnt = 0;
3031 if (sector_cnt >= SEQ_START_CRITERIA) {
3032 if ((ms_card->capacity - start_sector) > 0xFE00)
3035 count = (u16)(ms_card->capacity - start_sector);
3037 if (count > sector_cnt) {
3039 ms_card->seq_mode = MODE_2K_SEQ;
3041 ms_card->seq_mode = MODE_512_SEQ;
3046 retval = mspro_set_rw_cmd(chip, start_sector, count, rw_cmd);
3047 if (retval != STATUS_SUCCESS) {
3048 ms_card->seq_mode = 0;
3054 retval = ms_transfer_data(chip, trans_mode, rw_tpc, sector_cnt,
3055 WAIT_INT, mode_2k, scsi_sg_count(srb),
3056 scsi_sglist(srb), scsi_bufflen(srb));
3057 if (retval != STATUS_SUCCESS) {
3058 ms_card->seq_mode = 0;
3059 rtsx_read_register(chip, MS_TRANS_CFG, &val);
3060 rtsx_clear_ms_error(chip);
3062 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3063 chip->rw_need_retry = 0;
3064 dev_dbg(rtsx_dev(chip), "No card exist, exit mspro_rw_multi_sector\n");
3069 if (val & MS_INT_BREQ)
3070 ms_send_cmd(chip, PRO_STOP, WAIT_INT);
3072 if (val & (MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
3073 dev_dbg(rtsx_dev(chip), "MSPro CRC error, tune clock!\n");
3074 chip->rw_need_retry = 1;
3075 ms_auto_tune_clock(chip);
3082 if (ms_card->seq_mode) {
3083 ms_card->pre_sec_addr = start_sector;
3084 ms_card->pre_sec_cnt = sector_cnt;
3085 ms_card->pre_dir = srb->sc_data_direction;
3086 ms_card->total_sec_cnt += sector_cnt;
3089 return STATUS_SUCCESS;
3092 static int mspro_read_format_progress(struct rtsx_chip *chip,
3093 const int short_data_len)
3095 struct ms_info *ms_card = &(chip->ms_card);
3097 u32 total_progress, cur_progress;
3101 dev_dbg(rtsx_dev(chip), "mspro_read_format_progress, short_data_len = %d\n",
3104 retval = ms_switch_clock(chip);
3105 if (retval != STATUS_SUCCESS) {
3106 ms_card->format_status = FORMAT_FAIL;
3111 retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
3112 if (retval != STATUS_SUCCESS) {
3113 ms_card->format_status = FORMAT_FAIL;
3118 if (!(tmp & MS_INT_BREQ)) {
3119 if ((tmp & (MS_INT_CED | MS_INT_BREQ | MS_INT_CMDNK | MS_INT_ERR)) == MS_INT_CED) {
3120 ms_card->format_status = FORMAT_SUCCESS;
3121 return STATUS_SUCCESS;
3123 ms_card->format_status = FORMAT_FAIL;
3128 if (short_data_len >= 256)
3131 cnt = (u8)short_data_len;
3133 retval = rtsx_write_register(chip, MS_CFG, MS_NO_CHECK_INT,
3135 if (retval != STATUS_SUCCESS) {
3136 ms_card->format_status = FORMAT_FAIL;
3141 retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, cnt, WAIT_INT,
3143 if (retval != STATUS_SUCCESS) {
3144 ms_card->format_status = FORMAT_FAIL;
3149 total_progress = (data[0] << 24) | (data[1] << 16) |
3150 (data[2] << 8) | data[3];
3151 cur_progress = (data[4] << 24) | (data[5] << 16) |
3152 (data[6] << 8) | data[7];
3154 dev_dbg(rtsx_dev(chip), "total_progress = %d, cur_progress = %d\n",
3155 total_progress, cur_progress);
3157 if (total_progress == 0) {
3158 ms_card->progress = 0;
3160 u64 ulltmp = (u64)cur_progress * (u64)65535;
3162 do_div(ulltmp, total_progress);
3163 ms_card->progress = (u16)ulltmp;
3165 dev_dbg(rtsx_dev(chip), "progress = %d\n", ms_card->progress);
3167 for (i = 0; i < 5000; i++) {
3168 retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
3169 if (retval != STATUS_SUCCESS) {
3170 ms_card->format_status = FORMAT_FAIL;
3174 if (tmp & (MS_INT_CED | MS_INT_CMDNK |
3175 MS_INT_BREQ | MS_INT_ERR))
3181 retval = rtsx_write_register(chip, MS_CFG, MS_NO_CHECK_INT, 0);
3182 if (retval != STATUS_SUCCESS) {
3183 ms_card->format_status = FORMAT_FAIL;
3189 ms_card->format_status = FORMAT_FAIL;
3194 if (tmp & (MS_INT_CMDNK | MS_INT_ERR)) {
3195 ms_card->format_status = FORMAT_FAIL;
3200 if (tmp & MS_INT_CED) {
3201 ms_card->format_status = FORMAT_SUCCESS;
3202 ms_card->pro_under_formatting = 0;
3203 } else if (tmp & MS_INT_BREQ) {
3204 ms_card->format_status = FORMAT_IN_PROGRESS;
3206 ms_card->format_status = FORMAT_FAIL;
3207 ms_card->pro_under_formatting = 0;
3212 return STATUS_SUCCESS;
3215 void mspro_polling_format_status(struct rtsx_chip *chip)
3217 struct ms_info *ms_card = &(chip->ms_card);
3220 if (ms_card->pro_under_formatting &&
3221 (rtsx_get_stat(chip) != RTSX_STAT_SS)) {
3222 rtsx_set_stat(chip, RTSX_STAT_RUN);
3224 for (i = 0; i < 65535; i++) {
3225 mspro_read_format_progress(chip, MS_SHORT_DATA_LEN);
3226 if (ms_card->format_status != FORMAT_IN_PROGRESS)
3232 int mspro_format(struct scsi_cmnd *srb, struct rtsx_chip *chip,
3233 int short_data_len, bool quick_format)
3235 struct ms_info *ms_card = &(chip->ms_card);
3240 retval = ms_switch_clock(chip);
3241 if (retval != STATUS_SUCCESS) {
3246 retval = ms_set_rw_reg_addr(chip, 0x00, 0x00, Pro_TPCParm, 0x01);
3247 if (retval != STATUS_SUCCESS) {
3253 switch (short_data_len) {
3269 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3270 retval = ms_write_bytes(chip, PRO_WRITE_REG, 1,
3271 NO_WAIT_INT, buf, 2);
3272 if (retval == STATUS_SUCCESS)
3275 if (i == MS_MAX_RETRY_COUNT) {
3285 retval = mspro_set_rw_cmd(chip, 0, para, PRO_FORMAT);
3286 if (retval != STATUS_SUCCESS) {
3291 retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
3297 if (tmp & (MS_INT_CMDNK | MS_INT_ERR)) {
3302 if ((tmp & (MS_INT_BREQ | MS_INT_CED)) == MS_INT_BREQ) {
3303 ms_card->pro_under_formatting = 1;
3304 ms_card->progress = 0;
3305 ms_card->format_status = FORMAT_IN_PROGRESS;
3306 return STATUS_SUCCESS;
3309 if (tmp & MS_INT_CED) {
3310 ms_card->pro_under_formatting = 0;
3311 ms_card->progress = 0;
3312 ms_card->format_status = FORMAT_SUCCESS;
3313 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_NO_SENSE);
3314 return STATUS_SUCCESS;
3322 static int ms_read_multiple_pages(struct rtsx_chip *chip, u16 phy_blk,
3323 u16 log_blk, u8 start_page, u8 end_page,
3324 u8 *buf, unsigned int *index,
3325 unsigned int *offset)
3327 struct ms_info *ms_card = &(chip->ms_card);
3329 u8 extra[MS_EXTRA_SIZE], page_addr, val, trans_cfg, data[6];
3332 retval = ms_read_extra_data(chip, phy_blk, start_page,
3333 extra, MS_EXTRA_SIZE);
3334 if (retval == STATUS_SUCCESS) {
3335 if ((extra[1] & 0x30) != 0x30) {
3336 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
3342 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
3344 if (retval != STATUS_SUCCESS) {
3349 if (CHK_MS4BIT(ms_card))
3355 data[2] = (u8)(phy_blk >> 8);
3356 data[3] = (u8)phy_blk;
3358 data[5] = start_page;
3360 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3361 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT,
3363 if (retval == STATUS_SUCCESS)
3366 if (i == MS_MAX_RETRY_COUNT) {
3371 ms_set_err_code(chip, MS_NO_ERROR);
3373 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
3374 if (retval != STATUS_SUCCESS) {
3381 for (page_addr = start_page; page_addr < end_page; page_addr++) {
3382 ms_set_err_code(chip, MS_NO_ERROR);
3384 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3385 ms_set_err_code(chip, MS_NO_CARD);
3390 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
3391 if (retval != STATUS_SUCCESS) {
3396 if (val & INT_REG_CMDNK) {
3397 ms_set_err_code(chip, MS_CMD_NK);
3401 if (val & INT_REG_ERR) {
3402 if (val & INT_REG_BREQ) {
3403 retval = ms_read_status_reg(chip);
3404 if (retval != STATUS_SUCCESS) {
3405 if (!(chip->card_wp & MS_CARD)) {
3407 ms_set_page_status(log_blk, setPS_NG, extra, MS_EXTRA_SIZE);
3408 ms_write_extra_data(chip, phy_blk,
3409 page_addr, extra, MS_EXTRA_SIZE);
3411 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
3416 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
3421 if (!(val & INT_REG_BREQ)) {
3422 ms_set_err_code(chip, MS_BREQ_ERROR);
3428 if (page_addr == (end_page - 1)) {
3429 if (!(val & INT_REG_CED)) {
3430 retval = ms_send_cmd(chip, BLOCK_END, WAIT_INT);
3431 if (retval != STATUS_SUCCESS) {
3437 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT,
3439 if (retval != STATUS_SUCCESS) {
3444 if (!(val & INT_REG_CED)) {
3445 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
3450 trans_cfg = NO_WAIT_INT;
3452 trans_cfg = WAIT_INT;
3455 rtsx_init_cmd(chip);
3457 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, READ_PAGE_DATA);
3458 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG,
3460 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
3463 trans_dma_enable(DMA_FROM_DEVICE, chip, 512, DMA_512);
3465 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
3466 MS_TRANSFER_START | MS_TM_NORMAL_READ);
3467 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
3468 MS_TRANSFER_END, MS_TRANSFER_END);
3470 rtsx_send_cmd_no_wait(chip);
3472 retval = rtsx_transfer_data_partial(chip, MS_CARD, ptr,
3473 512, scsi_sg_count(chip->srb),
3474 index, offset, DMA_FROM_DEVICE,
3477 if (retval == -ETIMEDOUT) {
3478 ms_set_err_code(chip, MS_TO_ERROR);
3479 rtsx_clear_ms_error(chip);
3481 return STATUS_TIMEDOUT;
3484 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
3485 if (retval != STATUS_SUCCESS) {
3486 ms_set_err_code(chip, MS_TO_ERROR);
3487 rtsx_clear_ms_error(chip);
3489 return STATUS_TIMEDOUT;
3491 if (val & (MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
3492 ms_set_err_code(chip, MS_CRC16_ERROR);
3493 rtsx_clear_ms_error(chip);
3499 if (scsi_sg_count(chip->srb) == 0)
3503 return STATUS_SUCCESS;
3506 static int ms_write_multiple_pages(struct rtsx_chip *chip, u16 old_blk,
3507 u16 new_blk, u16 log_blk, u8 start_page,
3508 u8 end_page, u8 *buf, unsigned int *index,
3509 unsigned int *offset)
3511 struct ms_info *ms_card = &(chip->ms_card);
3513 u8 page_addr, val, data[16];
3517 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
3519 if (retval != STATUS_SUCCESS) {
3524 if (CHK_MS4BIT(ms_card))
3530 data[2] = (u8)(old_blk >> 8);
3531 data[3] = (u8)old_blk;
3537 retval = ms_write_bytes(chip, WRITE_REG, 7, NO_WAIT_INT,
3539 if (retval != STATUS_SUCCESS) {
3544 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
3545 if (retval != STATUS_SUCCESS) {
3550 ms_set_err_code(chip, MS_NO_ERROR);
3551 retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, GET_INT, 1,
3553 if (retval != STATUS_SUCCESS) {
3559 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
3560 SystemParm, (6 + MS_EXTRA_SIZE));
3561 if (retval != STATUS_SUCCESS) {
3566 ms_set_err_code(chip, MS_NO_ERROR);
3568 if (CHK_MS4BIT(ms_card))
3574 data[2] = (u8)(new_blk >> 8);
3575 data[3] = (u8)new_blk;
3576 if ((end_page - start_page) == 1)
3581 data[5] = start_page;
3584 data[8] = (u8)(log_blk >> 8);
3585 data[9] = (u8)log_blk;
3587 for (i = 0x0A; i < 0x10; i++)
3590 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3591 retval = ms_write_bytes(chip, WRITE_REG, 6 + MS_EXTRA_SIZE,
3592 NO_WAIT_INT, data, 16);
3593 if (retval == STATUS_SUCCESS)
3596 if (i == MS_MAX_RETRY_COUNT) {
3601 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3602 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
3603 if (retval == STATUS_SUCCESS)
3606 if (i == MS_MAX_RETRY_COUNT) {
3611 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
3612 if (retval != STATUS_SUCCESS) {
3618 for (page_addr = start_page; page_addr < end_page; page_addr++) {
3619 ms_set_err_code(chip, MS_NO_ERROR);
3621 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3622 ms_set_err_code(chip, MS_NO_CARD);
3627 if (val & INT_REG_CMDNK) {
3628 ms_set_err_code(chip, MS_CMD_NK);
3632 if (val & INT_REG_ERR) {
3633 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
3637 if (!(val & INT_REG_BREQ)) {
3638 ms_set_err_code(chip, MS_BREQ_ERROR);
3645 rtsx_init_cmd(chip);
3647 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC,
3648 0xFF, WRITE_PAGE_DATA);
3649 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG,
3651 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
3654 trans_dma_enable(DMA_TO_DEVICE, chip, 512, DMA_512);
3656 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
3657 MS_TRANSFER_START | MS_TM_NORMAL_WRITE);
3658 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
3659 MS_TRANSFER_END, MS_TRANSFER_END);
3661 rtsx_send_cmd_no_wait(chip);
3663 retval = rtsx_transfer_data_partial(chip, MS_CARD, ptr,
3664 512, scsi_sg_count(chip->srb),
3665 index, offset, DMA_TO_DEVICE,
3668 ms_set_err_code(chip, MS_TO_ERROR);
3669 rtsx_clear_ms_error(chip);
3671 if (retval == -ETIMEDOUT) {
3673 return STATUS_TIMEDOUT;
3679 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
3680 if (retval != STATUS_SUCCESS) {
3685 if ((end_page - start_page) == 1) {
3686 if (!(val & INT_REG_CED)) {
3687 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
3692 if (page_addr == (end_page - 1)) {
3693 if (!(val & INT_REG_CED)) {
3694 retval = ms_send_cmd(chip, BLOCK_END,
3696 if (retval != STATUS_SUCCESS) {
3702 retval = ms_read_bytes(chip, GET_INT, 1,
3703 NO_WAIT_INT, &val, 1);
3704 if (retval != STATUS_SUCCESS) {
3710 if ((page_addr == (end_page - 1)) ||
3711 (page_addr == ms_card->page_off)) {
3712 if (!(val & INT_REG_CED)) {
3713 ms_set_err_code(chip,
3714 MS_FLASH_WRITE_ERROR);
3721 if (scsi_sg_count(chip->srb) == 0)
3725 return STATUS_SUCCESS;
3729 static int ms_finish_write(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
3730 u16 log_blk, u8 page_off)
3732 struct ms_info *ms_card = &(chip->ms_card);
3735 retval = ms_copy_page(chip, old_blk, new_blk, log_blk,
3736 page_off, ms_card->page_off + 1);
3737 if (retval != STATUS_SUCCESS) {
3742 seg_no = old_blk >> 9;
3744 if (MS_TST_BAD_BLOCK_FLG(ms_card)) {
3745 MS_CLR_BAD_BLOCK_FLG(ms_card);
3746 ms_set_bad_block(chip, old_blk);
3748 retval = ms_erase_block(chip, old_blk);
3749 if (retval == STATUS_SUCCESS)
3750 ms_set_unused_block(chip, old_blk);
3753 ms_set_l2p_tbl(chip, seg_no, log_blk - ms_start_idx[seg_no], new_blk);
3755 return STATUS_SUCCESS;
3758 static int ms_prepare_write(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
3759 u16 log_blk, u8 start_page)
3764 retval = ms_copy_page(chip, old_blk, new_blk, log_blk,
3766 if (retval != STATUS_SUCCESS) {
3772 return STATUS_SUCCESS;
3775 #ifdef MS_DELAY_WRITE
3776 int ms_delay_write(struct rtsx_chip *chip)
3778 struct ms_info *ms_card = &(chip->ms_card);
3779 struct ms_delay_write_tag *delay_write = &(ms_card->delay_write);
3782 if (delay_write->delay_write_flag) {
3783 retval = ms_set_init_para(chip);
3784 if (retval != STATUS_SUCCESS) {
3789 delay_write->delay_write_flag = 0;
3790 retval = ms_finish_write(chip,
3791 delay_write->old_phyblock,
3792 delay_write->new_phyblock,
3793 delay_write->logblock,
3794 delay_write->pageoff);
3795 if (retval != STATUS_SUCCESS) {
3801 return STATUS_SUCCESS;
3805 static inline void ms_rw_fail(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3807 if (srb->sc_data_direction == DMA_FROM_DEVICE)
3808 set_sense_type(chip, SCSI_LUN(srb),
3809 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3811 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR);
3814 static int ms_rw_multi_sector(struct scsi_cmnd *srb, struct rtsx_chip *chip,
3815 u32 start_sector, u16 sector_cnt)
3817 struct ms_info *ms_card = &(chip->ms_card);
3818 unsigned int lun = SCSI_LUN(srb);
3820 unsigned int index = 0, offset = 0;
3821 u16 old_blk = 0, new_blk = 0, log_blk, total_sec_cnt = sector_cnt;
3822 u8 start_page, end_page = 0, page_cnt;
3824 #ifdef MS_DELAY_WRITE
3825 struct ms_delay_write_tag *delay_write = &(ms_card->delay_write);
3828 ms_set_err_code(chip, MS_NO_ERROR);
3830 ms_card->cleanup_counter = 0;
3832 ptr = (u8 *)scsi_sglist(srb);
3834 retval = ms_switch_clock(chip);
3835 if (retval != STATUS_SUCCESS) {
3836 ms_rw_fail(srb, chip);
3841 log_blk = (u16)(start_sector >> ms_card->block_shift);
3842 start_page = (u8)(start_sector & ms_card->page_off);
3844 for (seg_no = 0; seg_no < ARRAY_SIZE(ms_start_idx) - 1; seg_no++) {
3845 if (log_blk < ms_start_idx[seg_no+1])
3849 if (ms_card->segment[seg_no].build_flag == 0) {
3850 retval = ms_build_l2p_tbl(chip, seg_no);
3851 if (retval != STATUS_SUCCESS) {
3852 chip->card_fail |= MS_CARD;
3853 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
3859 if (srb->sc_data_direction == DMA_TO_DEVICE) {
3860 #ifdef MS_DELAY_WRITE
3861 if (delay_write->delay_write_flag &&
3862 (delay_write->logblock == log_blk) &&
3863 (start_page > delay_write->pageoff)) {
3864 delay_write->delay_write_flag = 0;
3865 retval = ms_copy_page(chip,
3866 delay_write->old_phyblock,
3867 delay_write->new_phyblock, log_blk,
3868 delay_write->pageoff, start_page);
3869 if (retval != STATUS_SUCCESS) {
3870 set_sense_type(chip, lun,
3871 SENSE_TYPE_MEDIA_WRITE_ERR);
3875 old_blk = delay_write->old_phyblock;
3876 new_blk = delay_write->new_phyblock;
3877 } else if (delay_write->delay_write_flag &&
3878 (delay_write->logblock == log_blk) &&
3879 (start_page == delay_write->pageoff)) {
3880 delay_write->delay_write_flag = 0;
3881 old_blk = delay_write->old_phyblock;
3882 new_blk = delay_write->new_phyblock;
3884 retval = ms_delay_write(chip);
3885 if (retval != STATUS_SUCCESS) {
3886 set_sense_type(chip, lun,
3887 SENSE_TYPE_MEDIA_WRITE_ERR);
3892 old_blk = ms_get_l2p_tbl(chip, seg_no,
3893 log_blk - ms_start_idx[seg_no]);
3894 new_blk = ms_get_unused_block(chip, seg_no);
3895 if ((old_blk == 0xFFFF) || (new_blk == 0xFFFF)) {
3896 set_sense_type(chip, lun,
3897 SENSE_TYPE_MEDIA_WRITE_ERR);
3902 retval = ms_prepare_write(chip, old_blk, new_blk,
3903 log_blk, start_page);
3904 if (retval != STATUS_SUCCESS) {
3905 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3906 set_sense_type(chip, lun,
3907 SENSE_TYPE_MEDIA_NOT_PRESENT);
3911 set_sense_type(chip, lun,
3912 SENSE_TYPE_MEDIA_WRITE_ERR);
3916 #ifdef MS_DELAY_WRITE
3920 #ifdef MS_DELAY_WRITE
3921 retval = ms_delay_write(chip);
3922 if (retval != STATUS_SUCCESS) {
3923 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3924 set_sense_type(chip, lun,
3925 SENSE_TYPE_MEDIA_NOT_PRESENT);
3929 set_sense_type(chip, lun,
3930 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3935 old_blk = ms_get_l2p_tbl(chip, seg_no,
3936 log_blk - ms_start_idx[seg_no]);
3937 if (old_blk == 0xFFFF) {
3938 set_sense_type(chip, lun,
3939 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3945 dev_dbg(rtsx_dev(chip), "seg_no = %d, old_blk = 0x%x, new_blk = 0x%x\n",
3946 seg_no, old_blk, new_blk);
3948 while (total_sec_cnt) {
3949 if ((start_page + total_sec_cnt) > (ms_card->page_off + 1))
3950 end_page = ms_card->page_off + 1;
3952 end_page = start_page + (u8)total_sec_cnt;
3954 page_cnt = end_page - start_page;
3956 dev_dbg(rtsx_dev(chip), "start_page = %d, end_page = %d, page_cnt = %d\n",
3957 start_page, end_page, page_cnt);
3959 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
3960 retval = ms_read_multiple_pages(chip,
3961 old_blk, log_blk, start_page, end_page,
3962 ptr, &index, &offset);
3964 retval = ms_write_multiple_pages(chip, old_blk,
3965 new_blk, log_blk, start_page, end_page,
3966 ptr, &index, &offset);
3969 if (retval != STATUS_SUCCESS) {
3970 toggle_gpio(chip, 1);
3971 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3972 set_sense_type(chip, lun,
3973 SENSE_TYPE_MEDIA_NOT_PRESENT);
3977 ms_rw_fail(srb, chip);
3982 if (srb->sc_data_direction == DMA_TO_DEVICE) {
3983 if (end_page == (ms_card->page_off + 1)) {
3984 retval = ms_erase_block(chip, old_blk);
3985 if (retval == STATUS_SUCCESS)
3986 ms_set_unused_block(chip, old_blk);
3988 ms_set_l2p_tbl(chip, seg_no,
3989 log_blk - ms_start_idx[seg_no],
3994 total_sec_cnt -= page_cnt;
3995 if (scsi_sg_count(srb) == 0)
3996 ptr += page_cnt * 512;
3998 if (total_sec_cnt == 0)
4003 for (seg_no = 0; seg_no < ARRAY_SIZE(ms_start_idx) - 1;
4005 if (log_blk < ms_start_idx[seg_no+1])
4009 if (ms_card->segment[seg_no].build_flag == 0) {
4010 retval = ms_build_l2p_tbl(chip, seg_no);
4011 if (retval != STATUS_SUCCESS) {
4012 chip->card_fail |= MS_CARD;
4013 set_sense_type(chip, lun,
4014 SENSE_TYPE_MEDIA_NOT_PRESENT);
4020 old_blk = ms_get_l2p_tbl(chip, seg_no,
4021 log_blk - ms_start_idx[seg_no]);
4022 if (old_blk == 0xFFFF) {
4023 ms_rw_fail(srb, chip);
4028 if (srb->sc_data_direction == DMA_TO_DEVICE) {
4029 new_blk = ms_get_unused_block(chip, seg_no);
4030 if (new_blk == 0xFFFF) {
4031 ms_rw_fail(srb, chip);
4037 dev_dbg(rtsx_dev(chip), "seg_no = %d, old_blk = 0x%x, new_blk = 0x%x\n",
4038 seg_no, old_blk, new_blk);
4043 if (srb->sc_data_direction == DMA_TO_DEVICE) {
4044 if (end_page < (ms_card->page_off + 1)) {
4045 #ifdef MS_DELAY_WRITE
4046 delay_write->delay_write_flag = 1;
4047 delay_write->old_phyblock = old_blk;
4048 delay_write->new_phyblock = new_blk;
4049 delay_write->logblock = log_blk;
4050 delay_write->pageoff = end_page;
4052 retval = ms_finish_write(chip, old_blk, new_blk,
4054 if (retval != STATUS_SUCCESS) {
4055 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
4056 set_sense_type(chip, lun,
4057 SENSE_TYPE_MEDIA_NOT_PRESENT);
4062 ms_rw_fail(srb, chip);
4070 scsi_set_resid(srb, 0);
4072 return STATUS_SUCCESS;
4075 int ms_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip,
4076 u32 start_sector, u16 sector_cnt)
4078 struct ms_info *ms_card = &(chip->ms_card);
4081 if (CHK_MSPRO(ms_card))
4082 retval = mspro_rw_multi_sector(srb, chip, start_sector,
4085 retval = ms_rw_multi_sector(srb, chip, start_sector,
4092 void ms_free_l2p_tbl(struct rtsx_chip *chip)
4094 struct ms_info *ms_card = &(chip->ms_card);
4097 if (ms_card->segment != NULL) {
4098 for (i = 0; i < ms_card->segment_cnt; i++) {
4099 if (ms_card->segment[i].l2p_table != NULL) {
4100 vfree(ms_card->segment[i].l2p_table);
4101 ms_card->segment[i].l2p_table = NULL;
4103 if (ms_card->segment[i].free_table != NULL) {
4104 vfree(ms_card->segment[i].free_table);
4105 ms_card->segment[i].free_table = NULL;
4108 vfree(ms_card->segment);
4109 ms_card->segment = NULL;
4113 #ifdef SUPPORT_MAGIC_GATE
4115 #ifdef READ_BYTES_WAIT_INT
4116 static int ms_poll_int(struct rtsx_chip *chip)
4121 rtsx_init_cmd(chip);
4123 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANS_CFG, MS_INT_CED, MS_INT_CED);
4125 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
4126 if (retval != STATUS_SUCCESS) {
4131 val = *rtsx_get_cmd_data(chip);
4132 if (val & MS_INT_ERR) {
4137 return STATUS_SUCCESS;
4141 #ifdef MS_SAMPLE_INT_ERR
4142 static int check_ms_err(struct rtsx_chip *chip)
4147 retval = rtsx_read_register(chip, MS_TRANSFER, &val);
4148 if (retval != STATUS_SUCCESS)
4150 if (val & MS_TRANSFER_ERR)
4153 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
4154 if (retval != STATUS_SUCCESS)
4157 if (val & (MS_INT_ERR | MS_INT_CMDNK))
4163 static int check_ms_err(struct rtsx_chip *chip)
4168 retval = rtsx_read_register(chip, MS_TRANSFER, &val);
4169 if (retval != STATUS_SUCCESS)
4171 if (val & MS_TRANSFER_ERR)
4178 static int mg_send_ex_cmd(struct rtsx_chip *chip, u8 cmd, u8 entry_num)
4189 data[6] = entry_num;
4192 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
4193 retval = ms_write_bytes(chip, PRO_EX_SET_CMD, 7, WAIT_INT,
4195 if (retval == STATUS_SUCCESS)
4198 if (i == MS_MAX_RETRY_COUNT) {
4203 if (check_ms_err(chip)) {
4204 rtsx_clear_ms_error(chip);
4209 return STATUS_SUCCESS;
4212 static int mg_set_tpc_para_sub(struct rtsx_chip *chip, int type,
4219 retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_TPCParm, 1);
4221 retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_DataCount1, 6);
4223 if (retval != STATUS_SUCCESS) {
4234 buf[5] = mg_entry_num;
4236 retval = ms_write_bytes(chip, PRO_WRITE_REG, (type == 0) ? 1 : 6,
4237 NO_WAIT_INT, buf, 6);
4238 if (retval != STATUS_SUCCESS) {
4243 return STATUS_SUCCESS;
4246 int mg_set_leaf_id(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4250 unsigned int lun = SCSI_LUN(srb);
4251 u8 buf1[32], buf2[12];
4253 if (scsi_bufflen(srb) < 12) {
4254 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
4259 ms_cleanup_work(chip);
4261 retval = ms_switch_clock(chip);
4262 if (retval != STATUS_SUCCESS) {
4267 retval = mg_send_ex_cmd(chip, MG_SET_LID, 0);
4268 if (retval != STATUS_SUCCESS) {
4269 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4274 memset(buf1, 0, 32);
4275 rtsx_stor_get_xfer_buf(buf2, min_t(int, 12, scsi_bufflen(srb)), srb);
4276 for (i = 0; i < 8; i++)
4277 buf1[8+i] = buf2[4+i];
4279 retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, 32, WAIT_INT,
4281 if (retval != STATUS_SUCCESS) {
4282 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4286 if (check_ms_err(chip)) {
4287 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4288 rtsx_clear_ms_error(chip);
4293 return STATUS_SUCCESS;
4296 int mg_get_local_EKB(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4298 int retval = STATUS_FAIL;
4300 unsigned int lun = SCSI_LUN(srb);
4303 ms_cleanup_work(chip);
4305 retval = ms_switch_clock(chip);
4306 if (retval != STATUS_SUCCESS) {
4311 buf = kmalloc(1540, GFP_KERNEL);
4314 return STATUS_ERROR;
4322 retval = mg_send_ex_cmd(chip, MG_GET_LEKB, 0);
4323 if (retval != STATUS_SUCCESS) {
4324 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4329 retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA,
4330 3, WAIT_INT, 0, 0, buf + 4, 1536);
4331 if (retval != STATUS_SUCCESS) {
4332 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4333 rtsx_clear_ms_error(chip);
4337 if (check_ms_err(chip)) {
4338 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4339 rtsx_clear_ms_error(chip);
4344 bufflen = min_t(int, 1052, scsi_bufflen(srb));
4345 rtsx_stor_set_xfer_buf(buf, bufflen, srb);
4352 int mg_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4354 struct ms_info *ms_card = &(chip->ms_card);
4358 unsigned int lun = SCSI_LUN(srb);
4361 ms_cleanup_work(chip);
4363 retval = ms_switch_clock(chip);
4364 if (retval != STATUS_SUCCESS) {
4369 retval = mg_send_ex_cmd(chip, MG_GET_ID, 0);
4370 if (retval != STATUS_SUCCESS) {
4371 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4376 retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, 32, WAIT_INT,
4378 if (retval != STATUS_SUCCESS) {
4379 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4383 if (check_ms_err(chip)) {
4384 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4385 rtsx_clear_ms_error(chip);
4390 memcpy(ms_card->magic_gate_id, buf, 16);
4392 #ifdef READ_BYTES_WAIT_INT
4393 retval = ms_poll_int(chip);
4394 if (retval != STATUS_SUCCESS) {
4395 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4401 retval = mg_send_ex_cmd(chip, MG_SET_RD, 0);
4402 if (retval != STATUS_SUCCESS) {
4403 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4408 bufflen = min_t(int, 12, scsi_bufflen(srb));
4409 rtsx_stor_get_xfer_buf(buf, bufflen, srb);
4411 for (i = 0; i < 8; i++)
4414 for (i = 0; i < 24; i++)
4417 retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA,
4418 32, WAIT_INT, buf, 32);
4419 if (retval != STATUS_SUCCESS) {
4420 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4424 if (check_ms_err(chip)) {
4425 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4426 rtsx_clear_ms_error(chip);
4431 ms_card->mg_auth = 0;
4433 return STATUS_SUCCESS;
4436 int mg_get_rsp_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4438 struct ms_info *ms_card = &(chip->ms_card);
4441 unsigned int lun = SCSI_LUN(srb);
4442 u8 buf1[32], buf2[36];
4444 ms_cleanup_work(chip);
4446 retval = ms_switch_clock(chip);
4447 if (retval != STATUS_SUCCESS) {
4452 retval = mg_send_ex_cmd(chip, MG_MAKE_RMS, 0);
4453 if (retval != STATUS_SUCCESS) {
4454 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4459 retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, 32, WAIT_INT,
4461 if (retval != STATUS_SUCCESS) {
4462 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4466 if (check_ms_err(chip)) {
4467 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4468 rtsx_clear_ms_error(chip);
4478 memcpy(buf2 + 4, ms_card->magic_gate_id, 16);
4479 memcpy(buf2 + 20, buf1, 16);
4481 bufflen = min_t(int, 36, scsi_bufflen(srb));
4482 rtsx_stor_set_xfer_buf(buf2, bufflen, srb);
4484 #ifdef READ_BYTES_WAIT_INT
4485 retval = ms_poll_int(chip);
4486 if (retval != STATUS_SUCCESS) {
4487 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4493 return STATUS_SUCCESS;
4496 int mg_rsp(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4498 struct ms_info *ms_card = &(chip->ms_card);
4502 unsigned int lun = SCSI_LUN(srb);
4505 ms_cleanup_work(chip);
4507 retval = ms_switch_clock(chip);
4508 if (retval != STATUS_SUCCESS) {
4513 retval = mg_send_ex_cmd(chip, MG_MAKE_KSE, 0);
4514 if (retval != STATUS_SUCCESS) {
4515 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4520 bufflen = min_t(int, 12, scsi_bufflen(srb));
4521 rtsx_stor_get_xfer_buf(buf, bufflen, srb);
4523 for (i = 0; i < 8; i++)
4526 for (i = 0; i < 24; i++)
4529 retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, 32, WAIT_INT,
4531 if (retval != STATUS_SUCCESS) {
4532 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4536 if (check_ms_err(chip)) {
4537 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4538 rtsx_clear_ms_error(chip);
4543 ms_card->mg_auth = 1;
4545 return STATUS_SUCCESS;
4548 int mg_get_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4550 struct ms_info *ms_card = &(chip->ms_card);
4553 unsigned int lun = SCSI_LUN(srb);
4556 ms_cleanup_work(chip);
4558 retval = ms_switch_clock(chip);
4559 if (retval != STATUS_SUCCESS) {
4564 buf = kmalloc(1028, GFP_KERNEL);
4567 return STATUS_ERROR;
4575 retval = mg_send_ex_cmd(chip, MG_GET_IBD, ms_card->mg_entry_num);
4576 if (retval != STATUS_SUCCESS) {
4577 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
4582 retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA,
4583 2, WAIT_INT, 0, 0, buf + 4, 1024);
4584 if (retval != STATUS_SUCCESS) {
4585 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
4586 rtsx_clear_ms_error(chip);
4590 if (check_ms_err(chip)) {
4591 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
4592 rtsx_clear_ms_error(chip);
4597 bufflen = min_t(int, 1028, scsi_bufflen(srb));
4598 rtsx_stor_set_xfer_buf(buf, bufflen, srb);
4605 int mg_set_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4607 struct ms_info *ms_card = &(chip->ms_card);
4610 #ifdef MG_SET_ICV_SLOW
4613 unsigned int lun = SCSI_LUN(srb);
4616 ms_cleanup_work(chip);
4618 retval = ms_switch_clock(chip);
4619 if (retval != STATUS_SUCCESS) {
4624 buf = kmalloc(1028, GFP_KERNEL);
4627 return STATUS_ERROR;
4630 bufflen = min_t(int, 1028, scsi_bufflen(srb));
4631 rtsx_stor_get_xfer_buf(buf, bufflen, srb);
4633 retval = mg_send_ex_cmd(chip, MG_SET_IBD, ms_card->mg_entry_num);
4634 if (retval != STATUS_SUCCESS) {
4635 if (ms_card->mg_auth == 0) {
4636 if ((buf[5] & 0xC0) != 0)
4637 set_sense_type(chip, lun,
4638 SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4640 set_sense_type(chip, lun,
4641 SENSE_TYPE_MG_WRITE_ERR);
4643 set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
4649 #ifdef MG_SET_ICV_SLOW
4650 for (i = 0; i < 2; i++) {
4653 rtsx_init_cmd(chip);
4655 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC,
4656 0xFF, PRO_WRITE_LONG_DATA);
4657 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, WAIT_INT);
4658 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
4661 trans_dma_enable(DMA_TO_DEVICE, chip, 512, DMA_512);
4663 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
4664 MS_TRANSFER_START | MS_TM_NORMAL_WRITE);
4665 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
4666 MS_TRANSFER_END, MS_TRANSFER_END);
4668 rtsx_send_cmd_no_wait(chip);
4670 retval = rtsx_transfer_data(chip, MS_CARD, buf + 4 + i*512,
4671 512, 0, DMA_TO_DEVICE, 3000);
4672 if ((retval < 0) || check_ms_err(chip)) {
4673 rtsx_clear_ms_error(chip);
4674 if (ms_card->mg_auth == 0) {
4675 if ((buf[5] & 0xC0) != 0)
4676 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4678 set_sense_type(chip, lun,
4679 SENSE_TYPE_MG_WRITE_ERR);
4681 set_sense_type(chip, lun,
4682 SENSE_TYPE_MG_WRITE_ERR);
4684 retval = STATUS_FAIL;
4690 retval = ms_transfer_data(chip, MS_TM_AUTO_WRITE, PRO_WRITE_LONG_DATA,
4691 2, WAIT_INT, 0, 0, buf + 4, 1024);
4692 if ((retval != STATUS_SUCCESS) || check_ms_err(chip)) {
4693 rtsx_clear_ms_error(chip);
4694 if (ms_card->mg_auth == 0) {
4695 if ((buf[5] & 0xC0) != 0)
4696 set_sense_type(chip, lun,
4697 SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4699 set_sense_type(chip, lun,
4700 SENSE_TYPE_MG_WRITE_ERR);
4702 set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
4714 #endif /* SUPPORT_MAGIC_GATE */
4716 void ms_cleanup_work(struct rtsx_chip *chip)
4718 struct ms_info *ms_card = &(chip->ms_card);
4720 if (CHK_MSPRO(ms_card)) {
4721 if (ms_card->seq_mode) {
4722 dev_dbg(rtsx_dev(chip), "MS Pro: stop transmission\n");
4723 mspro_stop_seq_mode(chip);
4724 ms_card->cleanup_counter = 0;
4726 if (CHK_MSHG(ms_card)) {
4727 rtsx_write_register(chip, MS_CFG,
4728 MS_2K_SECTOR_MODE, 0x00);
4731 #ifdef MS_DELAY_WRITE
4732 else if ((!CHK_MSPRO(ms_card)) && ms_card->delay_write.delay_write_flag) {
4733 dev_dbg(rtsx_dev(chip), "MS: delay write\n");
4734 ms_delay_write(chip);
4735 ms_card->cleanup_counter = 0;
4740 int ms_power_off_card3v3(struct rtsx_chip *chip)
4744 retval = disable_card_clock(chip, MS_CARD);
4745 if (retval != STATUS_SUCCESS) {
4750 if (chip->asic_code) {
4751 retval = ms_pull_ctl_disable(chip);
4752 if (retval != STATUS_SUCCESS) {
4757 retval = rtsx_write_register(chip, FPGA_PULL_CTL,
4758 FPGA_MS_PULL_CTL_BIT | 0x20,
4759 FPGA_MS_PULL_CTL_BIT);
4765 retval = rtsx_write_register(chip, CARD_OE, MS_OUTPUT_EN, 0);
4770 if (!chip->ft2_fast_mode) {
4771 retval = card_power_off(chip, MS_CARD);
4772 if (retval != STATUS_SUCCESS) {
4778 return STATUS_SUCCESS;
4781 int release_ms_card(struct rtsx_chip *chip)
4783 struct ms_info *ms_card = &(chip->ms_card);
4786 #ifdef MS_DELAY_WRITE
4787 ms_card->delay_write.delay_write_flag = 0;
4789 ms_card->pro_under_formatting = 0;
4791 chip->card_ready &= ~MS_CARD;
4792 chip->card_fail &= ~MS_CARD;
4793 chip->card_wp &= ~MS_CARD;
4795 ms_free_l2p_tbl(chip);
4797 memset(ms_card->raw_sys_info, 0, 96);
4798 #ifdef SUPPORT_PCGL_1P18
4799 memset(ms_card->raw_model_name, 0, 48);
4802 retval = ms_power_off_card3v3(chip);
4803 if (retval != STATUS_SUCCESS) {
4808 return STATUS_SUCCESS;