2 * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
15 #include <linux/export.h>
16 #include <linux/mfd/syscon.h>
17 #include <linux/pinctrl/pinconf.h>
18 #include <linux/pinctrl/pinconf-generic.h>
19 #include <linux/pinctrl/pinctrl.h>
20 #include <linux/pinctrl/pinmux.h>
21 #include <linux/platform_device.h>
22 #include <linux/regmap.h>
25 #include "../pinctrl-utils.h"
26 #include "pinctrl-uniphier.h"
28 struct uniphier_pinctrl_priv {
29 struct pinctrl_dev *pctldev;
30 struct regmap *regmap;
31 struct uniphier_pinctrl_socdata *socdata;
34 static int uniphier_pctl_get_groups_count(struct pinctrl_dev *pctldev)
36 struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
38 return priv->socdata->groups_count;
41 static const char *uniphier_pctl_get_group_name(struct pinctrl_dev *pctldev,
44 struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
46 return priv->socdata->groups[selector].name;
49 static int uniphier_pctl_get_group_pins(struct pinctrl_dev *pctldev,
51 const unsigned **pins,
54 struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
56 *pins = priv->socdata->groups[selector].pins;
57 *num_pins = priv->socdata->groups[selector].num_pins;
62 #ifdef CONFIG_DEBUG_FS
63 static void uniphier_pctl_pin_dbg_show(struct pinctrl_dev *pctldev,
64 struct seq_file *s, unsigned offset)
66 const struct pinctrl_pin_desc *pin = &pctldev->desc->pins[offset];
67 const char *pull_dir, *drv_str;
69 switch (uniphier_pin_get_pull_dir(pin->drv_data)) {
70 case UNIPHIER_PIN_PULL_UP:
73 case UNIPHIER_PIN_PULL_DOWN:
76 case UNIPHIER_PIN_PULL_UP_FIXED:
77 pull_dir = "UP(FIXED)";
79 case UNIPHIER_PIN_PULL_DOWN_FIXED:
80 pull_dir = "DOWN(FIXED)";
82 case UNIPHIER_PIN_PULL_NONE:
89 switch (uniphier_pin_get_drv_str(pin->drv_data)) {
90 case UNIPHIER_PIN_DRV_4_8:
93 case UNIPHIER_PIN_DRV_8_12_16_20:
94 drv_str = "8/12/16/20(mA)";
96 case UNIPHIER_PIN_DRV_FIXED_4:
99 case UNIPHIER_PIN_DRV_FIXED_5:
102 case UNIPHIER_PIN_DRV_FIXED_8:
105 case UNIPHIER_PIN_DRV_NONE:
112 seq_printf(s, " PULL_DIR=%s DRV_STR=%s", pull_dir, drv_str);
116 static const struct pinctrl_ops uniphier_pctlops = {
117 .get_groups_count = uniphier_pctl_get_groups_count,
118 .get_group_name = uniphier_pctl_get_group_name,
119 .get_group_pins = uniphier_pctl_get_group_pins,
120 #ifdef CONFIG_DEBUG_FS
121 .pin_dbg_show = uniphier_pctl_pin_dbg_show,
123 .dt_node_to_map = pinconf_generic_dt_node_to_map_all,
124 .dt_free_map = pinctrl_utils_dt_free_map,
127 static int uniphier_conf_pin_bias_get(struct pinctrl_dev *pctldev,
128 const struct pinctrl_pin_desc *pin,
129 enum pin_config_param param)
131 struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
132 enum uniphier_pin_pull_dir pull_dir =
133 uniphier_pin_get_pull_dir(pin->drv_data);
134 unsigned int pupdctrl, reg, shift, val;
135 unsigned int expected = 1;
139 case PIN_CONFIG_BIAS_DISABLE:
140 if (pull_dir == UNIPHIER_PIN_PULL_NONE)
142 if (pull_dir == UNIPHIER_PIN_PULL_UP_FIXED ||
143 pull_dir == UNIPHIER_PIN_PULL_DOWN_FIXED)
147 case PIN_CONFIG_BIAS_PULL_UP:
148 if (pull_dir == UNIPHIER_PIN_PULL_UP_FIXED)
150 if (pull_dir != UNIPHIER_PIN_PULL_UP)
153 case PIN_CONFIG_BIAS_PULL_DOWN:
154 if (pull_dir == UNIPHIER_PIN_PULL_DOWN_FIXED)
156 if (pull_dir != UNIPHIER_PIN_PULL_DOWN)
163 pupdctrl = uniphier_pin_get_pupdctrl(pin->drv_data);
165 reg = UNIPHIER_PINCTRL_PUPDCTRL_BASE + pupdctrl / 32 * 4;
166 shift = pupdctrl % 32;
168 ret = regmap_read(priv->regmap, reg, &val);
172 val = (val >> shift) & 1;
174 return (val == expected) ? 0 : -EINVAL;
177 static int uniphier_conf_pin_drive_get(struct pinctrl_dev *pctldev,
178 const struct pinctrl_pin_desc *pin,
181 struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
182 enum uniphier_pin_drv_str drv_str =
183 uniphier_pin_get_drv_str(pin->drv_data);
184 const unsigned int strength_4_8[] = {4, 8};
185 const unsigned int strength_8_12_16_20[] = {8, 12, 16, 20};
186 const unsigned int *supported_strength;
187 unsigned int drvctrl, reg, shift, mask, width, val;
191 case UNIPHIER_PIN_DRV_4_8:
192 supported_strength = strength_4_8;
195 case UNIPHIER_PIN_DRV_8_12_16_20:
196 supported_strength = strength_8_12_16_20;
199 case UNIPHIER_PIN_DRV_FIXED_4:
202 case UNIPHIER_PIN_DRV_FIXED_5:
205 case UNIPHIER_PIN_DRV_FIXED_8:
209 /* drive strength control is not supported for this pin */
213 drvctrl = uniphier_pin_get_drvctrl(pin->drv_data);
216 reg = (width == 2) ? UNIPHIER_PINCTRL_DRV2CTRL_BASE :
217 UNIPHIER_PINCTRL_DRVCTRL_BASE;
219 reg += drvctrl / 32 * 4;
220 shift = drvctrl % 32;
221 mask = (1U << width) - 1;
223 ret = regmap_read(priv->regmap, reg, &val);
227 *strength = supported_strength[(val >> shift) & mask];
232 static int uniphier_conf_pin_input_enable_get(struct pinctrl_dev *pctldev,
233 const struct pinctrl_pin_desc *pin)
235 struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
236 unsigned int iectrl = uniphier_pin_get_iectrl(pin->drv_data);
240 if (iectrl == UNIPHIER_PIN_IECTRL_NONE)
241 /* This pin is always input-enabled. */
244 ret = regmap_read(priv->regmap, UNIPHIER_PINCTRL_IECTRL, &val);
248 return val & BIT(iectrl) ? 0 : -EINVAL;
251 static int uniphier_conf_pin_config_get(struct pinctrl_dev *pctldev,
253 unsigned long *configs)
255 const struct pinctrl_pin_desc *pin_desc = &pctldev->desc->pins[pin];
256 enum pin_config_param param = pinconf_to_config_param(*configs);
257 bool has_arg = false;
262 case PIN_CONFIG_BIAS_DISABLE:
263 case PIN_CONFIG_BIAS_PULL_UP:
264 case PIN_CONFIG_BIAS_PULL_DOWN:
265 ret = uniphier_conf_pin_bias_get(pctldev, pin_desc, param);
267 case PIN_CONFIG_DRIVE_STRENGTH:
268 ret = uniphier_conf_pin_drive_get(pctldev, pin_desc, &arg);
271 case PIN_CONFIG_INPUT_ENABLE:
272 ret = uniphier_conf_pin_input_enable_get(pctldev, pin_desc);
275 /* unsupported parameter */
280 if (ret == 0 && has_arg)
281 *configs = pinconf_to_config_packed(param, arg);
286 static int uniphier_conf_pin_bias_set(struct pinctrl_dev *pctldev,
287 const struct pinctrl_pin_desc *pin,
288 enum pin_config_param param,
291 struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
292 enum uniphier_pin_pull_dir pull_dir =
293 uniphier_pin_get_pull_dir(pin->drv_data);
294 unsigned int pupdctrl, reg, shift;
295 unsigned int val = 1;
298 case PIN_CONFIG_BIAS_DISABLE:
299 if (pull_dir == UNIPHIER_PIN_PULL_NONE)
301 if (pull_dir == UNIPHIER_PIN_PULL_UP_FIXED ||
302 pull_dir == UNIPHIER_PIN_PULL_DOWN_FIXED) {
303 dev_err(pctldev->dev,
304 "can not disable pull register for pin %u (%s)\n",
305 pin->number, pin->name);
310 case PIN_CONFIG_BIAS_PULL_UP:
311 if (pull_dir == UNIPHIER_PIN_PULL_UP_FIXED && arg != 0)
313 if (pull_dir != UNIPHIER_PIN_PULL_UP) {
314 dev_err(pctldev->dev,
315 "pull-up is unsupported for pin %u (%s)\n",
316 pin->number, pin->name);
320 dev_err(pctldev->dev, "pull-up can not be total\n");
324 case PIN_CONFIG_BIAS_PULL_DOWN:
325 if (pull_dir == UNIPHIER_PIN_PULL_DOWN_FIXED && arg != 0)
327 if (pull_dir != UNIPHIER_PIN_PULL_DOWN) {
328 dev_err(pctldev->dev,
329 "pull-down is unsupported for pin %u (%s)\n",
330 pin->number, pin->name);
334 dev_err(pctldev->dev, "pull-down can not be total\n");
338 case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT:
339 if (pull_dir == UNIPHIER_PIN_PULL_NONE) {
340 dev_err(pctldev->dev,
341 "pull-up/down is unsupported for pin %u (%s)\n",
342 pin->number, pin->name);
347 return 0; /* configuration ingored */
353 pupdctrl = uniphier_pin_get_pupdctrl(pin->drv_data);
355 reg = UNIPHIER_PINCTRL_PUPDCTRL_BASE + pupdctrl / 32 * 4;
356 shift = pupdctrl % 32;
358 return regmap_update_bits(priv->regmap, reg, 1 << shift, val << shift);
361 static int uniphier_conf_pin_drive_set(struct pinctrl_dev *pctldev,
362 const struct pinctrl_pin_desc *pin,
365 struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
366 enum uniphier_pin_drv_str drv_str =
367 uniphier_pin_get_drv_str(pin->drv_data);
368 const unsigned int strength_4_8[] = {4, 8, -1};
369 const unsigned int strength_8_12_16_20[] = {8, 12, 16, 20, -1};
370 const unsigned int *supported_strength;
371 unsigned int drvctrl, reg, shift, mask, width, val;
374 case UNIPHIER_PIN_DRV_4_8:
375 supported_strength = strength_4_8;
378 case UNIPHIER_PIN_DRV_8_12_16_20:
379 supported_strength = strength_8_12_16_20;
383 dev_err(pctldev->dev,
384 "cannot change drive strength for pin %u (%s)\n",
385 pin->number, pin->name);
389 for (val = 0; supported_strength[val] > 0; val++) {
390 if (supported_strength[val] > strength)
395 dev_err(pctldev->dev,
396 "unsupported drive strength %u mA for pin %u (%s)\n",
397 strength, pin->number, pin->name);
403 drvctrl = uniphier_pin_get_drvctrl(pin->drv_data);
406 reg = (width == 2) ? UNIPHIER_PINCTRL_DRV2CTRL_BASE :
407 UNIPHIER_PINCTRL_DRVCTRL_BASE;
409 reg += drvctrl / 32 * 4;
410 shift = drvctrl % 32;
411 mask = (1U << width) - 1;
413 return regmap_update_bits(priv->regmap, reg,
414 mask << shift, val << shift);
417 static int uniphier_conf_pin_input_enable(struct pinctrl_dev *pctldev,
418 const struct pinctrl_pin_desc *pin,
421 struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
422 unsigned int iectrl = uniphier_pin_get_iectrl(pin->drv_data);
426 * Multiple pins share one input enable, so per-pin disabling
429 dev_err(pctldev->dev, "unable to disable input\n");
433 if (iectrl == UNIPHIER_PIN_IECTRL_NONE)
434 /* This pin is always input-enabled. nothing to do. */
437 return regmap_update_bits(priv->regmap, UNIPHIER_PINCTRL_IECTRL,
438 BIT(iectrl), BIT(iectrl));
441 static int uniphier_conf_pin_config_set(struct pinctrl_dev *pctldev,
443 unsigned long *configs,
444 unsigned num_configs)
446 const struct pinctrl_pin_desc *pin_desc = &pctldev->desc->pins[pin];
449 for (i = 0; i < num_configs; i++) {
450 enum pin_config_param param =
451 pinconf_to_config_param(configs[i]);
452 u16 arg = pinconf_to_config_argument(configs[i]);
455 case PIN_CONFIG_BIAS_DISABLE:
456 case PIN_CONFIG_BIAS_PULL_UP:
457 case PIN_CONFIG_BIAS_PULL_DOWN:
458 case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT:
459 ret = uniphier_conf_pin_bias_set(pctldev, pin_desc,
462 case PIN_CONFIG_DRIVE_STRENGTH:
463 ret = uniphier_conf_pin_drive_set(pctldev, pin_desc,
466 case PIN_CONFIG_INPUT_ENABLE:
467 ret = uniphier_conf_pin_input_enable(pctldev,
471 dev_err(pctldev->dev,
472 "unsupported configuration parameter %u\n",
484 static int uniphier_conf_pin_config_group_set(struct pinctrl_dev *pctldev,
486 unsigned long *configs,
487 unsigned num_configs)
489 struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
490 const unsigned *pins = priv->socdata->groups[selector].pins;
491 unsigned num_pins = priv->socdata->groups[selector].num_pins;
494 for (i = 0; i < num_pins; i++) {
495 ret = uniphier_conf_pin_config_set(pctldev, pins[i],
496 configs, num_configs);
504 static const struct pinconf_ops uniphier_confops = {
506 .pin_config_get = uniphier_conf_pin_config_get,
507 .pin_config_set = uniphier_conf_pin_config_set,
508 .pin_config_group_set = uniphier_conf_pin_config_group_set,
511 static int uniphier_pmx_get_functions_count(struct pinctrl_dev *pctldev)
513 struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
515 return priv->socdata->functions_count;
518 static const char *uniphier_pmx_get_function_name(struct pinctrl_dev *pctldev,
521 struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
523 return priv->socdata->functions[selector].name;
526 static int uniphier_pmx_get_function_groups(struct pinctrl_dev *pctldev,
528 const char * const **groups,
529 unsigned *num_groups)
531 struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
533 *groups = priv->socdata->functions[selector].groups;
534 *num_groups = priv->socdata->functions[selector].num_groups;
539 static int uniphier_pmx_set_one_mux(struct pinctrl_dev *pctldev, unsigned pin,
542 struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
543 unsigned mux_bits = priv->socdata->mux_bits;
544 unsigned reg_stride = priv->socdata->reg_stride;
545 unsigned reg, reg_end, shift, mask;
548 /* some pins need input-enabling */
549 ret = uniphier_conf_pin_input_enable(pctldev,
550 &pctldev->desc->pins[pin], 1);
554 reg = UNIPHIER_PINCTRL_PINMUX_BASE + pin * mux_bits / 32 * reg_stride;
555 reg_end = reg + reg_stride;
556 shift = pin * mux_bits % 32;
557 mask = (1U << mux_bits) - 1;
560 * If reg_stride is greater than 4, the MSB of each pinsel shall be
561 * stored in the offset+4.
563 for (; reg < reg_end; reg += 4) {
564 ret = regmap_update_bits(priv->regmap, reg,
565 mask << shift, muxval << shift);
571 if (priv->socdata->load_pinctrl) {
572 ret = regmap_write(priv->regmap,
573 UNIPHIER_PINCTRL_LOAD_PINMUX, 1);
581 static int uniphier_pmx_set_mux(struct pinctrl_dev *pctldev,
582 unsigned func_selector,
583 unsigned group_selector)
585 struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
586 const struct uniphier_pinctrl_group *grp =
587 &priv->socdata->groups[group_selector];
591 for (i = 0; i < grp->num_pins; i++) {
592 ret = uniphier_pmx_set_one_mux(pctldev, grp->pins[i],
601 static int uniphier_pmx_gpio_request_enable(struct pinctrl_dev *pctldev,
602 struct pinctrl_gpio_range *range,
605 struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
606 const struct uniphier_pinctrl_group *groups = priv->socdata->groups;
607 int groups_count = priv->socdata->groups_count;
608 enum uniphier_pinmux_gpio_range_type range_type;
611 if (strstr(range->name, "irq"))
612 range_type = UNIPHIER_PINMUX_GPIO_RANGE_IRQ;
614 range_type = UNIPHIER_PINMUX_GPIO_RANGE_PORT;
616 for (i = 0; i < groups_count; i++) {
617 if (groups[i].range_type != range_type)
620 for (j = 0; j < groups[i].num_pins; j++)
621 if (groups[i].pins[j] == offset)
625 dev_err(pctldev->dev, "pin %u does not support GPIO\n", offset);
629 return uniphier_pmx_set_one_mux(pctldev, offset, groups[i].muxvals[j]);
632 static const struct pinmux_ops uniphier_pmxops = {
633 .get_functions_count = uniphier_pmx_get_functions_count,
634 .get_function_name = uniphier_pmx_get_function_name,
635 .get_function_groups = uniphier_pmx_get_function_groups,
636 .set_mux = uniphier_pmx_set_mux,
637 .gpio_request_enable = uniphier_pmx_gpio_request_enable,
641 int uniphier_pinctrl_probe(struct platform_device *pdev,
642 struct pinctrl_desc *desc,
643 struct uniphier_pinctrl_socdata *socdata)
645 struct device *dev = &pdev->dev;
646 struct uniphier_pinctrl_priv *priv;
650 !socdata->groups_count ||
651 !socdata->functions ||
652 !socdata->functions_count ||
653 !socdata->mux_bits ||
654 !socdata->reg_stride) {
655 dev_err(dev, "pinctrl socdata lacks necessary members\n");
659 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
663 priv->regmap = syscon_node_to_regmap(dev->of_node);
664 if (IS_ERR(priv->regmap)) {
665 dev_err(dev, "failed to get regmap\n");
666 return PTR_ERR(priv->regmap);
669 priv->socdata = socdata;
670 desc->pctlops = &uniphier_pctlops;
671 desc->pmxops = &uniphier_pmxops;
672 desc->confops = &uniphier_confops;
674 priv->pctldev = pinctrl_register(desc, dev, priv);
675 if (IS_ERR(priv->pctldev)) {
676 dev_err(dev, "failed to register UniPhier pinctrl driver\n");
677 return PTR_ERR(priv->pctldev);
680 platform_set_drvdata(pdev, priv);
684 EXPORT_SYMBOL_GPL(uniphier_pinctrl_probe);
686 int uniphier_pinctrl_remove(struct platform_device *pdev)
688 struct uniphier_pinctrl_priv *priv = platform_get_drvdata(pdev);
690 pinctrl_unregister(priv->pctldev);
694 EXPORT_SYMBOL_GPL(uniphier_pinctrl_remove);