kernel/drivers/pinctrl/mvebu/pinctrl-armada-xp.c

   1 /*
   2  * Marvell Armada XP pinctrl driver based on mvebu pinctrl core
   3  *
   4  * Copyright (C) 2012 Marvell
   5  *
   6  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This file supports the three variants of Armada XP SoCs that are
  14  * available: mv78230, mv78260 and mv78460. From a pin muxing
  15  * perspective, the mv78230 has 49 MPP pins. The mv78260 and mv78460
  16  * both have 67 MPP pins (more GPIOs and address lines for the memory
  17  * bus mainly).
  18  */
  19
  20 #include <linux/err.h>
  21 #include <linux/init.h>
  22 #include <linux/io.h>
  23 #include <linux/module.h>
  24 #include <linux/platform_device.h>
  25 #include <linux/clk.h>
  26 #include <linux/of.h>
  27 #include <linux/of_device.h>
  28 #include <linux/pinctrl/pinctrl.h>
  29 #include <linux/bitops.h>
  30
  31 #include "pinctrl-mvebu.h"
  32
  33 static void __iomem *mpp_base;
  34 static u32 *mpp_saved_regs;
  35
  36 static int armada_xp_mpp_ctrl_get(unsigned pid, unsigned long *config)
  37 {
  38         return default_mpp_ctrl_get(mpp_base, pid, config);
  39 }
  40
  41 static int armada_xp_mpp_ctrl_set(unsigned pid, unsigned long config)
  42 {
  43         return default_mpp_ctrl_set(mpp_base, pid, config);
  44 }
  45
  46 enum armada_xp_variant {
  47         V_MV78230       = BIT(0),
  48         V_MV78260       = BIT(1),
  49         V_MV78460       = BIT(2),
  50         V_MV78230_PLUS  = (V_MV78230 | V_MV78260 | V_MV78460),
  51         V_MV78260_PLUS  = (V_MV78260 | V_MV78460),
  52 };
  53
  54 static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
  55         MPP_MODE(0,
  56                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
  57                  MPP_VAR_FUNCTION(0x1, "ge0", "txclkout",   V_MV78230_PLUS),
  58                  MPP_VAR_FUNCTION(0x4, "lcd", "d0",         V_MV78230_PLUS)),
  59         MPP_MODE(1,
  60                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
  61                  MPP_VAR_FUNCTION(0x1, "ge0", "txd0",       V_MV78230_PLUS),
  62                  MPP_VAR_FUNCTION(0x4, "lcd", "d1",         V_MV78230_PLUS)),
  63         MPP_MODE(2,
  64                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
  65                  MPP_VAR_FUNCTION(0x1, "ge0", "txd1",       V_MV78230_PLUS),
  66                  MPP_VAR_FUNCTION(0x4, "lcd", "d2",         V_MV78230_PLUS)),
  67         MPP_MODE(3,
  68                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
  69                  MPP_VAR_FUNCTION(0x1, "ge0", "txd2",       V_MV78230_PLUS),
  70                  MPP_VAR_FUNCTION(0x4, "lcd", "d3",         V_MV78230_PLUS)),
  71         MPP_MODE(4,
  72                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
  73                  MPP_VAR_FUNCTION(0x1, "ge0", "txd3",       V_MV78230_PLUS),
  74                  MPP_VAR_FUNCTION(0x4, "lcd", "d4",         V_MV78230_PLUS)),
  75         MPP_MODE(5,
  76                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
  77                  MPP_VAR_FUNCTION(0x1, "ge0", "txctl",      V_MV78230_PLUS),
  78                  MPP_VAR_FUNCTION(0x4, "lcd", "d5",         V_MV78230_PLUS)),
  79         MPP_MODE(6,
  80                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
  81                  MPP_VAR_FUNCTION(0x1, "ge0", "rxd0",       V_MV78230_PLUS),
  82                  MPP_VAR_FUNCTION(0x4, "lcd", "d6",         V_MV78230_PLUS)),
  83         MPP_MODE(7,
  84                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
  85                  MPP_VAR_FUNCTION(0x1, "ge0", "rxd1",       V_MV78230_PLUS),
  86                  MPP_VAR_FUNCTION(0x4, "lcd", "d7",         V_MV78230_PLUS)),
  87         MPP_MODE(8,
  88                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
  89                  MPP_VAR_FUNCTION(0x1, "ge0", "rxd2",       V_MV78230_PLUS),
  90                  MPP_VAR_FUNCTION(0x4, "lcd", "d8",         V_MV78230_PLUS)),
  91         MPP_MODE(9,
  92                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
  93                  MPP_VAR_FUNCTION(0x1, "ge0", "rxd3",       V_MV78230_PLUS),
  94                  MPP_VAR_FUNCTION(0x4, "lcd", "d9",         V_MV78230_PLUS)),
  95         MPP_MODE(10,
  96                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
  97                  MPP_VAR_FUNCTION(0x1, "ge0", "rxctl",      V_MV78230_PLUS),
  98                  MPP_VAR_FUNCTION(0x4, "lcd", "d10",        V_MV78230_PLUS)),
  99         MPP_MODE(11,
 100                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 101                  MPP_VAR_FUNCTION(0x1, "ge0", "rxclk",      V_MV78230_PLUS),
 102                  MPP_VAR_FUNCTION(0x4, "lcd", "d11",        V_MV78230_PLUS)),
 103         MPP_MODE(12,
 104                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 105                  MPP_VAR_FUNCTION(0x1, "ge0", "txd4",       V_MV78230_PLUS),
 106                  MPP_VAR_FUNCTION(0x2, "ge1", "txclkout",   V_MV78230_PLUS),
 107                  MPP_VAR_FUNCTION(0x4, "lcd", "d12",        V_MV78230_PLUS)),
 108         MPP_MODE(13,
 109                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 110                  MPP_VAR_FUNCTION(0x1, "ge0", "txd5",       V_MV78230_PLUS),
 111                  MPP_VAR_FUNCTION(0x2, "ge1", "txd0",       V_MV78230_PLUS),
 112                  MPP_VAR_FUNCTION(0x3, "spi1", "mosi",      V_MV78230_PLUS),
 113                  MPP_VAR_FUNCTION(0x4, "lcd", "d13",        V_MV78230_PLUS)),
 114         MPP_MODE(14,
 115                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 116                  MPP_VAR_FUNCTION(0x1, "ge0", "txd6",       V_MV78230_PLUS),
 117                  MPP_VAR_FUNCTION(0x2, "ge1", "txd1",       V_MV78230_PLUS),
 118                  MPP_VAR_FUNCTION(0x3, "spi1", "sck",       V_MV78230_PLUS),
 119                  MPP_VAR_FUNCTION(0x4, "lcd", "d14",        V_MV78230_PLUS)),
 120         MPP_MODE(15,
 121                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 122                  MPP_VAR_FUNCTION(0x1, "ge0", "txd7",       V_MV78230_PLUS),
 123                  MPP_VAR_FUNCTION(0x2, "ge1", "txd2",       V_MV78230_PLUS),
 124                  MPP_VAR_FUNCTION(0x4, "lcd", "d15",        V_MV78230_PLUS)),
 125         MPP_MODE(16,
 126                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 127                  MPP_VAR_FUNCTION(0x1, "ge0", "txclk",      V_MV78230_PLUS),
 128                  MPP_VAR_FUNCTION(0x2, "ge1", "txd3",       V_MV78230_PLUS),
 129                  MPP_VAR_FUNCTION(0x3, "spi1", "cs0",       V_MV78230_PLUS),
 130                  MPP_VAR_FUNCTION(0x4, "lcd", "d16",        V_MV78230_PLUS)),
 131         MPP_MODE(17,
 132                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 133                  MPP_VAR_FUNCTION(0x1, "ge0", "col",        V_MV78230_PLUS),
 134                  MPP_VAR_FUNCTION(0x2, "ge1", "txctl",      V_MV78230_PLUS),
 135                  MPP_VAR_FUNCTION(0x3, "spi1", "miso",      V_MV78230_PLUS),
 136                  MPP_VAR_FUNCTION(0x4, "lcd", "d17",        V_MV78230_PLUS)),
 137         MPP_MODE(18,
 138                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 139                  MPP_VAR_FUNCTION(0x1, "ge0", "rxerr",      V_MV78230_PLUS),
 140                  MPP_VAR_FUNCTION(0x2, "ge1", "rxd0",       V_MV78230_PLUS),
 141                  MPP_VAR_FUNCTION(0x3, "ptp", "trig",       V_MV78230_PLUS),
 142                  MPP_VAR_FUNCTION(0x4, "lcd", "d18",        V_MV78230_PLUS)),
 143         MPP_MODE(19,
 144                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 145                  MPP_VAR_FUNCTION(0x1, "ge0", "crs",        V_MV78230_PLUS),
 146                  MPP_VAR_FUNCTION(0x2, "ge1", "rxd1",       V_MV78230_PLUS),
 147                  MPP_VAR_FUNCTION(0x3, "ptp", "evreq",      V_MV78230_PLUS),
 148                  MPP_VAR_FUNCTION(0x4, "lcd", "d19",        V_MV78230_PLUS)),
 149         MPP_MODE(20,
 150                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 151                  MPP_VAR_FUNCTION(0x1, "ge0", "rxd4",       V_MV78230_PLUS),
 152                  MPP_VAR_FUNCTION(0x2, "ge1", "rxd2",       V_MV78230_PLUS),
 153                  MPP_VAR_FUNCTION(0x3, "ptp", "clk",        V_MV78230_PLUS),
 154                  MPP_VAR_FUNCTION(0x4, "lcd", "d20",        V_MV78230_PLUS)),
 155         MPP_MODE(21,
 156                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 157                  MPP_VAR_FUNCTION(0x1, "ge0", "rxd5",       V_MV78230_PLUS),
 158                  MPP_VAR_FUNCTION(0x2, "ge1", "rxd3",       V_MV78230_PLUS),
 159                  MPP_VAR_FUNCTION(0x3, "dram", "bat",       V_MV78230_PLUS),
 160                  MPP_VAR_FUNCTION(0x4, "lcd", "d21",        V_MV78230_PLUS)),
 161         MPP_MODE(22,
 162                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 163                  MPP_VAR_FUNCTION(0x1, "ge0", "rxd6",       V_MV78230_PLUS),
 164                  MPP_VAR_FUNCTION(0x2, "ge1", "rxctl",      V_MV78230_PLUS),
 165                  MPP_VAR_FUNCTION(0x3, "sata0", "prsnt",    V_MV78230_PLUS),
 166                  MPP_VAR_FUNCTION(0x4, "lcd", "d22",        V_MV78230_PLUS)),
 167         MPP_MODE(23,
 168                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 169                  MPP_VAR_FUNCTION(0x1, "ge0", "rxd7",       V_MV78230_PLUS),
 170                  MPP_VAR_FUNCTION(0x2, "ge1", "rxclk",      V_MV78230_PLUS),
 171                  MPP_VAR_FUNCTION(0x3, "sata1", "prsnt",    V_MV78230_PLUS),
 172                  MPP_VAR_FUNCTION(0x4, "lcd", "d23",        V_MV78230_PLUS)),
 173         MPP_MODE(24,
 174                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 175                  MPP_VAR_FUNCTION(0x1, "sata1", "prsnt",    V_MV78230_PLUS),
 176                  MPP_VAR_FUNCTION(0x3, "tdm", "rst",        V_MV78230_PLUS),
 177                  MPP_VAR_FUNCTION(0x4, "lcd", "hsync",      V_MV78230_PLUS)),
 178         MPP_MODE(25,
 179                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 180                  MPP_VAR_FUNCTION(0x1, "sata0", "prsnt",    V_MV78230_PLUS),
 181                  MPP_VAR_FUNCTION(0x3, "tdm", "pclk",       V_MV78230_PLUS),
 182                  MPP_VAR_FUNCTION(0x4, "lcd", "vsync",      V_MV78230_PLUS)),
 183         MPP_MODE(26,
 184                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 185                  MPP_VAR_FUNCTION(0x3, "tdm", "fsync",      V_MV78230_PLUS),
 186                  MPP_VAR_FUNCTION(0x4, "lcd", "clk",        V_MV78230_PLUS)),
 187         MPP_MODE(27,
 188                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 189                  MPP_VAR_FUNCTION(0x1, "ptp", "trig",       V_MV78230_PLUS),
 190                  MPP_VAR_FUNCTION(0x3, "tdm", "dtx",        V_MV78230_PLUS),
 191                  MPP_VAR_FUNCTION(0x4, "lcd", "e",          V_MV78230_PLUS)),
 192         MPP_MODE(28,
 193                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 194                  MPP_VAR_FUNCTION(0x1, "ptp", "evreq",      V_MV78230_PLUS),
 195                  MPP_VAR_FUNCTION(0x3, "tdm", "drx",        V_MV78230_PLUS),
 196                  MPP_VAR_FUNCTION(0x4, "lcd", "pwm",        V_MV78230_PLUS)),
 197         MPP_MODE(29,
 198                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 199                  MPP_VAR_FUNCTION(0x1, "ptp", "clk",        V_MV78230_PLUS),
 200                  MPP_VAR_FUNCTION(0x3, "tdm", "int0",       V_MV78230_PLUS),
 201                  MPP_VAR_FUNCTION(0x4, "lcd", "ref-clk",    V_MV78230_PLUS)),
 202         MPP_MODE(30,
 203                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 204                  MPP_VAR_FUNCTION(0x1, "sd0", "clk",        V_MV78230_PLUS),
 205                  MPP_VAR_FUNCTION(0x3, "tdm", "int1",       V_MV78230_PLUS)),
 206         MPP_MODE(31,
 207                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 208                  MPP_VAR_FUNCTION(0x1, "sd0", "cmd",        V_MV78230_PLUS),
 209                  MPP_VAR_FUNCTION(0x3, "tdm", "int2",       V_MV78230_PLUS)),
 210         MPP_MODE(32,
 211                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 212                  MPP_VAR_FUNCTION(0x1, "sd0", "d0",         V_MV78230_PLUS),
 213                  MPP_VAR_FUNCTION(0x3, "tdm", "int3",       V_MV78230_PLUS)),
 214         MPP_MODE(33,
 215                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 216                  MPP_VAR_FUNCTION(0x1, "sd0", "d1",         V_MV78230_PLUS),
 217                  MPP_VAR_FUNCTION(0x3, "tdm", "int4",       V_MV78230_PLUS),
 218                  MPP_VAR_FUNCTION(0x4, "dram", "bat",       V_MV78230_PLUS),
 219                  MPP_VAR_FUNCTION(0x5, "dram", "vttctrl",   V_MV78230_PLUS)),
 220         MPP_MODE(34,
 221                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 222                  MPP_VAR_FUNCTION(0x1, "sd0", "d2",         V_MV78230_PLUS),
 223                  MPP_VAR_FUNCTION(0x2, "sata0", "prsnt",    V_MV78230_PLUS),
 224                  MPP_VAR_FUNCTION(0x3, "tdm", "int5",       V_MV78230_PLUS),
 225                  MPP_VAR_FUNCTION(0x4, "dram", "deccerr",   V_MV78230_PLUS)),
 226         MPP_MODE(35,
 227                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 228                  MPP_VAR_FUNCTION(0x1, "sd0", "d3",         V_MV78230_PLUS),
 229                  MPP_VAR_FUNCTION(0x2, "sata1", "prsnt",    V_MV78230_PLUS),
 230                  MPP_VAR_FUNCTION(0x3, "tdm", "int6",       V_MV78230_PLUS)),
 231         MPP_MODE(36,
 232                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 233                  MPP_VAR_FUNCTION(0x1, "spi0", "mosi",      V_MV78230_PLUS)),
 234         MPP_MODE(37,
 235                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 236                  MPP_VAR_FUNCTION(0x1, "spi0", "miso",      V_MV78230_PLUS)),
 237         MPP_MODE(38,
 238                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 239                  MPP_VAR_FUNCTION(0x1, "spi0", "sck",       V_MV78230_PLUS)),
 240         MPP_MODE(39,
 241                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 242                  MPP_VAR_FUNCTION(0x1, "spi0", "cs0",       V_MV78230_PLUS)),
 243         MPP_MODE(40,
 244                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 245                  MPP_VAR_FUNCTION(0x1, "spi0", "cs1",       V_MV78230_PLUS),
 246                  MPP_VAR_FUNCTION(0x2, "uart2", "cts",      V_MV78230_PLUS),
 247                  MPP_VAR_FUNCTION(0x4, "lcd", "vga-hsync",  V_MV78230_PLUS),
 248                  MPP_VAR_FUNCTION(0x5, "pcie", "clkreq0",   V_MV78230_PLUS),
 249                  MPP_VAR_FUNCTION(0x6, "spi1", "cs1",       V_MV78230_PLUS)),
 250         MPP_MODE(41,
 251                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 252                  MPP_VAR_FUNCTION(0x1, "spi0", "cs2",       V_MV78230_PLUS),
 253                  MPP_VAR_FUNCTION(0x2, "uart2", "rts",      V_MV78230_PLUS),
 254                  MPP_VAR_FUNCTION(0x3, "sata1", "prsnt",    V_MV78230_PLUS),
 255                  MPP_VAR_FUNCTION(0x4, "lcd", "vga-vsync",  V_MV78230_PLUS),
 256                  MPP_VAR_FUNCTION(0x5, "pcie", "clkreq1",   V_MV78230_PLUS),
 257                  MPP_VAR_FUNCTION(0x6, "spi1", "cs2",       V_MV78230_PLUS)),
 258         MPP_MODE(42,
 259                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 260                  MPP_VAR_FUNCTION(0x1, "uart2", "rxd",      V_MV78230_PLUS),
 261                  MPP_VAR_FUNCTION(0x2, "uart0", "cts",      V_MV78230_PLUS),
 262                  MPP_VAR_FUNCTION(0x3, "tdm", "int7",       V_MV78230_PLUS),
 263                  MPP_VAR_FUNCTION(0x4, "tdm", "timer",      V_MV78230_PLUS)),
 264         MPP_MODE(43,
 265                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 266                  MPP_VAR_FUNCTION(0x1, "uart2", "txd",      V_MV78230_PLUS),
 267                  MPP_VAR_FUNCTION(0x2, "uart0", "rts",      V_MV78230_PLUS),
 268                  MPP_VAR_FUNCTION(0x3, "spi0", "cs3",       V_MV78230_PLUS),
 269                  MPP_VAR_FUNCTION(0x4, "pcie", "rstout",    V_MV78230_PLUS),
 270                  MPP_VAR_FUNCTION(0x6, "spi1", "cs3",       V_MV78230_PLUS)),
 271         MPP_MODE(44,
 272                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 273                  MPP_VAR_FUNCTION(0x1, "uart2", "cts",      V_MV78230_PLUS),
 274                  MPP_VAR_FUNCTION(0x2, "uart3", "rxd",      V_MV78230_PLUS),
 275                  MPP_VAR_FUNCTION(0x3, "spi0", "cs4",       V_MV78230_PLUS),
 276                  MPP_VAR_FUNCTION(0x4, "dram", "bat",       V_MV78230_PLUS),
 277                  MPP_VAR_FUNCTION(0x5, "pcie", "clkreq2",   V_MV78230_PLUS),
 278                  MPP_VAR_FUNCTION(0x6, "spi1", "cs4",       V_MV78230_PLUS)),
 279         MPP_MODE(45,
 280                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 281                  MPP_VAR_FUNCTION(0x1, "uart2", "rts",      V_MV78230_PLUS),
 282                  MPP_VAR_FUNCTION(0x2, "uart3", "txd",      V_MV78230_PLUS),
 283                  MPP_VAR_FUNCTION(0x3, "spi0", "cs5",       V_MV78230_PLUS),
 284                  MPP_VAR_FUNCTION(0x4, "sata1", "prsnt",    V_MV78230_PLUS),
 285                  MPP_VAR_FUNCTION(0x5, "dram", "vttctrl",   V_MV78230_PLUS),
 286                  MPP_VAR_FUNCTION(0x6, "spi1", "cs5",       V_MV78230_PLUS)),
 287         MPP_MODE(46,
 288                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 289                  MPP_VAR_FUNCTION(0x1, "uart3", "rts",      V_MV78230_PLUS),
 290                  MPP_VAR_FUNCTION(0x2, "uart1", "rts",      V_MV78230_PLUS),
 291                  MPP_VAR_FUNCTION(0x3, "spi0", "cs6",       V_MV78230_PLUS),
 292                  MPP_VAR_FUNCTION(0x4, "sata0", "prsnt",    V_MV78230_PLUS),
 293                  MPP_VAR_FUNCTION(0x6, "spi1", "cs6",       V_MV78230_PLUS)),
 294         MPP_MODE(47,
 295                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 296                  MPP_VAR_FUNCTION(0x1, "uart3", "cts",      V_MV78230_PLUS),
 297                  MPP_VAR_FUNCTION(0x2, "uart1", "cts",      V_MV78230_PLUS),
 298                  MPP_VAR_FUNCTION(0x3, "spi0", "cs7",       V_MV78230_PLUS),
 299                  MPP_VAR_FUNCTION(0x4, "ref", "clkout",     V_MV78230_PLUS),
 300                  MPP_VAR_FUNCTION(0x5, "pcie", "clkreq3",   V_MV78230_PLUS),
 301                  MPP_VAR_FUNCTION(0x6, "spi1", "cs7",       V_MV78230_PLUS)),
 302         MPP_MODE(48,
 303                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 304                  MPP_VAR_FUNCTION(0x1, "dev", "clkout",     V_MV78230_PLUS),
 305                  MPP_VAR_FUNCTION(0x2, "dev", "burst/last", V_MV78230_PLUS),
 306                  MPP_VAR_FUNCTION(0x3, "nand", "rb",        V_MV78230_PLUS)),
 307         MPP_MODE(49,
 308                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
 309                  MPP_VAR_FUNCTION(0x1, "dev", "we3",        V_MV78260_PLUS)),
 310         MPP_MODE(50,
 311                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
 312                  MPP_VAR_FUNCTION(0x1, "dev", "we2",        V_MV78260_PLUS)),
 313         MPP_MODE(51,
 314                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
 315                  MPP_VAR_FUNCTION(0x1, "dev", "ad16",       V_MV78260_PLUS)),
 316         MPP_MODE(52,
 317                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
 318                  MPP_VAR_FUNCTION(0x1, "dev", "ad17",       V_MV78260_PLUS)),
 319         MPP_MODE(53,
 320                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
 321                  MPP_VAR_FUNCTION(0x1, "dev", "ad18",       V_MV78260_PLUS)),
 322         MPP_MODE(54,
 323                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
 324                  MPP_VAR_FUNCTION(0x1, "dev", "ad19",       V_MV78260_PLUS)),
 325         MPP_MODE(55,
 326                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
 327                  MPP_VAR_FUNCTION(0x1, "dev", "ad20",       V_MV78260_PLUS)),
 328         MPP_MODE(56,
 329                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
 330                  MPP_VAR_FUNCTION(0x1, "dev", "ad21",       V_MV78260_PLUS)),
 331         MPP_MODE(57,
 332                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
 333                  MPP_VAR_FUNCTION(0x1, "dev", "ad22",       V_MV78260_PLUS)),
 334         MPP_MODE(58,
 335                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
 336                  MPP_VAR_FUNCTION(0x1, "dev", "ad23",       V_MV78260_PLUS)),
 337         MPP_MODE(59,
 338                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
 339                  MPP_VAR_FUNCTION(0x1, "dev", "ad24",       V_MV78260_PLUS)),
 340         MPP_MODE(60,
 341                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
 342                  MPP_VAR_FUNCTION(0x1, "dev", "ad25",       V_MV78260_PLUS)),
 343         MPP_MODE(61,
 344                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
 345                  MPP_VAR_FUNCTION(0x1, "dev", "ad26",       V_MV78260_PLUS)),
 346         MPP_MODE(62,
 347                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
 348                  MPP_VAR_FUNCTION(0x1, "dev", "ad27",       V_MV78260_PLUS)),
 349         MPP_MODE(63,
 350                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
 351                  MPP_VAR_FUNCTION(0x1, "dev", "ad28",       V_MV78260_PLUS)),
 352         MPP_MODE(64,
 353                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
 354                  MPP_VAR_FUNCTION(0x1, "dev", "ad29",       V_MV78260_PLUS)),
 355         MPP_MODE(65,
 356                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
 357                  MPP_VAR_FUNCTION(0x1, "dev", "ad30",       V_MV78260_PLUS)),
 358         MPP_MODE(66,
 359                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
 360                  MPP_VAR_FUNCTION(0x1, "dev", "ad31",       V_MV78260_PLUS)),
 361 };
 362
 363 static struct mvebu_pinctrl_soc_info armada_xp_pinctrl_info;
 364
 365 static const struct of_device_id armada_xp_pinctrl_of_match[] = {
 366         {
 367                 .compatible = "marvell,mv78230-pinctrl",
 368                 .data       = (void *) V_MV78230,
 369         },
 370         {
 371                 .compatible = "marvell,mv78260-pinctrl",
 372                 .data       = (void *) V_MV78260,
 373         },
 374         {
 375                 .compatible = "marvell,mv78460-pinctrl",
 376                 .data       = (void *) V_MV78460,
 377         },
 378         { },
 379 };
 380
 381 static struct mvebu_mpp_ctrl mv78230_mpp_controls[] = {
 382         MPP_FUNC_CTRL(0, 48, NULL, armada_xp_mpp_ctrl),
 383 };
 384
 385 static struct pinctrl_gpio_range mv78230_mpp_gpio_ranges[] = {
 386         MPP_GPIO_RANGE(0,   0,  0, 32),
 387         MPP_GPIO_RANGE(1,  32, 32, 17),
 388 };
 389
 390 static struct mvebu_mpp_ctrl mv78260_mpp_controls[] = {
 391         MPP_FUNC_CTRL(0, 66, NULL, armada_xp_mpp_ctrl),
 392 };
 393
 394 static struct pinctrl_gpio_range mv78260_mpp_gpio_ranges[] = {
 395         MPP_GPIO_RANGE(0,   0,  0, 32),
 396         MPP_GPIO_RANGE(1,  32, 32, 32),
 397         MPP_GPIO_RANGE(2,  64, 64,  3),
 398 };
 399
 400 static struct mvebu_mpp_ctrl mv78460_mpp_controls[] = {
 401         MPP_FUNC_CTRL(0, 66, NULL, armada_xp_mpp_ctrl),
 402 };
 403
 404 static struct pinctrl_gpio_range mv78460_mpp_gpio_ranges[] = {
 405         MPP_GPIO_RANGE(0,   0,  0, 32),
 406         MPP_GPIO_RANGE(1,  32, 32, 32),
 407         MPP_GPIO_RANGE(2,  64, 64,  3),
 408 };
 409
 410 static int armada_xp_pinctrl_suspend(struct platform_device *pdev,
 411                                      pm_message_t state)
 412 {
 413         struct mvebu_pinctrl_soc_info *soc =
 414                 platform_get_drvdata(pdev);
 415         int i, nregs;
 416
 417         nregs = DIV_ROUND_UP(soc->nmodes, MVEBU_MPPS_PER_REG);
 418
 419         for (i = 0; i < nregs; i++)
 420                 mpp_saved_regs[i] = readl(mpp_base + i * 4);
 421
 422         return 0;
 423 }
 424
 425 static int armada_xp_pinctrl_resume(struct platform_device *pdev)
 426 {
 427         struct mvebu_pinctrl_soc_info *soc =
 428                 platform_get_drvdata(pdev);
 429         int i, nregs;
 430
 431         nregs = DIV_ROUND_UP(soc->nmodes, MVEBU_MPPS_PER_REG);
 432
 433         for (i = 0; i < nregs; i++)
 434                 writel(mpp_saved_regs[i], mpp_base + i * 4);
 435
 436         return 0;
 437 }
 438
 439 static int armada_xp_pinctrl_probe(struct platform_device *pdev)
 440 {
 441         struct mvebu_pinctrl_soc_info *soc = &armada_xp_pinctrl_info;
 442         const struct of_device_id *match =
 443                 of_match_device(armada_xp_pinctrl_of_match, &pdev->dev);
 444         struct resource *res;
 445         int nregs;
 446
 447         if (!match)
 448                 return -ENODEV;
 449
 450         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 451         mpp_base = devm_ioremap_resource(&pdev->dev, res);
 452         if (IS_ERR(mpp_base))
 453                 return PTR_ERR(mpp_base);
 454
 455         soc->variant = (unsigned) match->data & 0xff;
 456
 457         switch (soc->variant) {
 458         case V_MV78230:
 459                 soc->controls = mv78230_mpp_controls;
 460                 soc->ncontrols = ARRAY_SIZE(mv78230_mpp_controls);
 461                 soc->modes = armada_xp_mpp_modes;
 462                 /* We don't necessarily want the full list of the
 463                  * armada_xp_mpp_modes, but only the first 'n' ones
 464                  * that are available on this SoC */
 465                 soc->nmodes = mv78230_mpp_controls[0].npins;
 466                 soc->gpioranges = mv78230_mpp_gpio_ranges;
 467                 soc->ngpioranges = ARRAY_SIZE(mv78230_mpp_gpio_ranges);
 468                 break;
 469         case V_MV78260:
 470                 soc->controls = mv78260_mpp_controls;
 471                 soc->ncontrols = ARRAY_SIZE(mv78260_mpp_controls);
 472                 soc->modes = armada_xp_mpp_modes;
 473                 /* We don't necessarily want the full list of the
 474                  * armada_xp_mpp_modes, but only the first 'n' ones
 475                  * that are available on this SoC */
 476                 soc->nmodes = mv78260_mpp_controls[0].npins;
 477                 soc->gpioranges = mv78260_mpp_gpio_ranges;
 478                 soc->ngpioranges = ARRAY_SIZE(mv78260_mpp_gpio_ranges);
 479                 break;
 480         case V_MV78460:
 481                 soc->controls = mv78460_mpp_controls;
 482                 soc->ncontrols = ARRAY_SIZE(mv78460_mpp_controls);
 483                 soc->modes = armada_xp_mpp_modes;
 484                 /* We don't necessarily want the full list of the
 485                  * armada_xp_mpp_modes, but only the first 'n' ones
 486                  * that are available on this SoC */
 487                 soc->nmodes = mv78460_mpp_controls[0].npins;
 488                 soc->gpioranges = mv78460_mpp_gpio_ranges;
 489                 soc->ngpioranges = ARRAY_SIZE(mv78460_mpp_gpio_ranges);
 490                 break;
 491         }
 492
 493         nregs = DIV_ROUND_UP(soc->nmodes, MVEBU_MPPS_PER_REG);
 494
 495         mpp_saved_regs = devm_kmalloc(&pdev->dev, nregs * sizeof(u32),
 496                                       GFP_KERNEL);
 497         if (!mpp_saved_regs)
 498                 return -ENOMEM;
 499
 500         pdev->dev.platform_data = soc;
 501
 502         return mvebu_pinctrl_probe(pdev);
 503 }
 504
 505 static int armada_xp_pinctrl_remove(struct platform_device *pdev)
 506 {
 507         return mvebu_pinctrl_remove(pdev);
 508 }
 509
 510 static struct platform_driver armada_xp_pinctrl_driver = {
 511         .driver = {
 512                 .name = "armada-xp-pinctrl",
 513                 .of_match_table = armada_xp_pinctrl_of_match,
 514         },
 515         .probe = armada_xp_pinctrl_probe,
 516         .remove = armada_xp_pinctrl_remove,
 517         .suspend = armada_xp_pinctrl_suspend,
 518         .resume = armada_xp_pinctrl_resume,
 519 };
 520
 521 module_platform_driver(armada_xp_pinctrl_driver);
 522
 523 MODULE_AUTHOR("Thomas Petazzoni <thomas.petazzoni@free-electrons.com>");
 524 MODULE_DESCRIPTION("Marvell Armada XP pinctrl driver");
 525 MODULE_LICENSE("GPL v2");